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qctecmdr
dfc3e3ddc8 Merge "disp: msm: sde: add sys cache usage for static image" 2020-05-01 17:58:07 -07:00
Nilaan Gunabalachandran
83ee51cb5a disp: msm: sde: add sys cache usage for static image
Store full or partial static image in system cache (L3 cache)
for video mode primary display. Added additional commit to
crtc commit thread to transition to read cache state.
The change also updates llcc APIs to support generic functionality.

Change-Id: I6b2a45da946d7e0e0b326da9d214be3f01a9420e
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-04-27 15:12:17 -04:00
Thomas Dedinsky
d4124a5322 disp: msm: sde: add rotation and scaling check for max linewidth
Add scaling linewidth variable and logic changes to get
valid max linewidth values for inline rotation and scaling.
Modify linewidth check to compare with scaler source width.

Change-Id: I7c63175e568ecb524f9cdf8ada1d7c6fdc999236
Signed-off-by: Thomas Dedinsky <tdedinsk@codeaurora.org>
2020-04-22 14:08:47 -07:00
Narendra Muppalla
690deaec8e disp: msm: sde: add pm_qos support for high frame rate display
Add/remove pm_qos request during sde encoder resource
controller enable/disable for high frame rate and command mode display.

Change-Id: I95fab92de8399d8b892751d654e7913166856cf3
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-04-03 09:52:02 -07:00
Gopikrishnaiah Anandan
a8371c6a52 disp: msm: Add support for demura properties
Based on the hardware catalog if dpu supports demura, driver will
install the drm properties specific to the feature. Change added support
for creating demura properties and exposing via drm frame-work.

Change-Id: I58f5b12ca660d826e6e0b7e1f212bdf3c5e41905
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
2020-03-30 17:43:28 -07:00
Gopikrishnaiah Anandan
718e224640 disp: msm: Install demura properties on connector
If DPU hardware supports demura feature, install the connector
properties related to demura feature.

Change-Id: Ieaddfc695e9f57e3c45e2bc0bd2c2e103f895ba8
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
2020-03-30 17:41:51 -07:00
Krishna Manikandan
e99063c7a3 disp: msm: stage layer with zorder 0 as base layer
Add support to stage layer with zorder 0 as base
layer and stage borderfill only during null commit.

Change-Id: I54356c1b7834227cc3da00c211e71ac5816ce51a
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
2020-03-29 16:50:44 -07:00
Jayaprakash
2f050dc9fe disp: msm: sde: modify setting of split_display flag
For CTL_ACTIVE targets, slave ctl need not to be reserved
as both the interfaces can be driven with single ctl.
Add a necessary check before enabling the feature.

Change-Id: Id68d7dd4fc1cf9534466fd5bfa50c3f551d06ce4
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2020-03-29 09:51:04 -07:00
Yashwanth
363aadd666 disp: msm: sde: update wb properties to optional
This change updates mandatory wb property to
optional as few low tier targets do not have wb
hardware block.

Change-Id: I39e6bf80a527dff95905e0a204401185e9e7bc03
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2020-03-28 23:06:59 -07:00
qctecmdr
9575e1f87e Merge "disp: msm: sde: modify fal10 thresholds for lahaina" 2020-03-25 07:02:57 -07:00
qctecmdr
2e5ae6687f Merge "disp: msm: sde: separate horz/vert max downscale checks" 2020-03-24 14:31:39 -07:00
Steve Cohen
9992efa7a0 disp: msm: sde: separate horz/vert max downscale checks
Separate the horizontal and vertical max downscale checks
as pre-downscale introduced different limits on different
axes. Also cleanup the variable names for max downscale
limit when pre-downscale is not enabled.

Change-Id: If01aac1844d0bd5133502a50dbc38197e11da5d5
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-03-23 23:44:39 -04:00
Steve Cohen
973788d311 disp: msm: sde: reduce complexity in sde_sspp_parse_dt
Reduce the cyclomatic complexity for this function by splitting
the work in to helpers and using the new sde_dt_props method of
device node parsing.

Change-Id: Id4a41225bd78f06ee353a636d17330ba41daf1ff
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-03-23 23:44:11 -04:00
qctecmdr
5aacc34ec6 Merge "disp: msm: sde: add doc for sde_dt_props helpers" 2020-03-21 04:57:18 -07:00
Prabhanjan Kandula
89a141df9f disp: msm: sde: add support for mdss spr hw block
This change parses SPR hw block entries from device tree and populate
SPR block as sub block of DSPP block. Change also enables register dump
by registering sub blocks with sde driver register dump routine.

Change-Id: Ic603cd3cc001dddce5dfea61341c166a5fec1682
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2020-03-16 22:04:21 -07:00
qctecmdr
3af9cf96b7 Merge "disp: msm: sde: refactor catalog dspp parsing" 2020-03-12 22:05:29 -07:00
qctecmdr
5d2e2f435f Merge "disp: msm: sde: align timing engine vsync based on panel vsync" 2020-03-12 20:15:59 -07:00
Abhijit Kulkarni
7d15639374 disp: msm: sde: modify fal10 thresholds for lahaina
This change modifies the fal10 threshold for lahaina platform.
Lahaina platform now supports uidle feature enabled for displays
upto 90 fps.

Change-Id: I4c7e84c9216572df1dfd1f062baef485359e06d6
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-03-12 14:05:38 -07:00
Narendra Muppalla
68ee65353b disp: msm: sde: align timing engine vsync based on panel vsync
This change adds logic to align timing engine vsync with panel
tear check if it is supported.

Change-Id: I3f881f392929589848c893f567822b21c0650000
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-03-11 10:14:57 -07:00
Steve Cohen
32ad348d81 disp: msm: sde: add MDSS_HW block range for debugfs register access
Register the MDSS_HW block (at base offset 0) for access via the
sde_reg node in SDE's debugfs directory. This is needed for
validating correct UBWC register programming.

Change-Id: I2494e066a7603747f2ec12546e58a17f2120a521
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-03-08 01:42:56 -08:00
Steve Cohen
6cb33c8d11 disp: msm: sde: refactor catalog dspp parsing
Refactor dspp catalog parsing functions to reduce
cyclomatic complexity.

Change-Id: I0a8200f8e08a7ac40172fdcd6cc62e08135bba61
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-03-06 13:58:36 -08:00
Steve Cohen
941597ae0f disp: msm: sde: add doc for sde_dt_props helpers
Add docstrings for sde_get_dt_props and cleanup error checking
in some call sites.

Change-Id: I031b7a928b894c2db9b8c95863807d77f25176d6
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-03-03 22:22:46 -05:00
qctecmdr
8a690a0b80 Merge "disp: msm: sde: support fps based qos setting" 2020-03-03 13:40:02 -08:00
Dhaval Patel
2843f86793 disp: msm: sde: support fps based qos setting
Support different safe, danger and creq qos lut
configuration based on display fps. It also removes
the fill level calculations from sspp and wb block
because mdss hw supports simple configuration.

Change-Id: I203e4300c9eab27d3632c890bedd6383cca0e5a8
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-03-02 09:52:47 -08:00
Abhijit Kulkarni
e3a078c712 disp: msm: sde: fix dsc/vdc register dump
DSC and VDC-M sub-block registers are not on contiguous
address range. This change allows dumping the registers
for each individual sub-block.

Change-Id: I06dfc64562211370a0e29f6fc1134351c47722f6
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-02-28 12:43:22 -08:00
qctecmdr
c15f349088 Merge "drm: msm: handle resolution switch for LTM" 2020-02-19 10:32:00 -08:00
Amine Najahi
af07b8a5d4 disp: msm: sde: add support for hardware based rounded corner
Add support for hardware based rounded corner part of
color processing framework.

Change-Id: I3e5f4dac6ffc759bb940215b7621ac716f255169
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-02-16 01:03:58 -08:00
Steve Cohen
818651c2f1 disp: msm: sde: use sde_dt_props object to parse dspp dts
Use the new helpers for parsing DSPP device nodes entries.

Change-Id: I620ba80cac90f34faa1f853f00cf856370ae387c
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-02-13 22:06:13 -05:00
Steve Cohen
e1e4771b77 disp: msm: sde: create helper for getting CTL & mixer dts properties
Simplify device node parsing by using a new structure for
temporarily holding the read properties and create helpers for
getting/freeing all the properties in a sde_prop_type table.
This patch uses these helpers for CTL and mixer parsing,
other blocks will be refactored as well.

Change-Id: I546f32baea8fc09c36a7f24b042f1f1615770b72
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-02-13 22:01:19 -05:00
Narendra Muppalla
f5666717c7 disp: msm/sde: add CWB support for lahaina target
This change updates the block offsets for concurrent writeback 
blocks and fixes the register dumping logic.

Change-Id: I41b540773fea60e66cab5d476dff1a19b4f4b3db
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-02-13 11:09:06 -08:00
Steve Cohen
dd9f329b96 disp: msm: sde: set prop_count for U32 and BOOL type device node props
Set the prop_count corresponding to unsigned 32-bit integers and
boolean types to 1. With this change prop_count should have a
positive value for all properties which exist under the device node.

Change-Id: I601870dc25ab347b742fcc4aa2f6bea2397c6caf
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-02-12 20:40:40 -05:00
Narendra Muppalla
f402d8e542 disp: msm: sde: program dither based on input data
This change programs dither based on user mode input data and
reprograms the dither when device comes out of power collapse.

Change-Id: I83be20c8eb2dc2221cc57cd2395f6512338ff6ef
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-02-10 15:33:42 -08:00
Christopher Braga
5e28b86e3c disp: msm: sde: Add support for SB LUTDMA
A new LUTDMA HW instance has been added to support programming of
SB features via LUTDMA. This change adds corresponding support for
the new SB LUTDMA, including catalog parsing, reg_dma init/deinit/ops
updates and new opcode support.

Change-Id: I0fed7a6e93cd96fe9fe562d2470a8789b161d1bc
Signed-off-by: Ping Li <pingli@codeaurora.org>
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2020-02-06 14:21:53 -05:00
Abhinav Kumar
88a43f2441 disp: msm: sde: add hardware catalog support for VDC-m block
Add hardware catalog support for VDC-m block to parse
the register offsets and feature capabilities.

Change-Id: I1bfbc4b6e7e9f34738d49fecdef4b427a0ccded7
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
2020-01-29 13:44:48 -08:00
Abhijit Kulkarni
748372a24c disp: msm: sde: add qactive override
This change adds the hooks to enable the active signal override
in power collapse sequence. Active signal override is needed to
disable the clock gating when the power collapse sequence
is running.

Change-Id: I9edaed7960b236b3d0179cb67f9cc2c9b3546c9d
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-01-23 14:38:26 -08:00
Linux Build Service Account
8e660ebeaf Merge "disp: msm: sde: add support for 4k aligned memory pools" into display-kernel.lnx.5.4 2020-01-23 14:19:31 -08:00
Linux Build Service Account
bb0ca40080 Merge "disp: msm: sde: add support for new dspp flush" into display-kernel.lnx.5.4 2020-01-23 14:19:30 -08:00
Abhijit Kulkarni
d3d3f808d4 disp: msm: sde: use pp dsc api only if hw supports
This change checks the capabilities of pingpong block to
check if it needs to call the pingpong api to enable or
disable the dsc. Certain hw versions do not have support
in pingpong block to enable/disable the dsc instead the
dsc block itself have the hooks to control the DSC.

Change-Id: I17dd45479cc33ff2e81f6a6e5a5a8704562dfd24
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-01-22 12:33:24 -08:00
Abhijit Kulkarni
6be579d992 disp: msm: sde: parse dsc_1_2 hw sub-blks
This change adds additional dsc hw sub-blks and their
advertized capabilities. These are required for supporting dsi 1.2 hw
and making the code backward compatible with older hw version.

Change-Id: I84d86ad4f6ac2dd76324bbfd5600b010738b3310
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-01-22 12:33:24 -08:00
Steve Cohen
3f4a79d45a disp: msm: sde: add support for 4k aligned memory pools
Add support for HDR memory pool blocks aligned to a 4k page
address. This feature must be enabled by setting the
corresponding feature bit for supported targets.

Change-Id: I696ffb6ce3b607741f26496d40e2296c4c5bdb4b
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-01-21 16:22:24 -08:00
Prabhanjan Kandula
fd60107c88 disp: msm: sde: add support for new dspp flush
SDE HW from lahaina has moved the DSPP flush bits from CTL_FLUSH
to new CTL_DSPP_x_FLUSH registers. This change brings in
support for programming the new DSPP flush registers which
allow more fine-grained control over what sub-blocks within
each DSPP get flushed.

Change-Id: Ie16c9b153d607bd7627ba02480813ab588bbe2ea
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-01-21 16:08:50 -05:00
Steve Cohen
1579af15fc disp: msm: sde: determine rotation capabilities from version
Determine inline rotation capabilities and parameter values
from the inline rotator revision. This reduces the number of
capabilities required to be added for each new target.

Change-Id: I3ae02938d51be5a5419b50303c1f244be12b8c47
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2019-12-16 08:08:27 -08:00
Steve Cohen
2f6b16af77 disp: msm: sde: remove inline prefill properties
Don't expose the prefill requirements for inline rotation.
These values are not used within the driver, so move these
settings to user-space.

Change-Id: Ie1038c5804047fafe0ee3129b993d83d4d31b386
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2019-12-16 08:08:27 -08:00
Steve Cohen
60133f5ebb disp: msm: sde: pre-downscale support for inline rotation v2
Add support for enabling pre-downscale block to increase the
maximum downscale capability for true inline rotation use cases.

Change-Id: Ifa544bb0ae69439abef4bd427134290090fe7230
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2019-12-16 08:07:24 -08:00
Steve Cohen
5a55e2d121 disp: msm: sde: new formats added for true inline rotation v2
Advertise the new formats supported with true inline rotation v2 HW
(ABGR8888 compressed and P010).

Change-Id: I0a1b6dfd6bcfd82d9bc61e87680d2c584615e113
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2019-12-13 20:30:53 -08:00
Linux Build Service Account
8a4e84105b Merge changes I00518e84,I08f66c0e,I2948bc6e,I21bc67b4,I79acaf83,I2f8ffe6e into display-kernel.lnx.1.0
* changes:
  disp: msm: sde: use device tree node to enable INTF TE capability
  disp: msm: sde: refactor sde_hw_interrupts to use offsets from catalog
  disp: msm: sde: get INTF TEAR IRQ offsets from device tree
  disp: msm: sde: rename MDSS_INTR_* enums to SDE_INTR_*
  disp: msm: sde: add Lahaina version checks
  disp: msm: sde: move all hw version checks in to the catalog
2019-12-04 17:27:54 -08:00
Steve Cohen
18b3e27f49 disp: msm: sde: use device tree node to enable INTF TE capability
Set the INTF TE capability bit only on interfaces which have a non-zero
value in the device tree node qcom,sde-intf-tear-irq-off instead of
enabling it for all interfaces based only on the HW version. The HW
doesn't support TE programming for non-TE enabled interfaces, so this
patch only populates the TE ops for those which support it.

Change-Id: I00518e846dc44e1e0808a049625dc14099656e11
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2019-11-26 18:02:34 -05:00
Steve Cohen
3560bdcad0 disp: msm: sde: refactor sde_hw_interrupts to use offsets from catalog
Refactor the SDE interrupts module to use the offsets in the catalog.
This avoids hard-coding offsets for interrupts within a block's
address space so when that block's base address is relocated the
interrupts for that block are shifted as well.

Change-Id: I08f66c0e93bbe102dfe67350c97c5c7a4fb5039a
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2019-11-26 14:24:01 -05:00
Steve Cohen
df8c709d23 disp: msm: sde: get INTF TEAR IRQ offsets from device tree
The INTF TEAR IRQ block offsets can shift between targets. Therefore,
to allow dynamically setting these offsets they should be specified
in the sde device tree node qcom,sde-intf-tear-irq-off.

Change-Id: I2948bc6eaa31fe5e180379770d88e7be72b6d345
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2019-11-26 14:07:40 -05:00
Steve Cohen
5fe5765fd4 disp: msm: sde: rename MDSS_INTR_* enums to SDE_INTR_*
Rename sde_intr_enum members to prefix with SDE instead of
the old MDSS naming used in legacy display driver.

Change-Id: I21bc67b4a79b7e53af0ac1beaebb6e9482015b0f
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2019-11-26 14:07:08 -05:00