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@@ -213,25 +213,27 @@ enum {
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PERF_DOWNSCALING_PREFILL_LINES,
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PERF_XTRA_PREFILL_LINES,
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PERF_AMORTIZABLE_THRESHOLD,
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- PERF_DANGER_LUT,
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- PERF_SAFE_LUT_LINEAR,
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- PERF_SAFE_LUT_MACROTILE,
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- PERF_SAFE_LUT_NRT,
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- PERF_SAFE_LUT_CWB,
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- PERF_QOS_LUT_LINEAR,
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- PERF_QOS_LUT_MACROTILE,
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- PERF_QOS_LUT_NRT,
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- PERF_QOS_LUT_CWB,
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+ PERF_NUM_MNOC_PORTS,
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+ PERF_AXI_BUS_WIDTH,
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PERF_CDP_SETTING,
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PERF_CPU_MASK,
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PERF_CPU_DMA_LATENCY,
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- PERF_QOS_LUT_MACROTILE_QSEED,
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- PERF_SAFE_LUT_MACROTILE_QSEED,
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- PERF_NUM_MNOC_PORTS,
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- PERF_AXI_BUS_WIDTH,
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PERF_PROP_MAX,
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};
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+enum {
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+ QOS_REFRESH_RATES,
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+ QOS_DANGER_LUT,
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+ QOS_SAFE_LUT,
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+ QOS_CREQ_LUT_LINEAR,
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+ QOS_CREQ_LUT_MACROTILE,
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+ QOS_CREQ_LUT_NRT,
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+ QOS_CREQ_LUT_CWB,
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+ QOS_CREQ_LUT_MACROTILE_QSEED,
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+ QOS_CREQ_LUT_LINEAR_QSEED,
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+ QOS_PROP_MAX,
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+};
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+
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enum {
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SSPP_OFF,
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SSPP_SIZE,
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@@ -562,37 +564,34 @@ static struct sde_prop_type sde_perf_prop[] = {
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false, PROP_TYPE_U32},
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{PERF_AMORTIZABLE_THRESHOLD, "qcom,sde-amortizable-threshold",
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false, PROP_TYPE_U32},
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- {PERF_DANGER_LUT, "qcom,sde-danger-lut", false, PROP_TYPE_U32_ARRAY},
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- {PERF_SAFE_LUT_LINEAR, "qcom,sde-safe-lut-linear", false,
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- PROP_TYPE_U32_ARRAY},
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- {PERF_SAFE_LUT_MACROTILE, "qcom,sde-safe-lut-macrotile", false,
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- PROP_TYPE_U32_ARRAY},
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- {PERF_SAFE_LUT_NRT, "qcom,sde-safe-lut-nrt", false,
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- PROP_TYPE_U32_ARRAY},
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- {PERF_SAFE_LUT_CWB, "qcom,sde-safe-lut-cwb", false,
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+ {PERF_NUM_MNOC_PORTS, "qcom,sde-num-mnoc-ports",
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+ false, PROP_TYPE_U32},
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+ {PERF_AXI_BUS_WIDTH, "qcom,sde-axi-bus-width",
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+ false, PROP_TYPE_U32},
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+ {PERF_CDP_SETTING, "qcom,sde-cdp-setting", false,
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PROP_TYPE_U32_ARRAY},
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- {PERF_QOS_LUT_LINEAR, "qcom,sde-qos-lut-linear", false,
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+ {PERF_CPU_MASK, "qcom,sde-qos-cpu-mask", false, PROP_TYPE_U32},
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+ {PERF_CPU_DMA_LATENCY, "qcom,sde-qos-cpu-dma-latency", false,
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+ PROP_TYPE_U32},
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+};
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+
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+static struct sde_prop_type sde_qos_prop[] = {
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+ {QOS_REFRESH_RATES, "qcom,sde-qos-refresh-rates", false,
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PROP_TYPE_U32_ARRAY},
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- {PERF_QOS_LUT_MACROTILE, "qcom,sde-qos-lut-macrotile", false,
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+ {QOS_DANGER_LUT, "qcom,sde-danger-lut", false, PROP_TYPE_U32_ARRAY},
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+ {QOS_SAFE_LUT, "qcom,sde-safe-lut", false, PROP_TYPE_U32_ARRAY},
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+ {QOS_CREQ_LUT_LINEAR, "qcom,sde-qos-lut-linear", false,
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PROP_TYPE_U32_ARRAY},
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- {PERF_QOS_LUT_NRT, "qcom,sde-qos-lut-nrt", false,
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+ {QOS_CREQ_LUT_MACROTILE, "qcom,sde-qos-lut-macrotile", false,
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PROP_TYPE_U32_ARRAY},
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- {PERF_QOS_LUT_CWB, "qcom,sde-qos-lut-cwb", false,
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+ {QOS_CREQ_LUT_NRT, "qcom,sde-qos-lut-nrt", false,
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PROP_TYPE_U32_ARRAY},
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-
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- {PERF_CDP_SETTING, "qcom,sde-cdp-setting", false,
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+ {QOS_CREQ_LUT_CWB, "qcom,sde-qos-lut-cwb", false,
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PROP_TYPE_U32_ARRAY},
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- {PERF_CPU_MASK, "qcom,sde-qos-cpu-mask", false, PROP_TYPE_U32},
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- {PERF_CPU_DMA_LATENCY, "qcom,sde-qos-cpu-dma-latency", false,
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- PROP_TYPE_U32},
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- {PERF_QOS_LUT_MACROTILE_QSEED, "qcom,sde-qos-lut-macrotile-qseed",
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+ {QOS_CREQ_LUT_MACROTILE_QSEED, "qcom,sde-qos-lut-macrotile-qseed",
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false, PROP_TYPE_U32_ARRAY},
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- {PERF_SAFE_LUT_MACROTILE_QSEED, "qcom,sde-safe-lut-macrotile-qseed",
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+ {QOS_CREQ_LUT_LINEAR_QSEED, "qcom,sde-qos-lut-linear-qseed",
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false, PROP_TYPE_U32_ARRAY},
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- {PERF_NUM_MNOC_PORTS, "qcom,sde-num-mnoc-ports",
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- false, PROP_TYPE_U32},
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- {PERF_AXI_BUS_WIDTH, "qcom,sde-axi-bus-width",
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- false, PROP_TYPE_U32},
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};
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static struct sde_prop_type sspp_prop[] = {
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@@ -3814,172 +3813,111 @@ static int _sde_perf_parse_dt_validate(struct device_node *np, int *prop_count)
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if (rc)
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return rc;
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- rc = _validate_dt_entry(np, &sde_perf_prop[PERF_DANGER_LUT], 1,
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- &prop_count[PERF_DANGER_LUT], NULL);
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- if (rc)
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- return rc;
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-
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- rc = _validate_dt_entry(np, &sde_perf_prop[PERF_SAFE_LUT_LINEAR], 1,
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- &prop_count[PERF_SAFE_LUT_LINEAR], NULL);
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- if (rc)
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- return rc;
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-
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- rc = _validate_dt_entry(np, &sde_perf_prop[PERF_SAFE_LUT_MACROTILE], 1,
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- &prop_count[PERF_SAFE_LUT_MACROTILE], NULL);
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- if (rc)
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- return rc;
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-
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- rc = _validate_dt_entry(np, &sde_perf_prop[PERF_SAFE_LUT_NRT], 1,
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- &prop_count[PERF_SAFE_LUT_NRT], NULL);
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- if (rc)
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- return rc;
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-
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- rc = _validate_dt_entry(np, &sde_perf_prop[PERF_SAFE_LUT_CWB], 1,
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- &prop_count[PERF_SAFE_LUT_CWB], NULL);
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- if (rc)
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- return rc;
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-
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- rc = _validate_dt_entry(np, &sde_perf_prop[PERF_QOS_LUT_LINEAR], 1,
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- &prop_count[PERF_QOS_LUT_LINEAR], NULL);
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- if (rc)
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- return rc;
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-
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- rc = _validate_dt_entry(np, &sde_perf_prop[PERF_QOS_LUT_MACROTILE], 1,
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- &prop_count[PERF_QOS_LUT_MACROTILE], NULL);
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- if (rc)
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- return rc;
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-
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- rc = _validate_dt_entry(np, &sde_perf_prop[PERF_QOS_LUT_NRT], 1,
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- &prop_count[PERF_QOS_LUT_NRT], NULL);
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- if (rc)
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- return rc;
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-
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- rc = _validate_dt_entry(np, &sde_perf_prop[PERF_QOS_LUT_CWB], 1,
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- &prop_count[PERF_QOS_LUT_CWB], NULL);
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- if (rc)
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- return rc;
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-
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rc = _validate_dt_entry(np, &sde_perf_prop[PERF_CDP_SETTING], 1,
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&prop_count[PERF_CDP_SETTING], NULL);
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if (rc)
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return rc;
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- rc = _validate_dt_entry(np,
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- &sde_perf_prop[PERF_QOS_LUT_MACROTILE_QSEED], 1,
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- &prop_count[PERF_QOS_LUT_MACROTILE_QSEED], NULL);
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- if (rc)
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- return rc;
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-
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- rc = _validate_dt_entry(np,
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- &sde_perf_prop[PERF_SAFE_LUT_MACROTILE_QSEED], 1,
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- &prop_count[PERF_SAFE_LUT_MACROTILE_QSEED], NULL);
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-
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return rc;
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}
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-static int _sde_perf_parse_dt_cfg_qos(struct sde_mdss_cfg *cfg, int *prop_count,
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+static int _sde_qos_parse_dt_cfg(struct sde_mdss_cfg *cfg, int *prop_count,
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struct sde_prop_value *prop_value, bool *prop_exists)
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{
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- int j, k;
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+ int i, j;
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+ u32 qos_count = 1, index;
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+
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+ if (prop_exists[QOS_REFRESH_RATES]) {
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+ qos_count = prop_count[QOS_REFRESH_RATES];
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+ cfg->perf.qos_refresh_rate = kcalloc(qos_count,
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+ sizeof(u32), GFP_KERNEL);
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+ if (!cfg->perf.qos_refresh_rate)
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+ goto end;
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- if (prop_exists[PERF_DANGER_LUT] && prop_count[PERF_DANGER_LUT] <=
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- SDE_QOS_LUT_USAGE_MAX) {
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- for (j = 0; j < prop_count[PERF_DANGER_LUT]; j++) {
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- cfg->perf.danger_lut_tbl[j] =
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+ for (j = 0; j < qos_count; j++) {
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+ cfg->perf.qos_refresh_rate[j] =
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PROP_VALUE_ACCESS(prop_value,
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- PERF_DANGER_LUT, j);
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- SDE_DEBUG("danger usage:%d lut:0x%x\n",
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- j, cfg->perf.danger_lut_tbl[j]);
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+ QOS_REFRESH_RATES, j);
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+ SDE_DEBUG("qos usage:%d refresh rate:0x%x\n",
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+ j, cfg->perf.qos_refresh_rate[j]);
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}
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}
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+ cfg->perf.qos_refresh_count = qos_count;
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- for (j = 0; j < SDE_QOS_LUT_USAGE_MAX; j++) {
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- static const u32 safe_key[SDE_QOS_LUT_USAGE_MAX] = {
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- [SDE_QOS_LUT_USAGE_LINEAR] =
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- PERF_SAFE_LUT_LINEAR,
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- [SDE_QOS_LUT_USAGE_MACROTILE] =
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- PERF_SAFE_LUT_MACROTILE,
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- [SDE_QOS_LUT_USAGE_NRT] =
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- PERF_SAFE_LUT_NRT,
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- [SDE_QOS_LUT_USAGE_CWB] =
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- PERF_SAFE_LUT_CWB,
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- [SDE_QOS_LUT_USAGE_MACROTILE_QSEED] =
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- PERF_SAFE_LUT_MACROTILE_QSEED,
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- };
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- const u32 entry_size = 2;
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- int m, count;
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- int key = safe_key[j];
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-
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- if (!prop_exists[key])
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- continue;
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-
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- count = prop_count[key] / entry_size;
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+ cfg->perf.danger_lut = kcalloc(qos_count,
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+ sizeof(u64) * SDE_QOS_LUT_USAGE_MAX, GFP_KERNEL);
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+ cfg->perf.safe_lut = kcalloc(qos_count,
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+ sizeof(u64) * SDE_QOS_LUT_USAGE_MAX, GFP_KERNEL);
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+ cfg->perf.creq_lut = kcalloc(qos_count,
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+ sizeof(u64) * SDE_QOS_LUT_USAGE_MAX, GFP_KERNEL);
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+ if (!cfg->perf.creq_lut || !cfg->perf.safe_lut || !cfg->perf.danger_lut)
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+ goto end;
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- cfg->perf.sfe_lut_tbl[j].entries = kcalloc(count,
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- sizeof(struct sde_qos_lut_entry), GFP_KERNEL);
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- if (!cfg->perf.sfe_lut_tbl[j].entries)
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- return -ENOMEM;
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+ if (prop_exists[QOS_DANGER_LUT] &&
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+ prop_count[QOS_DANGER_LUT] >= (SDE_QOS_LUT_USAGE_MAX * qos_count)) {
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+ for (i = 0; i < prop_count[QOS_DANGER_LUT]; i++) {
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+ cfg->perf.danger_lut[i] =
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+ PROP_VALUE_ACCESS(prop_value,
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+ QOS_DANGER_LUT, i);
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+ SDE_DEBUG("danger usage:%i lut:0x%x\n",
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+ i, cfg->perf.danger_lut[i]);
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+ }
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+ }
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- for (k = 0, m = 0; k < count; k++, m += entry_size) {
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- u64 lut_lo;
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-
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- cfg->perf.sfe_lut_tbl[j].entries[k].fl =
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- PROP_VALUE_ACCESS(prop_value, key, m);
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- lut_lo = PROP_VALUE_ACCESS(prop_value, key, m + 1);
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- cfg->perf.sfe_lut_tbl[j].entries[k].lut = lut_lo;
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- SDE_DEBUG("safe usage:%d.%d fl:%d lut:0x%llx\n",
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- j, k,
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- cfg->perf.sfe_lut_tbl[j].entries[k].fl,
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- cfg->perf.sfe_lut_tbl[j].entries[k].lut);
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+ if (prop_exists[QOS_SAFE_LUT] &&
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+ prop_count[QOS_SAFE_LUT] >= (SDE_QOS_LUT_USAGE_MAX * qos_count)) {
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+ for (i = 0; i < prop_count[QOS_SAFE_LUT]; i++) {
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+ cfg->perf.safe_lut[i] =
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+ PROP_VALUE_ACCESS(prop_value,
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+ QOS_SAFE_LUT, i);
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+ SDE_DEBUG("safe usage:%d lut:0x%x\n",
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+ i, cfg->perf.safe_lut[i]);
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}
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- cfg->perf.sfe_lut_tbl[j].nentry = count;
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}
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- for (j = 0; j < SDE_QOS_LUT_USAGE_MAX; j++) {
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+ for (i = 0; i < SDE_QOS_LUT_USAGE_MAX; i++) {
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static const u32 prop_key[SDE_QOS_LUT_USAGE_MAX] = {
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[SDE_QOS_LUT_USAGE_LINEAR] =
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- PERF_QOS_LUT_LINEAR,
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+ QOS_CREQ_LUT_LINEAR,
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[SDE_QOS_LUT_USAGE_MACROTILE] =
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- PERF_QOS_LUT_MACROTILE,
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+ QOS_CREQ_LUT_MACROTILE,
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[SDE_QOS_LUT_USAGE_NRT] =
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- PERF_QOS_LUT_NRT,
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+ QOS_CREQ_LUT_NRT,
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[SDE_QOS_LUT_USAGE_CWB] =
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- PERF_QOS_LUT_CWB,
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+ QOS_CREQ_LUT_CWB,
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[SDE_QOS_LUT_USAGE_MACROTILE_QSEED] =
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- PERF_QOS_LUT_MACROTILE_QSEED,
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+ QOS_CREQ_LUT_MACROTILE_QSEED,
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+ [SDE_QOS_LUT_USAGE_LINEAR_QSEED] =
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+ QOS_CREQ_LUT_LINEAR_QSEED,
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};
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- const u32 entry_size = 3;
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- int m, count;
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- int key = prop_key[j];
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+ int key = prop_key[i];
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+ u64 lut_hi, lut_lo;
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if (!prop_exists[key])
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continue;
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- count = prop_count[key] / entry_size;
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-
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- cfg->perf.qos_lut_tbl[j].entries = kcalloc(count,
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- sizeof(struct sde_qos_lut_entry), GFP_KERNEL);
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- if (!cfg->perf.qos_lut_tbl[j].entries)
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- return -ENOMEM;
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-
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- for (k = 0, m = 0; k < count; k++, m += entry_size) {
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- u64 lut_hi, lut_lo;
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-
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- cfg->perf.qos_lut_tbl[j].entries[k].fl =
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- PROP_VALUE_ACCESS(prop_value, key, m);
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- lut_hi = PROP_VALUE_ACCESS(prop_value, key, m + 1);
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- lut_lo = PROP_VALUE_ACCESS(prop_value, key, m + 2);
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- cfg->perf.qos_lut_tbl[j].entries[k].lut =
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+ for (j = 0; j < qos_count; j++) {
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+ lut_hi = PROP_VALUE_ACCESS(prop_value, key,
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+ (j * 2) + 0);
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+ lut_lo = PROP_VALUE_ACCESS(prop_value, key,
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+ (j * 2) + 1);
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+ index = (j * SDE_QOS_LUT_USAGE_MAX) + i;
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+ cfg->perf.creq_lut[index] =
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(lut_hi << 32) | lut_lo;
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- SDE_DEBUG("usage:%d.%d fl:%d lut:0x%llx\n",
|
|
|
- j, k,
|
|
|
- cfg->perf.qos_lut_tbl[j].entries[k].fl,
|
|
|
- cfg->perf.qos_lut_tbl[j].entries[k].lut);
|
|
|
+ SDE_DEBUG("creq usage:%d lut:0x%llx\n",
|
|
|
+ index, cfg->perf.creq_lut[index]);
|
|
|
}
|
|
|
- cfg->perf.qos_lut_tbl[j].nentry = count;
|
|
|
}
|
|
|
|
|
|
return 0;
|
|
|
+
|
|
|
+end:
|
|
|
+ kfree(cfg->perf.qos_refresh_rate);
|
|
|
+ kfree(cfg->perf.creq_lut);
|
|
|
+ kfree(cfg->perf.danger_lut);
|
|
|
+ kfree(cfg->perf.safe_lut);
|
|
|
+
|
|
|
+ return -ENOMEM;
|
|
|
}
|
|
|
|
|
|
static void _sde_perf_parse_dt_cfg_populate(struct sde_mdss_cfg *cfg,
|
|
@@ -4088,11 +4026,6 @@ static int _sde_perf_parse_dt_cfg(struct device_node *np,
|
|
|
_sde_perf_parse_dt_cfg_populate(cfg, prop_count, prop_value,
|
|
|
prop_exists);
|
|
|
|
|
|
- rc = _sde_perf_parse_dt_cfg_qos(cfg, prop_count, prop_value,
|
|
|
- prop_exists);
|
|
|
- if (rc)
|
|
|
- return rc;
|
|
|
-
|
|
|
if (prop_exists[PERF_CDP_SETTING]) {
|
|
|
const u32 prop_size = 2;
|
|
|
u32 count = prop_count[PERF_CDP_SETTING] / prop_size;
|
|
@@ -4163,6 +4096,43 @@ end:
|
|
|
return rc;
|
|
|
}
|
|
|
|
|
|
+static int sde_qos_parse_dt(struct device_node *np, struct sde_mdss_cfg *cfg)
|
|
|
+{
|
|
|
+ int rc, prop_count[QOS_PROP_MAX];
|
|
|
+ struct sde_prop_value *prop_value = NULL;
|
|
|
+ bool prop_exists[QOS_PROP_MAX];
|
|
|
+
|
|
|
+ if (!cfg) {
|
|
|
+ SDE_ERROR("invalid argument\n");
|
|
|
+ rc = -EINVAL;
|
|
|
+ goto end;
|
|
|
+ }
|
|
|
+
|
|
|
+ prop_value = kzalloc(QOS_PROP_MAX *
|
|
|
+ sizeof(struct sde_prop_value), GFP_KERNEL);
|
|
|
+ if (!prop_value) {
|
|
|
+ rc = -ENOMEM;
|
|
|
+ goto end;
|
|
|
+ }
|
|
|
+
|
|
|
+ rc = _validate_dt_entry(np, sde_qos_prop, ARRAY_SIZE(sde_qos_prop),
|
|
|
+ prop_count, NULL);
|
|
|
+ if (rc)
|
|
|
+ goto freeprop;
|
|
|
+
|
|
|
+ rc = _read_dt_entry(np, sde_qos_prop, ARRAY_SIZE(sde_qos_prop),
|
|
|
+ prop_count, prop_exists, prop_value);
|
|
|
+ if (rc)
|
|
|
+ goto freeprop;
|
|
|
+
|
|
|
+ rc = _sde_qos_parse_dt_cfg(cfg, prop_count, prop_value, prop_exists);
|
|
|
+
|
|
|
+freeprop:
|
|
|
+ kfree(prop_value);
|
|
|
+end:
|
|
|
+ return rc;
|
|
|
+}
|
|
|
+
|
|
|
static int sde_parse_merge_3d_dt(struct device_node *np,
|
|
|
struct sde_mdss_cfg *sde_cfg)
|
|
|
{
|
|
@@ -4456,7 +4426,6 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
|
|
|
sde_cfg->sui_misr_supported = true;
|
|
|
sde_cfg->sui_block_xin_mask = 0x3F71;
|
|
|
sde_cfg->has_sui_blendstage = true;
|
|
|
- sde_cfg->has_qos_fl_nocalc = true;
|
|
|
sde_cfg->has_3d_merge_reset = true;
|
|
|
sde_cfg->has_decimation = true;
|
|
|
sde_cfg->vbif_disable_inner_outer_shareable = true;
|
|
@@ -4483,7 +4452,6 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
|
|
|
sde_cfg->has_decimation = true;
|
|
|
sde_cfg->sui_block_xin_mask = 0x2EE1;
|
|
|
sde_cfg->has_sui_blendstage = true;
|
|
|
- sde_cfg->has_qos_fl_nocalc = true;
|
|
|
sde_cfg->has_3d_merge_reset = true;
|
|
|
sde_cfg->has_hdr = true;
|
|
|
sde_cfg->has_vig_p010 = true;
|
|
@@ -4501,7 +4469,6 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
|
|
|
sde_cfg->sui_misr_supported = true;
|
|
|
sde_cfg->sui_block_xin_mask = 0xE71;
|
|
|
sde_cfg->has_sui_blendstage = true;
|
|
|
- sde_cfg->has_qos_fl_nocalc = true;
|
|
|
sde_cfg->has_3d_merge_reset = true;
|
|
|
sde_cfg->vbif_disable_inner_outer_shareable = true;
|
|
|
} else if (IS_KONA_TARGET(hw_rev)) {
|
|
@@ -4517,7 +4484,6 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
|
|
|
sde_cfg->sui_misr_supported = true;
|
|
|
sde_cfg->sui_block_xin_mask = 0x3F71;
|
|
|
sde_cfg->has_sui_blendstage = true;
|
|
|
- sde_cfg->has_qos_fl_nocalc = true;
|
|
|
sde_cfg->has_3d_merge_reset = true;
|
|
|
sde_cfg->has_hdr = true;
|
|
|
sde_cfg->has_hdr_plus = true;
|
|
@@ -4539,7 +4505,6 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
|
|
|
sde_cfg->sui_misr_supported = true;
|
|
|
sde_cfg->sui_block_xin_mask = 0xE71;
|
|
|
sde_cfg->has_sui_blendstage = true;
|
|
|
- sde_cfg->has_qos_fl_nocalc = true;
|
|
|
sde_cfg->has_3d_merge_reset = true;
|
|
|
sde_cfg->has_hdr = true;
|
|
|
sde_cfg->has_hdr_plus = true;
|
|
@@ -4631,10 +4596,6 @@ static int _sde_hardware_post_caps(struct sde_mdss_cfg *sde_cfg,
|
|
|
sde_cfg->sspp[i].sblk->maxvdeciexp);
|
|
|
}
|
|
|
|
|
|
- if (sde_cfg->has_qos_fl_nocalc)
|
|
|
- set_bit(SDE_PERF_SSPP_QOS_FL_NOCALC,
|
|
|
- &sde_cfg->sspp[i].perf_features);
|
|
|
-
|
|
|
/*
|
|
|
* set sec-ui blocked SSPP feature flag based on blocked
|
|
|
* xin-mask if sec-ui-misr feature is enabled;
|
|
@@ -4712,10 +4673,10 @@ void sde_hw_catalog_deinit(struct sde_mdss_cfg *sde_cfg)
|
|
|
kfree(sde_cfg->limit_cfg[i].value_cfg);
|
|
|
}
|
|
|
|
|
|
- for (i = 0; i < SDE_QOS_LUT_USAGE_MAX; i++) {
|
|
|
- kfree(sde_cfg->perf.sfe_lut_tbl[i].entries);
|
|
|
- kfree(sde_cfg->perf.qos_lut_tbl[i].entries);
|
|
|
- }
|
|
|
+ kfree(sde_cfg->perf.qos_refresh_rate);
|
|
|
+ kfree(sde_cfg->perf.danger_lut);
|
|
|
+ kfree(sde_cfg->perf.safe_lut);
|
|
|
+ kfree(sde_cfg->perf.creq_lut);
|
|
|
|
|
|
kfree(sde_cfg->dma_formats);
|
|
|
kfree(sde_cfg->cursor_formats);
|
|
@@ -4755,6 +4716,10 @@ struct sde_mdss_cfg *sde_hw_catalog_init(struct drm_device *dev, u32 hw_rev)
|
|
|
if (rc)
|
|
|
goto end;
|
|
|
|
|
|
+ rc = sde_qos_parse_dt(np, sde_cfg);
|
|
|
+ if (rc)
|
|
|
+ goto end;
|
|
|
+
|
|
|
rc = sde_rot_parse_dt(np, sde_cfg);
|
|
|
if (rc)
|
|
|
goto end;
|