This change sets the regulator voltage to zero for all
those regulators which support voltage scaling before
disabling the regulator. Failing to do so causes the regulator
vote to set to the last min value specified in the previous
set voltage call.
Additionally modified the config regulator api and renamed to
get regulator because of the above change.
Change-Id: Ie4c4842db0c08a4d98926ed79503cf84e4d5762a
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
msm_drv should be probe deferred until rsc driver
probe is done. OF_POPULATED flag only checks if platform
driver is registered and hence additional condition to
check if driver is attached to this device, is needed.
Change-Id: I070965cc8d3ba3984032ad3704ec86066680eef0
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Make msm_drm into single module and all child driver
registers and unregisters are handled from parent's
register and unregister respectively.
Change-Id: I017513d1de3b6b25dd5543d7fa7741c0bac1740d
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
sync_state driver disables any resources that
don't have any votes after driver probe is completed.
Move MDSS resource votes to probe so that any resources
that are needed for continuous splash are intact until
the bind of all the components is complete.
Change-Id: I0056bf1ec56bcd6a1b620a81143d4b49d7ea2921
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Add vote for panel regulators in dsi probe to make sure
panel regulators are ON until dsi bind is completed
for cont-splash enabled usecase. Remove this panel regulator
vote when dsi component bind is done.
Change-Id: I0b1d43fa1b16385712abc1d8aaa0e778f31ba634
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Store full or partial static image in system cache (L3 cache)
for video mode primary display. Added additional commit to
crtc commit thread to transition to read cache state.
The change also updates llcc APIs to support generic functionality.
Change-Id: I6b2a45da946d7e0e0b326da9d214be3f01a9420e
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
A new position control register field has been added to the
DSPP PCC on Lahaina. This field controls whether PCC is invoked
before or after GAMUT mapping.
Introduce new PCC control logic to set the PCC position based on
the new PCC_BEFORE flag. Older versions of the PCC control function
now clear all flags to ensure backwards compatibility.
Change-Id: I0a33604111b755e0a0ccf1864a57b17cc9071e3f
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
A new position control register has been added to the DSPP PCC
on Lahaina. This register controls whether PCC is invoked
before or after GAMUT mapping.
Introduce a PCC UAPI flag to indicate if PCC should be placed
before the GAMUT block. By default PCC will be placed after
GAMUT.
Change-Id: I0bcc35e0ce7f87c7fa29922a6a485abe479d893a
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
This change addresses out of range and null checks in
sde and dp driver.
Change-Id: I142196d7394f0bf0abab1bfa89abfd784a5521c8
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
Msm_drv device node has dependency on sde_rsc device
node for power resource enable if sde_rsc device
device is enabled. This change moves the msm_drv device
to probe defer state during component addition if
sde_rsc device is not probed yet. It also removes
the master_drm device node access from sde_rsc device.
Change-Id: Ibb7457279b3376f45e82e5c9373aabd84a37ed36
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Add scaling linewidth variable and logic changes to get
valid max linewidth values for inline rotation and scaling.
Modify linewidth check to compare with scaler source width.
Change-Id: I7c63175e568ecb524f9cdf8ada1d7c6fdc999236
Signed-off-by: Thomas Dedinsky <tdedinsk@codeaurora.org>
This change updates plane's dirty flag with QoS
value to ensure QoS gets reprogrammed with new FPS
settings. This is required as QoS values will change
with FPS.
Change-Id: I377b99da2a640d375bd48477f149197b332e7f7b
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Updating qos remap updates requires reading registers to update values,
this adds additional CPU processing when in reality this update
is only needed once.
Bug: 142504774
Change-Id: Iec8d4dfd858b0602db7d2275b6b716dbcffe0d2f
(cherry picked from commit dbd1cfbc21db4b9bd4f1a4fc234cedc314fa1265)
Signed-off-by: Adrian Salido <salidoa@google.com>
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Perf tuning mode can be updated through debugfs and this should
be used to reflect the core clock rate.
Change-Id: I313d079f0b8013f43f4b293c6400f34eaf56b6d2
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Dim layer clearing/setup requires reading registers in order to update
value, doing this add additional CPU processing when it's not really
needed. Add logic to only do the updates only when needed.
Bug: 142504774
Change-Id: I23bcbe39575de35c387cfb7d2b9dc993525e4f98
Signed-off-by: Adrian Salido <salidoa@google.com>
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
This change calls setup on blend configuration per stage
instead of per plane per crtc mixer. This avoids unnecessary
register programming if two planes are in the same stage.
Change-Id: I7481270edad13a4182352e72d5d2ab8941de0ae5
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
This change introduces pre-downscaling values to the path where
these values are not provided by userspace. Currently, pre-downscaling
is only allowed by a factor of 2.2 in the x direction. With this
change pre-downscaling will support >2.2 up to 4 in the x direction.
Change-Id: I04d1b07243a5973e9338ea2a212280985b31b6a3
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Add xlogs to capture the secure state information of
each of the planes during mixer setup.
Change-Id: I5d60fb4287b13b3ba5a78c6b858dd244ebeb18aa
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
When there is a race condition between DMS seamless transition and
drm_wait_vblank_ioctl, the latter gets deregistered for vblank
handle as drm_crtc_vblank_on call in crtc enbale increments vblank
count. This change avoids drm_crtc_vblank_on call during seamless
transition when crtc is already enabled as it is not required.
Change-Id: I0b9327a98cef00405b5b94e24a3fd15205339cfc
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
During stability tests there are cases where smmu faults are
seen due to direct transition from secure display to secure
camera without smmu ATTACHED state. Added atomic check to avoid
such transitions.
Change-Id: I307e342f35c6e7dab82902fa77e3a5c0c082f4e4
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
VFP or HFP is adjusted to achieve constant fps during dynamic
DSI clock switch. This feature is not supported for command
mode. So, add check to skip porch calculation for command mode.
Change-Id: I5fa76d6536a55b2a19f24c0e14b6861e1f4c8f25
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
This change updates the parsing of timing nodes to check
the mode of operation as video or command. In command mode,
for each timing node, num of supported dfps rate is always
one. Accordingly, update the num_dfps_rate to 1 for
command mode.
Change-Id: I5098c7e0d4d2320609d6e10031eaef78c1d8b3c1
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Panel's physical width/height larger than 255mm is getting
truncated due to type conversion into smaller type.
Change-Id: I826fb2db542146c07d8379951563430b7da8288c
Signed-off-by: Rajeev Nandan <rajeevny@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Add support to allow creation of debugfs node only if
CONFIG_DEBUG_FS is enabled.
Change-Id: I1ae2c4188a99e3ed88f59fc021efc01407bf942d
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
There are some scenarios where a dfps request
during cwb session will result in cwb
encoder not getting disabled once the cwb
session is over. Add support to fail the
commit if any VRR or dynamic clock change
request is received during CWB transitions
to handle this.
Change-Id: Id3f192f79eac4ad0d7301bd34f7151fec243d685
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
DSI interrupt may be destroyed before it is disabled, it will cause to
the interrupt count can't be cleared, so subtrace DSI interrupt count
in disable function even it was destroyed.
Change-Id: I430b0281957db588c7405d5775d0c10f2f498b36
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Optimize pre mode switch panel command by transferring async. This
removes the time waited until subsequent dma_done irq.
Change-Id: I2e2516fdd641e85d1f1b221a6ea7999c868edf00
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
This change fixes the usecase where dsi msg flags validated only
during command transfer. This fix maintains the flags between
transfer and trigger calls. It also adds a new async override
flag to be used to bypass validate function.
Change-Id: Ie12acd3d7b01099bba65ca37cec61091408b81c5
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Add support to allow creation of debugfs node only if
CONFIG_DEBUG_FS is enabled.
Change-Id: Iaeaf51b3654c9458cf8131a9756e6b905007c4ae
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
