There are only 2 SFE cores that can connect to 3 FULL CSIDs.
In addition to this it's possible to have concurrent QCFA & sHDR
pipelines. To accommodate such use-cases try acquiring SFE
of higher index for QCFA use-cases and start from SFE0 for fetch
engine based use-cases. In case of dualSFE assign SFE of lower
index to master CSID.
CRs-Fixed: 2841729
Change-Id: I35f23a52f81e97a974b8670da60dc9dbc6ef144f
Signed-off-by: Karthik Anantha Ram <kartanan@codeaurora.org>
Add blob to allow userland to configure BW limter for IFE/SFE
WMs. Deprecate usage of BW limiter field in UBWC blob.
CRs-Fixed: 2841729
Change-Id: Id39414e2a6f9e9f9f4ae33aa245f3ab6f3ad0f45
Signed-off-by: Karthik Anantha Ram <kartanan@codeaurora.org>
This change upadates the image address programming for 36bit
iova, both on read and write engine.
CRs-Fixed: 2893978
Change-Id: I37f556191b840ba794e7373d9aea5831dc90ab1b
Signed-off-by: Vikram Sharma <vikramsa@codeaurora.org>
This change reset the slot when the next req is applied, it
should be caused by some exception before, we need to reset
this slot in case we applied wrong req to sub devices.
CRs-Fixed: 2949657
Change-Id: I0b5f7b1d8450ed355701090b185812fb7a6b6e06
Signed-off-by: Depeng Shao <depengs@codeaurora.org>
Correct the open requests count decrement logic.
Open request count decrements even when there is
no requests in the higher Pipeline_delay devices,
making the open request count negative.
CRs-Fixed: 2912147
Change-Id: If2d72f59a96290a2ccff59665af323da4329f9f4
Signed-off-by: Jigar Agrawal <jigar@codeaurora.org>
This change adds validity check for ife out res. If ife out res is
NULL we can run into crash/issues.
CRs-Fixed: 2915741
Change-Id: I8722b2a4e2634bda42f0080e00bf09050bbd6b91
Signed-off-by: Vikram Sharma <vikramsa@codeaurora.org>
Avoid unsubscribing for discard trigger irq in th, which leads
to freeing evt_handler structure resulting in usage of a
dangling pointer thereafter in top half.
CRs-Fixed: 2841729
Change-Id: I93e600ba32524c2df563c03b18819cb636b48826
Signed-off-by: Karthik Anantha Ram <kartanan@codeaurora.org>
The request id is updated to 0 when the substate is
BUBBLE, then the original request id can't be notified
to UMD, since the reported_req_id is already updated to
the original request id. This change updateds the
reported_req_id only when the final request id is
valid.
CRs-Fixed: 2932602
Change-Id: Ib30f849782283c647f784cfb0deb49bee3d04287
Signed-off-by: Depeng Shao <depengs@codeaurora.org>
This change adds the batch mode support in CRE
CRs-Fixed: 2893978
Change-Id: I9a8f9f1f2f555bc875b3d48485b4458a825dbdbd
Signed-off-by: Vikram Sharma <vikramsa@codeaurora.org>
Change module tag from SFE to ISP in IFE bus file.
Also update error code to success for bus debug config.
CRs-Fixed: 2841729
Change-Id: I0c648aeef2864cd55a0940c73235087c7de9d910
Signed-off-by: Karthik Anantha Ram <kartanan@codeaurora.org>
Prevent potential errors on starting path after flush by issuing start
command after configuring RX.
CRs-Fixed: 2846451
Change-Id: Ib72fc9f0b8397f360f5bed73379ec65310cdc609
Signed-off-by: Anand Ravi <ananravi@codeaurora.org>
During disabling the CSI2, do not reset the rx registers to 0.
This can result in random behaviors if the phy is streaming.
Just disable the IRQs and let the stream off call handle the
reset part.
CRs-Fixed: 2946879
Change-Id: I936ea4026c72033a665958281d7f07751b4ae708
Signed-off-by: Gaurav Jindal <gjindal@codeaurora.org>
Fixes for the issues found in Unit testing of CRE.
CRs-Fixed: 2893978
Change-Id: I7b8061cf2fd4693bde084a003bc101be1cbde1d1
Signed-off-by: Vikram Sharma <vikramsa@codeaurora.org>
Modify check for multi vc-dt. The change also programs the
right value for dynamic switch select.
CRs-Fixed: 2841729
Change-Id: I9b7459f77d65a83f3d559967a04d81357f7c6de3
Signed-off-by: Karthik Anantha Ram <kartanan@codeaurora.org>
Change mode of all RDI WMs to line based mode to account for
SFE ZSL RAW 80 byte stride alignment. This change is to make
it generic for all RAW outputs. If the mode needs to be made
frame based, userland will override it.
CRs-Fixed: 2841729
Change-Id: I87705c2b035df905d76fbbe80e170991c2230135
Signed-off-by: Karthik Anantha Ram <kartanan@codeaurora.org>
Lane enable needs to be program with header tag LANE_ENABLE. This
change adds the tag associated with the correct register offset.
CRs-Fixed: 2929063
Change-Id: Ibbb8e4e0fc2d2de8e9c9f193b3d31ba5492b22f4
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
Add support to dump the 3ph and 2ph specific
status registers. Following debugfs command can
be used to enable status register dump for csiphy0:
adb shell
"echo 1>/sys/kernel/debug/camera_csiphy/csiphy0_en_status_reg_dump"
CRs-Fixed: 2942364
Change-Id: If8d57a9e54c9e509de35f6a57d7baa1895be7779
Signed-off-by: Jigar Agrawal <jigar@codeaurora.org>
It's possible that for a given use-case the pipeline is
CSID2->SFE0->IFE2, in the event of an overflow we need to log
the right SFE's debug registers. Unlike IFE we cannot use
CSID hw_idx to find the SFE core in the pipeline. The change
ensures we log the connected SFE core's debug registers.
CRs-Fixed: 2841729
Change-Id: I2beda7496b95a2b7c1aafc8cfcfcdde662c31898
Signed-off-by: Karthik Anantha Ram <kartanan@codeaurora.org>
