Merge "msm: camera: cpas: fix for Shima-CAMNOC RDI latency buffer corruption" into camera-kernel.lnx.5.0

drivers/cam_cpas/cpas_top/cpastop_v570_200.h

@@ -272,7 +272,7 @@ static struct cam_camnoc_specific
 			.access_type = CAM_REG_TYPE_READ_WRITE,
 			.masked_value = 0,
 			.offset = 0xA30, /* IFE_LINEAR_PRIORITYLUT_LOW */
-			.value = 0x66665433,
+			.value = 0x66666666,
 		},
 		.priority_lut_high = {
 			.enable = true,
@@ -413,7 +413,7 @@ static struct cam_camnoc_specific
 			.access_type = CAM_REG_TYPE_READ_WRITE,
 			.masked_value = 0,
 			.offset = 0x1430, /* IFE_RDI_WR_0_PRIORITYLUT_LOW */
-			.value = 0x66665433,
+			.value = 0x66666666,
 		},
 		.priority_lut_high = {
 			.enable = true,
@@ -487,7 +487,7 @@ static struct cam_camnoc_specific
 			.access_type = CAM_REG_TYPE_READ_WRITE,
 			.masked_value = 0,
 			.offset = 0x1A30, /* IFE_UBWC_STATS_0_PRIORITYLUT_LOW */
-			.value = 0x66665433,
+			.value = 0x66666666,
 		},
 		.priority_lut_high = {
 			.enable = true,
@@ -622,14 +622,14 @@ static struct cam_camnoc_specific
 			.access_type = CAM_REG_TYPE_READ_WRITE,
 			.masked_value = 0,
 			.offset = 0x2220, /* IPE0_RD_QOSGEN_SHAPING_LOW */
-			.value = 0x13131313,
+			.value = 0x12121212,
 		},
 		.qosgen_shaping_high = {
 			.enable = true,
 			.access_type = CAM_REG_TYPE_READ_WRITE,
 			.masked_value = 0,
 			.offset = 0x2224, /* IPE0_RD_QOSGEN_SHAPING_HIGH */
-			.value = 0x13131313,
+			.value = 0x12121212,
 		},
 	},
 	{
@@ -690,19 +690,20 @@ static struct cam_camnoc_specific
 			.offset = 0x2308, /* IPE1_BPS_RD_QOSGEN_MAINCTL */
 			.value = 0x2,
 		},
+		//  TITAN_A_CAMNOC_cam_noc_amm_nrt_niu_0_qosgen_Shaping_Low
 		.qosgen_shaping_low = {
 			.enable = true,
 			.access_type = CAM_REG_TYPE_READ_WRITE,
 			.masked_value = 0,
 			.offset = 0x2320, /* IPE1_BPS_RD_QOSGEN_SHAPING_LOW */
-			.value = 0x24242424,
+			.value = 0x23232323,
 		},
 		.qosgen_shaping_high = {
 			.enable = true,
 			.access_type = CAM_REG_TYPE_READ_WRITE,
 			.masked_value = 0,
 			.offset = 0x2324, /* IPE1_BPS_RD_QOSGEN_SHAPING_HIGH */
-			.value = 0x24242424,
+			.value = 0x23232323,
 		},
 	},
 	{

drivers/cam_icp/icp_hw/ipe_hw/ipe_core.c

@@ -432,7 +432,7 @@ int cam_ipe_process_cmd(void *device_priv, uint32_t cmd_type,
 		}
 		CAM_DBG(CAM_PERF, "clock rate %d", clk_rate);
 
-		rc = cam_ipe_update_clk_rate(soc_info, clk_rate);
+		rc = cam_ipe_update_clk_rate(soc_info, &clk_rate);
 		if (rc)
 			CAM_ERR(CAM_PERF, "Failed to update clk %d", clk_rate);
 

drivers/cam_icp/icp_hw/ipe_hw/ipe_soc.c

@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
  */
 
 #include <linux/io.h>
@@ -140,7 +140,7 @@ int cam_ipe_disable_soc_resources(struct cam_hw_soc_info *soc_info,
 }
 
 int cam_ipe_update_clk_rate(struct cam_hw_soc_info *soc_info,
-	uint32_t clk_rate)
+	uint32_t *clk_rate)
 {
 	int32_t src_clk_idx;
 
@@ -151,14 +151,14 @@ int cam_ipe_update_clk_rate(struct cam_hw_soc_info *soc_info,
 
 	if ((soc_info->clk_level_valid[CAM_TURBO_VOTE] == true) &&
 		(soc_info->clk_rate[CAM_TURBO_VOTE][src_clk_idx] != 0) &&
-		(clk_rate > soc_info->clk_rate[CAM_TURBO_VOTE][src_clk_idx])) {
+		(*clk_rate > soc_info->clk_rate[CAM_TURBO_VOTE][src_clk_idx])) {
 		CAM_DBG(CAM_PERF, "clk_rate %d greater than max, reset to %d",
-			clk_rate,
+			*clk_rate,
 			soc_info->clk_rate[CAM_TURBO_VOTE][src_clk_idx]);
-		clk_rate = soc_info->clk_rate[CAM_TURBO_VOTE][src_clk_idx];
+		*clk_rate = soc_info->clk_rate[CAM_TURBO_VOTE][src_clk_idx];
 	}
 
-	return cam_soc_util_set_src_clk_rate(soc_info, clk_rate);
+	return cam_soc_util_set_src_clk_rate(soc_info, *clk_rate);
 }
 
 int cam_ipe_toggle_clk(struct cam_hw_soc_info *soc_info, bool clk_enable)

drivers/cam_icp/icp_hw/ipe_hw/ipe_soc.h

@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
  */
 
 #ifndef CAM_IPE_SOC_H
@@ -21,7 +21,7 @@ int cam_ipe_get_gdsc_control(struct cam_hw_soc_info *soc_info);
 int cam_ipe_transfer_gdsc_control(struct cam_hw_soc_info *soc_info);
 
 int cam_ipe_update_clk_rate(struct cam_hw_soc_info *soc_info,
-	uint32_t clk_rate);
+	uint32_t *clk_rate);
 int cam_ipe_toggle_clk(struct cam_hw_soc_info *soc_info, bool clk_enable);
 void cam_ipe_deinit_soc_resources(struct cam_hw_soc_info *soc_info);
 #endif /* CAM_IPE_SOC_H */