msm: camera: cre: unit test fixes

Fixes for the issues found in Unit testing of CRE.

CRs-Fixed: 2893978
Change-Id: I7b8061cf2fd4693bde084a003bc101be1cbde1d1
Signed-off-by: Vikram Sharma <[email protected]>

drivers/cam_cre/cam_cre_dev.c

@@ -103,6 +103,7 @@ static int cam_cre_subdev_component_bind(struct device *dev,
 	int iommu_hdl = -1;
 	struct platform_device *pdev = to_platform_device(dev);
 
+	CAM_DBG(CAM_CRE, "CRE Subdev Component bind");
 	g_cre_dev.sd.internal_ops = &cam_cre_subdev_internal_ops;
 	rc = cam_subdev_probe(&g_cre_dev.sd, pdev, CAM_CRE_DEV_NAME,
 		CAM_CRE_DEVICE_TYPE);
@@ -191,13 +192,11 @@ static int cam_cre_subdev_probe(struct platform_device *pdev)
 {
 	int rc = 0;
 
-	CAM_DBG(CAM_CRE, "Adding CRE component");
+	CAM_DBG(CAM_CRE, "Adding CRE sub component");
 	rc = component_add(&pdev->dev, &cam_cre_subdev_component_ops);
 	if (rc)
 		CAM_ERR(CAM_CRE, "failed to add component rc: %d", rc);
-
 	return rc;
-
 }
 
 static const struct of_device_id cam_cre_subdev_dt_match[] = {
@@ -220,12 +219,12 @@ struct platform_driver cam_cre_subdev_driver = {
 
 int cam_cre_subdev_init_module(void)
 {
-	return platform_driver_register(&cam_cre_driver);
+	return platform_driver_register(&cam_cre_subdev_driver);
 }
 
 void cam_cre_subdev_exit_module(void)
 {
-	platform_driver_unregister(&cam_cre_driver);
+	platform_driver_unregister(&cam_cre_subdev_driver);
 }
 
 MODULE_DESCRIPTION("MSM CRE driver");

drivers/cam_cre/cam_cre_hw_mgr/cam_cre_hw_mgr.c

@@ -135,7 +135,11 @@ static int cam_cre_mgr_process_cmd_io_buf_req(struct cam_cre_hw_mgr *hw_mgr,
 	for (i = 0; i < cre_request->num_batch; i++) {
 		for (j = 0; j < packet->num_io_configs; j++) {
 			cre_request->num_io_bufs[i]++;
-			acq_io_buf = cam_cre_mgr_get_rsc(ctx_data, &io_cfg_ptr[i]);
+			acq_io_buf = cam_cre_mgr_get_rsc(ctx_data, &io_cfg_ptr[j]);
+			if (!acq_io_buf) {
+				CAM_ERR(CAM_CRE, "get rsc failed");
+				return -EINVAL;
+			}
 
 			cre_request->io_buf[i][j] =
 				kzalloc(sizeof(struct cre_io_buf), GFP_KERNEL);
@@ -1560,10 +1564,6 @@ cre_irq_set_failed:
 			if (hw_mgr->cre_dev_intf[i]->hw_ops.deinit(
 				hw_mgr->cre_dev_intf[i]->hw_priv, NULL, 0))
 				CAM_ERR(CAM_CRE, "CRE deinit fail");
-			if (hw_mgr->cre_dev_intf[i]->hw_ops.stop(
-				hw_mgr->cre_dev_intf[i]->hw_priv,
-				NULL, 0))
-				CAM_ERR(CAM_CRE, "CRE stop fail");
 		}
 	}
 end:
@@ -1693,17 +1693,6 @@ static int cam_cre_mgr_release_hw(void *hw_priv, void *hw_release_args)
 	if (rc)
 		CAM_ERR(CAM_CRE, "CRE remove bw failed: %d", rc);
 
-	if (!hw_mgr->cre_ctx_cnt) {
-		for (i = 0; i < cre_hw_mgr->num_cre; i++) {
-			dev_intf = hw_mgr->cre_dev_intf[i];
-			rc = dev_intf->hw_ops.stop(
-				hw_mgr->cre_dev_intf[i]->hw_priv,
-				NULL, 0);
-			if (rc)
-				CAM_ERR(CAM_CRE, "stop failed: %d", rc);
-		}
-	}
-
 	mutex_unlock(&hw_mgr->hw_mgr_mutex);
 
 	CAM_DBG(CAM_CRE, "Release done for ctx_id %d", ctx_id);

drivers/cam_cre/cam_cre_hw_mgr/cam_cre_hw_mgr.h

@@ -95,7 +95,7 @@ struct cam_cre_hw_intf_data {
 };
 
 /**
- * struct cam_ctx_clk_info
+ * struct cam_cre_ctx_clk_info
  * @curr_fc: Context latest request frame cycles
  * @rt_flag: Flag to indicate real time request
  * @base_clk: Base clock to process the request
@@ -104,7 +104,7 @@ struct cam_cre_hw_intf_data {
  * @num_paths: Number of valid AXI paths
  * @axi_path: ctx based per path bw vote
  */
-struct cam_ctx_clk_info {
+struct cam_cre_ctx_clk_info {
 	uint32_t curr_fc;
 	uint32_t rt_flag;
 	uint32_t base_clk;
@@ -357,7 +357,7 @@ struct cam_cre_ctx {
 	uint64_t last_req_time;
 	struct cam_req_mgr_timer *req_watch_dog;
 	uint32_t req_watch_dog_reset_counter;
-	struct cam_ctx_clk_info clk_info;
+	struct cam_cre_ctx_clk_info clk_info;
 	struct cam_req_mgr_timer *clk_watch_dog;
 	struct cre_top *cre_top;
 	uint32_t clk_watch_dog_reset_counter;

drivers/cam_cre/cam_cre_hw_mgr/cre_hw/bus_rd/cre_bus_rd.c

@@ -49,37 +49,7 @@ static int cam_cre_bus_rd_release(struct cam_cre_hw *cam_cre_hw_info,
 	return 0;
 }
 
-static int cam_cre_bus_is_rm_enabled(
-	struct cam_cre_request *cre_request,
-	uint32_t batch_idx,
-	uint32_t rm_id)
-{
-	int i, k;
-	struct cre_io_buf *io_buf;
-	struct cre_bus_in_port_to_rm *in_port_to_rm;
-
-	if (batch_idx >= CRE_MAX_BATCH_SIZE) {
-		CAM_ERR(CAM_CRE, "Invalid batch idx: %d", batch_idx);
-		return -EINVAL;
-	}
-
-	for (i = 0; i < cre_request->num_io_bufs[batch_idx]; i++) {
-		io_buf = cre_request->io_buf[batch_idx][i];
-		if (io_buf->direction != CAM_BUF_INPUT)
-			continue;
-		in_port_to_rm =
-			&bus_rd->in_port_to_rm[io_buf->resource_type - 1];
-		for (k = 0; k < io_buf->num_planes; k++) {
-			if (rm_id ==
-				in_port_to_rm->rm_port_id[k])
-				return true;
-		}
-	}
-
-	return false;
-}
-
-static uint32_t *cam_cre_bus_rd_update(struct cam_cre_hw *cam_cre_hw_info,
+static int cam_cre_bus_rd_update(struct cam_cre_hw *cam_cre_hw_info,
 	int32_t ctx_id, struct cre_reg_buffer *cre_reg_buf, int batch_idx,
 	int io_idx, struct cam_cre_dev_prepare_req *prepare)
 {
@@ -87,6 +57,7 @@ static uint32_t *cam_cre_bus_rd_update(struct cam_cre_hw *cam_cre_hw_info,
 	uint32_t req_idx, temp;
 	uint32_t rm_id;
 	uint32_t rsc_type;
+	uint32_t iova_base, iova_offset;
 	struct cam_hw_prepare_update_args *prepare_args;
 	struct cam_cre_ctx *ctx_data;
 	struct cam_cre_request *cre_request;
@@ -99,20 +70,19 @@ static uint32_t *cam_cre_bus_rd_update(struct cam_cre_hw *cam_cre_hw_info,
 	struct cre_bus_in_port_to_rm *in_port_to_rm;
 	struct cre_bus_rd_io_port_info *io_port_info;
 
-
 	if (ctx_id < 0 || !prepare) {
 		CAM_ERR(CAM_CRE, "Invalid data: %d %x", ctx_id, prepare);
-		return NULL;
+		return -EINVAL;
 	}
 
 	if (batch_idx >= CRE_MAX_BATCH_SIZE) {
 		CAM_ERR(CAM_CRE, "Invalid batch idx: %d", batch_idx);
-		return NULL;
+		return -EINVAL;
 	}
 
 	if (io_idx >= CRE_MAX_IO_BUFS) {
 		CAM_ERR(CAM_CRE, "Invalid IO idx: %d", io_idx);
-		return NULL;
+		return -EINVAL;
 	}
 
 	prepare_args = prepare->prepare_args;
@@ -161,10 +131,19 @@ static uint32_t *cam_cre_bus_rd_update(struct cam_cre_hw *cam_cre_hw_info,
 			(rd_reg->offset + rd_reg_client->ccif_meta_data),
 			temp);
 
-		/* Address of the Image */
+		/*
+		 * As CRE have 36 Bit addressing support Image Address
+		 * register will have 32 bit MSB of 36 bit iova.
+		 * and addr_config will have 8 bit byte offset.
+		 */
+		iova_base = (io_buf->p_info[k].iova_addr & 0xffffff00) >> 8;
 		update_cre_reg_set(cre_reg_buf,
 			rd_reg->offset + rd_reg_client->img_addr,
-			io_buf->p_info[k].iova_addr);
+			iova_base);
+		iova_offset = io_buf->p_info[k].iova_addr & 0xff;
+		update_cre_reg_set(cre_reg_buf,
+			rd_reg->offset + rd_reg_client->addr_cfg,
+			iova_offset);
 
 		/* Buffer size */
 		update_cre_reg_set(cre_reg_buf,
@@ -202,51 +181,7 @@ static uint32_t *cam_cre_bus_rd_update(struct cam_cre_hw *cam_cre_hw_info,
 				temp);
 	}
 
-
-	return (uint32_t *)cre_reg_buf;
-}
-
-static uint32_t *cam_cre_bus_rm_disable(struct cam_cre_hw *cam_cre_hw_info,
-	int32_t ctx_id, struct cam_cre_dev_prepare_req *prepare,
-	int batch_idx, int rm_idx,
-	struct cre_reg_buffer *cre_reg_buf)
-{
-	uint32_t req_idx;
-	struct cam_cre_ctx *ctx_data;
-	struct cre_bus_rd_ctx *bus_rd_ctx;
-	struct cam_cre_bus_rd_reg *rd_reg;
-	struct cam_cre_bus_rd_client_reg *rd_reg_client;
-
-
-	if (ctx_id < 0 || !prepare) {
-		CAM_ERR(CAM_CRE, "Invalid data: %d %x", ctx_id, prepare);
-		return NULL;
-	}
-
-	if (batch_idx >= CRE_MAX_BATCH_SIZE) {
-		CAM_ERR(CAM_CRE, "Invalid batch idx: %d", batch_idx);
-		return NULL;
-	}
-
-	if (rm_idx >= CAM_CRE_INPUT_IMAGES_MAX) {
-		CAM_ERR(CAM_CRE, "Invalid read client: %d", rm_idx);
-		return NULL;
-	}
-
-	ctx_data = prepare->ctx_data;
-	req_idx = prepare->req_idx;
-
-	bus_rd_ctx = bus_rd->bus_rd_ctx[ctx_id];
-	rd_reg = cam_cre_hw_info->bus_rd_reg_offset;
-
-	rd_reg_client = &rd_reg->rd_clients[rm_idx];
-
-	/* Core cfg: enable, Mode */
-	update_cre_reg_set(cre_reg_buf,
-		rd_reg->offset + rd_reg_client->core_cfg,
-		0);
-
-	return (uint32_t *)cre_reg_buf;
+	return 0;
 }
 
 static int cam_cre_bus_rd_prepare(struct cam_cre_hw *cam_cre_hw_info,
@@ -255,7 +190,6 @@ static int cam_cre_bus_rd_prepare(struct cam_cre_hw *cam_cre_hw_info,
 	int rc = 0;
 	int i, j;
 	uint32_t req_idx;
-	int is_rm_enabled;
 	struct cam_cre_dev_prepare_req *prepare;
 	struct cam_cre_ctx *ctx_data;
 	struct cam_cre_request *cre_request;
@@ -264,7 +198,6 @@ static int cam_cre_bus_rd_prepare(struct cam_cre_hw *cam_cre_hw_info,
 	struct cam_cre_bus_rd_reg *rd_reg;
 	struct cam_cre_bus_rd_reg_val *rd_reg_val;
 	struct cre_reg_buffer *cre_reg_buf;
-	uint32_t *ret;
 
 	int temp;
 
@@ -295,34 +228,10 @@ static int cam_cre_bus_rd_prepare(struct cam_cre_hw *cam_cre_hw_info,
 			CAM_DBG(CAM_CRE, "batch:%d iobuf:%d direction:%d",
 				i, j, io_buf->direction);
 
-			ret = cam_cre_bus_rd_update(cam_cre_hw_info,
+			rc = cam_cre_bus_rd_update(cam_cre_hw_info,
 				ctx_id, cre_reg_buf, i, j, prepare);
-			if (!ret) {
-				rc = -EINVAL;
+			if (rc)
 				goto end;
-			}
-		}
-	}
-
-	/* Disable RMs which are not enabled */
-	for (i = 0; i < cre_request->num_batch; i++) {
-		for (j = 0; j < rd_reg_val->num_clients; j++) {
-			is_rm_enabled = cam_cre_bus_is_rm_enabled(
-				cre_request, i, j);
-			if (is_rm_enabled < 0) {
-				rc = -EINVAL;
-				goto end;
-			}
-			if (is_rm_enabled)
-				continue;
-
-			ret = cam_cre_bus_rm_disable(cam_cre_hw_info,
-				ctx_id, prepare, i, j,
-				cre_reg_buf);
-			if (!ret) {
-				rc = -EINVAL;
-				goto end;
-			}
 		}
 	}
 

drivers/cam_cre/cam_cre_hw_mgr/cre_hw/bus_wr/cre_bus_wr.c

@@ -27,7 +27,6 @@
 #include "cre_bus_wr.h"
 
 static struct cre_bus_wr *wr_info;
-
 #define update_cre_reg_set(cre_reg_buf, off, val) \
 	do {                                           \
 		cre_reg_buf->wr_reg_set[cre_reg_buf->num_wr_reg_set].offset = (off); \
@@ -35,30 +34,6 @@ static struct cre_bus_wr *wr_info;
 		cre_reg_buf->num_wr_reg_set++; \
 	} while (0)
 
-static int cam_cre_bus_en_port_idx(
-	struct cam_cre_request *cre_request,
-	uint32_t batch_idx,
-	uint32_t output_port_id)
-{
-	int i;
-	struct cre_io_buf *io_buf;
-
-	if (batch_idx >= CRE_MAX_BATCH_SIZE) {
-		CAM_ERR(CAM_CRE, "Invalid batch idx: %d", batch_idx);
-		return -EINVAL;
-	}
-
-	for (i = 0; i < cre_request->num_io_bufs[batch_idx]; i++) {
-		io_buf = cre_request->io_buf[batch_idx][i];
-		if (io_buf->direction != CAM_BUF_OUTPUT)
-			continue;
-		if (io_buf->resource_type == output_port_id)
-			return i;
-	}
-
-	return -EINVAL;
-}
-
 static int cam_cre_bus_wr_out_port_idx(uint32_t output_port_id)
 {
 	int i;
@@ -103,7 +78,7 @@ static int cam_cre_bus_wr_release(struct cam_cre_hw *cam_cre_hw_info,
 	return 0;
 }
 
-static uint32_t *cam_cre_bus_wr_update(struct cam_cre_hw *cam_cre_hw_info,
+static int cam_cre_bus_wr_update(struct cam_cre_hw *cam_cre_hw_info,
 	int32_t ctx_id, struct cam_cre_dev_prepare_req *prepare,
 	int batch_idx, int io_idx,
 	struct cre_reg_buffer *cre_reg_buf)
@@ -114,6 +89,7 @@ static uint32_t *cam_cre_bus_wr_update(struct cam_cre_hw *cam_cre_hw_info,
 	uint32_t req_idx;
 	uint32_t temp = 0;
 	uint32_t wm_port_id;
+	uint32_t iova_base, iova_offset;
 	struct cam_hw_prepare_update_args *prepare_args;
 	struct cam_cre_ctx *ctx_data;
 	struct cam_cre_request *cre_request;
@@ -127,17 +103,17 @@ static uint32_t *cam_cre_bus_wr_update(struct cam_cre_hw *cam_cre_hw_info,
 
 	if (ctx_id < 0 || !prepare) {
 		CAM_ERR(CAM_CRE, "Invalid data: %d %x", ctx_id, prepare);
-		return NULL;
+		return -EINVAL;
 	}
 
 	if (batch_idx >= CRE_MAX_BATCH_SIZE) {
 		CAM_ERR(CAM_CRE, "Invalid batch idx: %d", batch_idx);
-		return NULL;
+		return -EINVAL;
 	}
 
 	if (io_idx >= CRE_MAX_IO_BUFS) {
 		CAM_ERR(CAM_CRE, "Invalid IO idx: %d", io_idx);
-		return NULL;
+		return -EINVAL;
 	}
 
 	prepare_args = prepare->prepare_args;
@@ -161,7 +137,7 @@ static uint32_t *cam_cre_bus_wr_update(struct cam_cre_hw *cam_cre_hw_info,
 	if (out_port_idx < 0) {
 		CAM_ERR(CAM_CRE, "Invalid idx for rsc type: %d",
 			io_buf->resource_type);
-		return NULL;
+		return -EINVAL;
 	}
 	out_port_to_wm = &wr_info->out_port_to_wm[out_port_idx];
 	num_wm_ports = out_port_to_wm->num_wm;
@@ -183,10 +159,19 @@ static uint32_t *cam_cre_bus_wr_update(struct cam_cre_hw *cam_cre_hw_info,
 			wr_reg->offset + wr_reg_client->client_cfg,
 			temp);
 
-		/* Address of the Image */
+		/*
+		 * As CRE have 36 Bit addressing support Image Address
+		 * register will have 32 bit MSB of 36 bit iova.
+		 * and addr_config will have 8 bit byte offset.
+		 */
+		iova_base = (io_buf->p_info[k].iova_addr & 0xffffff00) >> 8;
 		update_cre_reg_set(cre_reg_buf,
 			wr_reg->offset + wr_reg_client->img_addr,
-			io_buf->p_info[k].iova_addr);
+			iova_base);
+		iova_offset = io_buf->p_info[k].iova_addr & 0xff;
+		update_cre_reg_set(cre_reg_buf,
+			wr_reg->offset + wr_reg_client->addr_cfg,
+			iova_offset);
 
 		/* Buffer size */
 		temp = 0;
@@ -225,60 +210,7 @@ static uint32_t *cam_cre_bus_wr_update(struct cam_cre_hw *cam_cre_hw_info,
 			temp);
 	}
 
-	return (uint32_t *)cre_reg_buf;
-}
-
-static uint32_t *cam_cre_bus_wm_disable(struct cam_cre_hw *cam_cre_hw_info,
-	int32_t ctx_id, struct cam_cre_dev_prepare_req *prepare,
-	int batch_idx, int io_idx,
-	struct cre_reg_buffer *cre_reg_buf)
-{
-	int k;
-	uint32_t num_wm_ports;
-	uint32_t req_idx;
-	uint32_t wm_port_id;
-	struct cam_cre_ctx *ctx_data;
-	struct cre_bus_wr_ctx *bus_wr_ctx;
-	struct cam_cre_bus_wr_reg *wr_reg;
-	struct cre_bus_out_port_to_wm *out_port_to_wm;
-	struct cam_cre_bus_wr_client_reg *wr_reg_client;
-
-
-	if (ctx_id < 0 || !prepare) {
-		CAM_ERR(CAM_CRE, "Invalid data: %d %x", ctx_id, prepare);
-		return NULL;
-	}
-
-	if (batch_idx >= CRE_MAX_BATCH_SIZE) {
-		CAM_ERR(CAM_CRE, "Invalid batch idx: %d", batch_idx);
-		return NULL;
-	}
-
-	ctx_data = prepare->ctx_data;
-	req_idx = prepare->req_idx;
-
-	bus_wr_ctx = wr_info->bus_wr_ctx[ctx_id];
-	wr_reg = cam_cre_hw_info->bus_wr_reg_offset;
-
-	CAM_DBG(CAM_CRE,
-		"req_idx = %d out_idx %d b %d",
-		req_idx, io_idx, batch_idx);
-
-	out_port_to_wm = &wr_info->out_port_to_wm[io_idx];
-	num_wm_ports = out_port_to_wm->num_wm;
-
-	for (k = 0; k < num_wm_ports; k++) {
-		/* frame level info */
-		wm_port_id = out_port_to_wm->wm_port_id[k];
-		wr_reg_client = &wr_reg->wr_clients[wm_port_id];
-
-		/* Core cfg: enable, Mode */
-		update_cre_reg_set(cre_reg_buf,
-			wr_reg->offset + wr_reg_client->client_cfg,
-			0);
-	}
-
-	return (uint32_t *)cre_reg_buf;
+	return 0;
 }
 
 static int cam_cre_bus_wr_prepare(struct cam_cre_hw *cam_cre_hw_info,
@@ -291,10 +223,8 @@ static int cam_cre_bus_wr_prepare(struct cam_cre_hw *cam_cre_hw_info,
 	struct cam_cre_ctx *ctx_data;
 	struct cam_cre_request *cre_request;
 	struct cre_io_buf *io_buf;
-	int io_buf_idx;
 	struct cre_bus_wr_ctx *bus_wr_ctx;
 	struct cre_reg_buffer *cre_reg_buf;
-	uint32_t *ret;
 
 	if (ctx_id < 0 || !data) {
 		CAM_ERR(CAM_CRE, "Invalid data: %d %x", ctx_id, data);
@@ -308,9 +238,8 @@ static int cam_cre_bus_wr_prepare(struct cam_cre_hw *cam_cre_hw_info,
 	cre_request = ctx_data->req_list[req_idx];
 	cre_reg_buf = &cre_request->cre_reg_buf;
 
-	CAM_DBG(CAM_CRE, "req_idx = %d req_id = %lld offset = %d",
-		req_idx, cre_request->request_id);
-
+	CAM_DBG(CAM_CRE, "req_idx = %d req_id = %lld num_io_bufs = %d",
+		req_idx, cre_request->request_id, cre_request->num_io_bufs[0]);
 
 	for (i = 0; i < cre_request->num_batch; i++) {
 		for (j = 0; j < cre_request->num_io_bufs[i]; j++) {
@@ -320,36 +249,11 @@ static int cam_cre_bus_wr_prepare(struct cam_cre_hw *cam_cre_hw_info,
 			if (io_buf->direction != CAM_BUF_OUTPUT)
 				continue;
 
-			ret = cam_cre_bus_wr_update(cam_cre_hw_info,
+			rc = cam_cre_bus_wr_update(cam_cre_hw_info,
 				ctx_id, prepare, i, j,
 				cre_reg_buf);
-			if (!ret) {
-				rc = -EINVAL;
+			if (rc)
 				goto end;
-			}
-		}
-	}
-
-	/* Disable WMs which are not enabled */
-	for (i = 0; i < cre_request->num_batch; i++) {
-		for (j = CRE_MAX_IN_RES; j <= CRE_MAX_OUT_RES; j++) {
-			io_buf_idx = cam_cre_bus_en_port_idx(cre_request, i, j);
-			if (io_buf_idx >= 0)
-				continue;
-
-			io_buf_idx = cam_cre_bus_wr_out_port_idx(j);
-			if (io_buf_idx < 0) {
-				CAM_ERR(CAM_CRE, "Invalid idx for rsc type:%d",
-					j);
-				return io_buf_idx;
-			}
-			ret = cam_cre_bus_wm_disable(cam_cre_hw_info,
-				ctx_id, prepare, i, io_buf_idx,
-				cre_reg_buf);
-			if (!ret) {
-				rc = -EINVAL;
-				goto end;
-			}
 		}
 	}
 
@@ -400,7 +304,8 @@ static int cam_cre_bus_wr_acquire(struct cam_cre_hw *cam_cre_hw_info,
 			rc = -EINVAL;
 			goto end;
 		}
-		out_port_to_wr = &wr_info->out_port_to_wm[out_port_idx];
+		CAM_DBG(CAM_CRE, "out_port_idx %d", out_port_idx);
+		out_port_to_wr = &wr_info->out_port_to_wm[out_port_idx - 1];
 		if (!out_port_to_wr->num_wm) {
 			CAM_DBG(CAM_CRE, "Invalid format for Input port");
 			rc = -EINVAL;

drivers/cam_cre/cam_cre_hw_mgr/cre_hw/cre_dev_intf.h

@@ -10,7 +10,6 @@
 #include "cam_cpas_api.h"
 #include "cre_top.h"
 
-
 #define CRE_HW_INIT            0x1
 #define CRE_HW_DEINIT          0x2
 #define CRE_HW_ACQUIRE         0x3
@@ -123,6 +122,9 @@ struct cam_cre_dev_prepare_req {
 	uint32_t req_idx;
 };
 
+int cam_cre_subdev_init_module(void);
+void cam_cre_subdev_exit_module(void);
+
 int cam_cre_top_process(struct cam_cre_hw *cam_cre_hw_info,
 	int32_t ctx_id, uint32_t cmd_id, void *data);
 

drivers/cam_cre/cam_cre_hw_mgr/cre_hw/cre_hw_100.h

@@ -132,7 +132,7 @@ struct cam_cre_bus_wr_reg_val bus_wr_reg_value = {
 		.bw_limit_en              = 0x1,
 		.bw_limit_en_mask         = 0x1,
 		.bw_limit_counter_mask    = 0x1fe,
-		.output_port_id           = 1,
+		.output_port_id           = CAM_CRE_OUTPUT_IMAGE,
 		.wm_port_id               = 1,
 	},
 };
@@ -178,6 +178,7 @@ struct cam_cre_bus_rd_reg_val bus_rd_reg_value = {
 		.misr_cfg_samp_mode_mask = 0x3,
 		.x_int_mask              = 0xffff,
 		.byte_offset_mask        = 0xff,
+		.input_port_id           = CAM_CRE_INPUT_IMAGE,
 		.rm_port_id              = 0x0,
 	},
 };

drivers/cam_utils/cam_debug_util.c

@@ -221,6 +221,9 @@ const char *cam_get_module_name(unsigned int module_id)
 	case CAM_SFE:
 		name = "CAM-SFE";
 		break;
+	case CAM_CRE:
+		name = "CAM-CRE";
+		break;
 	default:
 		name = "CAM";
 		break;

drivers/camera_main.c

@@ -55,6 +55,7 @@
 #include "cam_debug_util.h"
 
 #include "ope_dev_intf.h"
+#include "cre_dev_intf.h"
 
 #include "cam_top_tpg.h"
 #include "cam_tfe_dev.h"
@@ -137,6 +138,7 @@ static const struct camera_submodule_component camera_ope[] = {
 static const struct camera_submodule_component camera_cre[] = {
 #ifdef CONFIG_SPECTRA_CRE
 	{&cam_cre_init_module, &cam_cre_exit_module},
+	{&cam_cre_subdev_init_module, &cam_cre_subdev_exit_module},
 #endif
 };
 static const struct camera_submodule_component camera_jpeg[] = {

drivers/camera_main.h

@@ -53,6 +53,7 @@ extern struct platform_driver cam_ope_subdev_driver;
 #endif
 #ifdef CONFIG_SPECTRA_CRE
 extern struct platform_driver cam_cre_driver;
+extern struct platform_driver cam_cre_subdev_driver;
 #endif
 #ifdef CONFIG_SPECTRA_JPEG
 extern struct platform_driver cam_jpeg_enc_driver;
@@ -128,6 +129,7 @@ static struct platform_driver *const cam_component_drivers[] = {
 #endif
 #ifdef CONFIG_SPECTRA_CRE
 	&cam_cre_driver,
+	&cam_cre_subdev_driver,
 #endif
 #ifdef CONFIG_SPECTRA_FD
 	&cam_fd_hw_driver,