Revīziju grafs

58 Revīzijas

Autors SHA1 Ziņojums Datums
Yashwanth
45e57a9f87 disp: msm: sde: add ubwc verification during plane atomic check
In targets where ubwc is not supported, atomic check
should fail and return a error value if the input format
is ubwc.

Change-Id: I21a40f510cc852e64fbcc05a5fb4848da4b4faaa
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2020-06-08 11:39:31 -07:00
Prabhanjan Kandula
71f615345a disp: msm: sde: fix system cache feature enable
In current driver if client did not reset system cache
crtc property, system cache write state is on forever and
breaks the system cache feature. This change restricts
entering into cache write state only if it's commit right
after idle notify. This change also adds event logs to
capture system cache feature state changes.

Change-Id: Ie46fc9113f752ed8989dab99301690a13003b00b
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2020-06-03 19:10:39 -07:00
Nilaan Gunabalachandran
1fedb0a712 disp: msm: sde: fix static cache programming
Add smmu cache hint at during the msm gem prime import
to ensure memory is cacheable. Ensure sys cache feature
is added to all sspp, not just vig.

Change-Id: Icc10468ad8d3e7c6aabd437776cde99eb627375a
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-05-28 20:36:51 -04:00
Veera Sundaram Sankaran
68b75aac24 disp: msm: use FB_NON_SEC_DIR_TRANS plane hint for TUI VM buffers
Add plane buffer flag to get the correct aspace during
TUI VM usecase. FB_NON_SEC_DIR_TRANS plane flag is set
by user-mode to indicate S2-only non-secure buffer in
TUI VM. Return the default drm device when SMMU is not
available during get_aspace_device to make the working
seamless with/without SMMU.

Change-Id: I158dc17ba51ff4b2f302d3e7017db8ab3cfe2b84
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2020-05-11 12:11:39 -07:00
Veera Sundaram Sankaran
bfec52ae7b disp: msm: sde: add SID setup function for pipes and lutdma
Add SID setup function to help programming
the SIDs for all the pipes and lutdma xin clients
based on the VM.

Change-Id: Iea598303b480b33de8750e0988129dd5cdfe7572
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2020-05-11 12:11:31 -07:00
Amine Najahi
89c7e1dadf disp: msm: sde: add plane staging management for 4LM topologies
When a 4LM topology is used each plane attached to a CRTC
is tagged with a L/R layout value and an offset value
depending on where destination X coordinate lands on the display.
The layout information is used to determine SSPP to LM
pair mapping and local coordinate space.

This change also handles source-split and Z-order
validation checks for planes staged on different mixer
pairs.

Change-Id: I1b20223388e65fc36a8b379ad9df23a277fcd1a5
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2020-05-05 23:06:39 -04:00
qctecmdr
20d23de207 Merge "disp: msm: sde: set predownscale x_0 if value not provided" 2020-05-04 18:12:45 -07:00
qctecmdr
3504cd43c2 Merge "disp: msm: sde: reduce complexity in sde_plane_sspp_atomic_check" 2020-05-04 08:32:51 -07:00
qctecmdr
34620799ae Merge "disp: msm: sde: reduce complexity in _sde_plane_install_properties" 2020-05-04 08:32:51 -07:00
qctecmdr
dfc3e3ddc8 Merge "disp: msm: sde: add sys cache usage for static image" 2020-05-01 17:58:07 -07:00
Samantha Tran
303ac7b5c9 disp: msm: sde: set predownscale x_0 if value not provided
Currently, the value for predownscale_x_0 is being set based
on source height and destination height. This value should only
be set if userspace has not set a value for it already or if
default scale is enabled through debugfs.

Change-Id: Icf13ac33ae4a1a40bff90cd639428e9a11f96241
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2020-04-27 13:52:28 -07:00
Nilaan Gunabalachandran
83ee51cb5a disp: msm: sde: add sys cache usage for static image
Store full or partial static image in system cache (L3 cache)
for video mode primary display. Added additional commit to
crtc commit thread to transition to read cache state.
The change also updates llcc APIs to support generic functionality.

Change-Id: I6b2a45da946d7e0e0b326da9d214be3f01a9420e
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-04-27 15:12:17 -04:00
Steve Cohen
ba96d9f114 disp: msm: sde: reduce complexity in _sde_plane_install_properties
Lower the cyclomatic complexity for this function by splitting the
work into helper functions.

Change-Id: I07d399e455ca2f73a14875b45c30f123c39fa501
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-04-23 01:31:44 -04:00
Thomas Dedinsky
d4124a5322 disp: msm: sde: add rotation and scaling check for max linewidth
Add scaling linewidth variable and logic changes to get
valid max linewidth values for inline rotation and scaling.
Modify linewidth check to compare with scaler source width.

Change-Id: I7c63175e568ecb524f9cdf8ada1d7c6fdc999236
Signed-off-by: Thomas Dedinsky <tdedinsk@codeaurora.org>
2020-04-22 14:08:47 -07:00
qctecmdr
a590ad8a8a Merge "disp: msm: sde: update QoS values on FPS switch" 2020-04-21 18:35:16 -07:00
Adrian Salido
3720455502 drm/msm: minimize qos remap updates
Updating qos remap updates requires reading registers to update values,
this adds additional CPU processing when in reality this update
is only needed once.

Bug: 142504774
Change-Id: Iec8d4dfd858b0602db7d2275b6b716dbcffe0d2f
(cherry picked from commit dbd1cfbc21db4b9bd4f1a4fc234cedc314fa1265)
Signed-off-by: Adrian Salido <salidoa@google.com>
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2020-04-21 12:43:55 -07:00
Samantha Tran
5a12f8b0df disp: msm: sde: add default calculations and settings for pre-downscale
This change introduces pre-downscaling values to the path where
these values are not provided by userspace. Currently, pre-downscaling
is only allowed by a factor of 2.2 in the x direction. With this
change pre-downscaling will support >2.2 up to 4 in the x direction.

Change-Id: I04d1b07243a5973e9338ea2a212280985b31b6a3
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2020-04-20 17:24:15 -07:00
Steve Cohen
4dbf721a24 disp: msm: sde: reduce complexity in sde_plane_sspp_atomic_check
Lower the cyclomatic code complexity by moving some logic into
a helper function.

Change-Id: If15a4eaaecb0f6eec512671d47e4da20f9a31670
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-04-11 22:11:27 -04:00
Samantha Tran
7401ef1995 disp: msm: sde: correct line time to include compression ratio
Current computation of line time does not include compression ratio
from either DSC or VDC. This change stores source bpp and target bpp in
sde_crtc during sde encoder mode set to be used while calculating line
time.

Change-Id: Ib1e045dce17fcf006447d4562b402cc3f214ed8c
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2020-04-10 16:23:38 -07:00
qctecmdr
76d89c1e24 Merge "disp: msm: add support for no blend planes" 2020-04-01 17:45:16 -07:00
qctecmdr
6b664b94bc Merge "Revert "disp: msm: sde: cache vbif QoS parameters"" 2020-04-01 13:29:29 -07:00
Gopikrishnaiah Anandan
078d42797b disp: msm: add support for no blend planes
Some of the features in the DPU hardware needs planes to be staged but
it should not be blended in the layer mixer. Change adds support for drm
driver client to set the blend type on the plane and updates driver code
to skip staging the plane.

Change-Id: I1e8c7f6ce5617820ea8b24419e0d4d27b481819b
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
2020-03-31 14:07:49 -07:00
Gopikrishnaiah Anandan
a337e44c28 msm: sde: demura support for register dma
Demura block of dpu will use the register dma path for programming.
Change updates the register dma frame-work to allow programming of the
demura block.

Change-Id: Ie5a64df1b2fffcb84d9554e5211249892ed2d96d
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
2020-03-31 14:05:24 -07:00
Gopikrishnaiah Anandan
a8371c6a52 disp: msm: Add support for demura properties
Based on the hardware catalog if dpu supports demura, driver will
install the drm properties specific to the feature. Change added support
for creating demura properties and exposing via drm frame-work.

Change-Id: I58f5b12ca660d826e6e0b7e1f212bdf3c5e41905
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
2020-03-30 17:43:28 -07:00
Narendra Muppalla
d6141f8472 disp: msm: fix kw issues in sde driver
This change addresses out of range and null checks in
sde driver.

Change-Id: I905d795edf6715aa990dd7bbaf061734e95ddea6
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-03-30 15:22:34 -07:00
Samantha Tran
793d2a33d7 disp: msm: sde: destroy framebuffers after plane cleanup
Add framebuffer destroy immediately following plane cleanup
during secure display transition. Set state's fb to NULL
after destroying to avoid attempting to destroy fb again
during plane state destroy. Previously, framebuffer destroy
is happening after the context is detached while plane states
are being destroyed.

Change-Id: I273ce5b85c30962ea7e0a738a366487c9c85d4df
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2020-03-29 16:51:39 -07:00
Krishna Manikandan
e99063c7a3 disp: msm: stage layer with zorder 0 as base layer
Add support to stage layer with zorder 0 as base
layer and stage borderfill only during null commit.

Change-Id: I54356c1b7834227cc3da00c211e71ac5816ce51a
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
2020-03-29 16:50:44 -07:00
Jayaprakash
8274efd919 disp: msm: sde: add plane check in continuous splash case
In dual display continuous splash case, there are certain
scenarios where pipe being used in secondary display at boot up
is allocated by primary crtc. Add check to return failure
in such cases.

Change-Id: I9047b6e7f91e59a9daff5089abb41017c068b449
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2020-03-29 09:51:49 -07:00
Steve Cohen
9992efa7a0 disp: msm: sde: separate horz/vert max downscale checks
Separate the horizontal and vertical max downscale checks
as pre-downscale introduced different limits on different
axes. Also cleanup the variable names for max downscale
limit when pre-downscale is not enabled.

Change-Id: If01aac1844d0bd5133502a50dbc38197e11da5d5
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-03-23 23:44:39 -04:00
Samantha Tran
c6d6839a78 Revert "disp: msm: sde: cache vbif QoS parameters"
The original change avoids unnecessary reprogramming
of plane vbif registers, but still copies values into
a local struct before exiting based on boolean. This
can be taken care of by 01e1d4136cc1 ("drm/msm:
minimize qos remap updates") instead.

This reverts commit 0c7159de4f.

Change-Id: Idd9b066db9ebad092aa1a6dd2cf47050b0babd0c
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2020-03-09 16:41:27 -07:00
Dhaval Patel
2843f86793 disp: msm: sde: support fps based qos setting
Support different safe, danger and creq qos lut
configuration based on display fps. It also removes
the fill level calculations from sspp and wb block
because mdss hw supports simple configuration.

Change-Id: I203e4300c9eab27d3632c890bedd6383cca0e5a8
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-03-02 09:52:47 -08:00
Steve Cohen
c4d617f2c2 disp: msm: sde: fix max downscale check for legacy HW
Legacy HW that does not support pre-downscale capability will
incorrectly fail certain scaling checks. Fix those checks to
fully support HW without pre-downscaler.

Change-Id: I8f645bbff959e176c1d4d05a30a580113e320d4b
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-01-31 14:33:01 -05:00
Steve Cohen
516780f4b3 disp: msm: sde: use helper to determine plane pre-downscale cap
The pre-downscale capability is checked in multiple places
within sde_plane.c file. Add a helper function to check this
capability flag instead of manually checking this bit.

Change-Id: I21f818a9d81dd63e5eb3da248532904cfa55c838
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-01-31 14:32:45 -05:00
qctecmdr
5645148693 Merge "disp: msm: sde: refactor use of master_plane_id" 2020-01-30 16:51:08 -08:00
Steve Cohen
391f478a8c disp: msm: sde: refactor use of master_plane_id
During plane setup, when a master plane ID is provided it means we
are initializing a slave plane for HW shared by the given master ID.
When master plane ID is 0 it means this is the master. This change
refactors the code to make this clear.

Change-Id: Ia2e3430e6f9f7e105eaf26f121753b676110abe5
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-01-21 16:23:18 -08:00
Steve Cohen
5a24970f70 disp: msm: sde: fix min pre-downscale check
De-couple the horizontal and vertical pre-downscale checks since
this block can be used in cases where only X-axis downscaling
is needed.

Change-Id: I2e7d30863baed98e9f7fa0a328837691f0bc75a5
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-01-20 18:12:55 -05:00
Narendra Muppalla
a0b168f7b3 Config: enable techpack display driver compilation for lahaina
This change enables display drivers code compilation
for lahaina target and current location of header files
is replacing the header files in usr/include/drm directory
before installing display specific header files. This change
ensures both the drm and msm_drv header files are exported
to user mode clients.

Change-Id: If6fc347598b902e670b7206dbcb82fe0740b3984
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-01-14 14:10:45 -08:00
Steve Cohen
2f6b16af77 disp: msm: sde: remove inline prefill properties
Don't expose the prefill requirements for inline rotation.
These values are not used within the driver, so move these
settings to user-space.

Change-Id: Ie1038c5804047fafe0ee3129b993d83d4d31b386
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2019-12-16 08:08:27 -08:00
Steve Cohen
60133f5ebb disp: msm: sde: pre-downscale support for inline rotation v2
Add support for enabling pre-downscale block to increase the
maximum downscale capability for true inline rotation use cases.

Change-Id: Ifa544bb0ae69439abef4bd427134290090fe7230
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2019-12-16 08:07:24 -08:00
Narendra Muppalla
d1d9ae8b19 Disp: Snapshot change for lahaina display driver
This snapshot change adds downstream support
for drm 5.x+(msm_lahaina branch) linux kernel.

Change-Id: Ia691c95da155a00e449c91a2f1a5b20a8e71aed4
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2019-11-24 12:30:51 -08:00
Samantha Tran
4de15bb6ef disp: msm: sde: check all dirty properties during plane update
Previously when updating a plane's dirty features, if the
dirty all flag was set, the optimization was to break early.
This optimization left out color property updates for that plane.
This fix removes the mutex locks in the msm_prop function so
the break optimization is no longer needed. Function callers will
now need to acquire the lock and unlock the property lock when done.
Now the plane will iterate through all dirty properties.

Change-Id: I3114ac44d62ac0f0633897d757b6fd9a5b1f5d2e
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2019-10-30 06:04:16 -07:00
Veera Sundaram Sankaran
b7ba56ff00 disp: msm: sde: fix inline rotator downscale ratio check
During the validation of inline-rotator downscale ratio,
in the plane atomic_check phase, the client_type is
derived from the crtc->state. This leads to wrong
client_type as in check phase, it has to be derived
from the new crtc state. Fix it to derive from
new crtc, which would in turn be used to get the
correct inline-rotator downscale ratio.

Change-Id: I109fc6fd81182b1cda1c4feefbf421d3fab433c7
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-09-18 13:28:17 -07:00
qctecmdr
103fc67d5c Merge "disp: msm: sde: add SSPP CP features to dirty list during IPC" 2019-08-22 01:20:22 -07:00
qctecmdr
778635ae10 Merge "disp: msm: sde: cache vbif QoS parameters" 2019-08-12 22:36:26 -07:00
Nilaan Gunabalachandran
08116fb279 disp: msm: sde: convert event logs to verbose
Reduce event logs to verbose only because they do not need
to be logged every frame.

Change-Id: I753154dc4b13cfce1382615b02e8fc7e489a5993
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2019-08-02 11:41:55 -04:00
Amine Najahi
0c7159de4f disp: msm: sde: cache vbif QoS parameters
Cache vbif QoS parameters to avoid unnecessary reprogramming
of plane vbif registers. This will reduce frame time and
frame drop count.

Change-Id: I20ed97bbac54fa9b11a8784d7a4004f1ccc00632
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2019-08-01 10:55:13 -07:00
Veera Sundaram Sankaran
f61e5545d7 disp: msm: sde: fix crtc client type checks for WB
CRTC client type is wrongly identified as RT_CLIENT
for WB as the API considers only RT and RT_RSC. Resolve
it by adding a new API to check for RT CTRC.

Change-Id: I1f216f60a18215426e594d0f8b09852af376799d
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-07-24 14:52:42 -07:00
qctecmdr
bfffbd8af1 Merge "disp: msm: sde: avoid duplicate fence create from client" 2019-07-11 20:21:39 -07:00
Dhaval Patel
d710ac7f11 disp: msm: sde: avoid duplicate fence create from client
SDE fence driver avoids duplicate fence creation if
fence timeline is not increased. This may lead to issue
if client closes the fence with failure ATOMIC_COMMIT.
SDE fence driver provides the closed fd node to subsequent
valid commit and leads to invalid state. This patch avoids
duplicate fence creation from crtc and connector object
instead of sde_fence.

Change-Id: Ic7b43762f0ad251fb20e42edb5f4d5f401790e14
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2019-07-10 11:15:23 -07:00
Lakshmi Narayana Kalavala
99a7f030d4 disp: msm: sde: fix the QOS setting mismatch
Currently the display driver does not consider the write back
client while deriving client type for QOS settings.
Add new API to consider the write back and other non
real time clients also for picking up the proper QOS settings.
This patch also fixes the QOS setting mismatch with QSEEDLITE
hardware.

Change-Id: I5db3d21921b8930bb6399ea355d3ce2b60e51430
Signed-off-by: Lakshmi Narayana Kalavala <lkalaval@codeaurora.org>
2019-07-09 13:47:26 -07:00