Currently the davinci da8xx boards use the mach-davinci aemif code.
Instantiating an aemif node into the DT allows to use the ti-aemif
memory driver and is another step to better DT support.
This change adds an aemif node in the dtsi while retiring the nand_cs3
node. The NAND is now instantiated in the dts as a subnode of the aemif
one along with its pins.
Signed-off-by: Karl Beldan <kbeldan@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
imx7s-warpd has WDOG1_B pin connected to the PMIC.
Pass the 'fsl,ext-reset-output' property so that the watchdog
can trigger a system POR reset via the PMIC.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Warp7 has a BCM43430 Wifi chip connected to the USDHC1 port.
Add support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Only i.MX 7Dual SoC supports CPU frequencies of up to 1GHz. The i.MX
7Solo can run with up to 800MHz and does so without making use of DVFS
usually. While the device tree clearly specified a too fast operating
point for i.MX 7Solo, the kernel did not used it in practise so far
because the CPUfreq driver does not get loaded on i.MX 7Solo devices
(since the fsl,imx7s compatible string is not in the list of devices
making use of the cpufreq-dt driver...).
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
As of commit 5aa2eb3c86 ("[media] v4l: vsp1: Configure device
based on IP version"), the DT properties to identify the exact VSP
device instance features are no longer used. Hence remove them.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
As of commit 5aa2eb3c86 ("[media] v4l: vsp1: Configure device
based on IP version"), the DT properties to identify the exact VSP
device instance features are no longer used. Hence remove them.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the Alt board dependent part of the MMCIF device node.
Like the Silk the board has eMMC chip along with the necessary voltage
regulator (note that the Vcc/Vccq regulator is dummy -- it's required by
the MMCIF driver but doesn't actually exist on the board).
Based on work for the Silk board by Vladimir Barinov and Sergei Shtylyov.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the Alt board dependent part of the SDHI0 and 1
device nodes along with the necessary voltage regulators.
Based on work by the original patch by Vladimir Barinov and
Sergei Shtylyov for the Silk board.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The ARM GIC only supports interrupts with either level-high or
rising-edge types for SPIs. The interrupt type for the Palmas PMIC used
for Tegra114 boards is specified as level-low which is invalid for the
GIC. This has gone undetected because until recently, failures to set
the interrupt type when the interrupts are mapped via firmware (such as
device-tree) have not been reported. Since commits 4b357daed6
("genirq: Look-up trigger type if not specified by caller") and
1e2a7d7849 ("irqdomain: Don't set type when mapping an IRQ"), failure
to set the interrupt type will cause the requesting of the interrupt to
fail and exposing incorrectly configured interrupts.
Please note that although the interrupt type was never being set for the
Palmas PMIC, it was still working fine, because the default type setting
for the interrupt, 'level-high', happen to match the correct type for
the interrupt.
Finally, it should be noted that the Palmas interrupt from the PMIC is
actually 'level-low', however, this interrupt signal is inverted by the
Tegra PMC and so the GIC actually sees a 'level-high' interrupt which is
what should be specified in the device-tree interrupt specifier.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
DT compatible values should always include an entry for the specific
chip in addition to any earlier generations that the HW is backwards-
compatible with.
This doesn't affect the kernel at all given current driver code, but
U-Boot needs to distinguish between Tegra114 and Tegra30 for this HW,
and I'd like to synchronize the DT content.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This patch fixes the following DTC warnings for many boards:
"Node /leds/led@1 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for many boards:
"Node /leds/led@1 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for many boards:
"Node /gpio_keys/button0@10 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for many boards:
"Node /gpio_keys/button0@10 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for many boards:
"Node /fixedregulator@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for many boards:
"Node /fixedregulator@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for many boards:
"Node /fixedregulator@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for many boards:
"Node /matrix_keypad@0 has a unit name, but no reg property"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit b8d368caa8 ("ARM: dts: omap3: overo: remove unneded unit names
in display nodes") removed the unit names for all Overo display nodes
that didn't have a reg property.
But the display in arch/arm/boot/dts/omap3-overo-common-lcd35.dtsi does
have a reg property so the correct fix was to make the unit name match
the value of the reg property, instead of removing it.
This patch fixes the following DTC warning for boards using this dtsi:
"ocp/spi@48098000/display has a reg or ranges property, but no unit name"
Fixes: b8d368caa8 ("ARM: dts: omap3: overo: remove unneded unit names in display nodes")
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch fixes the following DTC warnings for many boards:
"Node /ocp has a reg or ranges property, but no unit name"
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This fix was applied to a bunch of omap3 devices including LogicPD
Torpedo, but this got missed since it was new around the same times
the patches were applied. This makes the GPMC parameters match the
Torpedo since they have the same processor PoP memory.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This was applied to a variety of omap3 boards, so it should
probably be applied here. I did not test NAND performance, but
I tested this with UBI to confirm read/write didn't break.
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The gpmc ranges property for NAND at CS0 was being overridden by later
includes that defined gpmc ethernet nodes, effectively breaking NAND on
these systems:
omap-gpmc 6e000000.gpmc: /ocp/gpmc@6e000000/nand@0,0 has
malformed 'reg' property
Instead of redefining the NAND range in every such dtsi, define all
currently used ranges in omap3-overo-base.dtsi.
Fixes: 98ce6007ef ("ARM: dts: overo: Support PoP NAND")
Cc: stable <stable@vger.kernel.org> # 4.3
Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The gpmc ranges property for NAND at CS0 has been broken since it was
first added.
This currently prevents the nand gpmc child node from being probed:
omap-gpmc 6e000000.gpmc: /ocp/gpmc@6e000000/nand@0,0 has
malformed 'reg' property
and consequently the NAND device from being registered.
Fixes: 98ce6007ef ("ARM: dts: overo: Support PoP NAND")
Cc: stable <stable@vger.kernel.org> # 4.3
Signed-off-by: Johan Hovold <johan@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The check for the "elm_id" binding had been removed.
This causes nand boot to fail on boards still using
the old binding. Update the bindings on those boards.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add support for MPL3115 NXP pressure sensor.
Tested by reading temperature and pressure:
$ cat /sys/bus/iio/devices/iio:device0/in_temp_raw
$ cat /sys/bus/iio/devices/iio:device0/in_pressure_raw
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Gateworks Ventana GW553x is a single-board computer based on the NXP
IMX6 SoC with the following features:
* IMX6 DualLite Soc (supports IMX6S,IMX6DL,IMX6Q)
* small form factor (35x70mm)
* 512MB DDR3 DRAM (2x32bit) (options up to 2GB)
* 256MB NAND flash (4GB option)
* Gateworks System Controller:
- hardware watchdog
- hardware monitor
- pushbutton controller
- EEPROM storage
- power control
* JTAG programmable
* 1x miniPCI socket (with PCIe, USB, SIM)
* 1x microSD socket
* 1x SIM socket
* Inertial Module (LSM9DS1 9DOF: 3x acc, 3x rate, 3x mag)
* analog CVBS video in
* GPS (optional uBlox EVA-M8M)
* Application headers:
- 2x TTL UART (TX/RX)
- 4x TTL GPIO (3x configurable as PWM)
- 3x CVBS Analog video input (1x decoder with 3x selectable inputs)
* Front panel connectors:
- micro-HDMI audio/video out
- 1x user programmable LED
- 1x configurable user pushbutton
- 1x USB OTG
See http://www.gateworks.com for more info
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The i.MX 7 as a GICv2, hence its CPU interface register map (the
second register region) is 8kB long. Add the VGIC maintenance
interrupt which allows to use the new VGIC driver.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Suggested-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Since we have a SoC level node we should make use of it and have
all nodes which are within the SoC, inside that node. This also
saves an extra interrupt-parent properties. While at it, also
order the Coresight nodes according to register addresses.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Rockchip platform use a SYSCON mapped register store
the reboot mode magic value for bootloader to use when
system reboot. So add syscon-reboot-mode driver DT node
for rk3xxx/rk3036/rk3288 based platform
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Clearly QEMU is very permissive in how its PL310 model may be set up,
but the real hardware turns out to be far more particular about things
actually being correct. Fix up the DT description so that the real
thing actually boots:
- The arm,data-latency and arm,tag-latency properties need 3 cells to
be valid, otherwise we end up retaining the default 8-cycle latencies
which leads pretty quickly to lockup.
- The arm,dirty-latency property is only relevant to L210/L220, so get
rid of it.
- The cache geometry override also leads to lockup and/or general
misbehaviour. Irritatingly, the manual doesn't state the actual PL310
configuration, but based on the boardfile code and poking registers
from the Boot Monitor, it would seem to be 8 sets of 16KB ways.
With that, we can successfully boot to enjoy the fun of mismatched FPUs...
Cc: stable@vger.kernel.org
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Tested-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
c90bb7b enabled the high speed UARTs of the Jetson TK1. Due to a merge
quirk, wrong addresses were introduced. Fix it and use the correct
addresses.
Thierry let me know, that there is another patch (b5896f67ab in
linux-next) in preparation which removes all the '0,' prefixes of unit
addresses on Tegra124 and is planned to go upstream in 4.8, so
this patch will get reverted then.
But for the moment, this patch is necessary to fix current misbehaviour.
Fixes: c90bb7b9b9 ("ARM: tegra: Add high speed UARTs to Jetson TK1 device tree")
Signed-off-by: Ralf Ramsauer <ralf@ramses-pyramidenbau.de>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
Cc: stable@vger.kernel.org # v4.7
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This syscon needs to be looked up by clocks, flash protection
and other consumers.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This syscon needs to be looked up by flash protection, CLCD
display output settings and other consumers.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Exynos5410 supports eMMC version 4.41 so HS200 is the top mode which
should be configured. This is reflected in usage of
"samsung,exynos5250-dw-mshc" compatible. However Odroid XU DTS
contained also property "mmc-hs400-1_8v" which is parsed by MMC core
therefore resulting in mixed configuration. MMC core set HS400 but
dwmmc_exynos driver did not configure the data strobe for HS400 DDR
mode.
Removal of HS400 properties fixes semi-random mmc errors during boot:
mmc_host mmc0: Bus speed (slot 0) = 400000000Hz (slot req 200000000Hz, actual 200000000HZ div = 1)
mmc0: mmc_select_hs400 failed, error -84
mmc0: error -84 whilst initialising MMC card
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
We have the following messages that tell csi devices are not used:
imx-ipuv3 18000000.ipu: no port@0 node in /soc/ipu@18000000, not using CSI0
imx-ipuv3 18000000.ipu: no port@1 node in /soc/ipu@18000000, not using CSI1
So we add them in the common device tree to make CSI ports available on
imx53 boards.
Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.co.uk>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Commit 2a0900655d5e (ARM: dts: r8a7792: add I2C support) had a wrongly
indented line at the end of the "aliases" subnode -- fix it.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the SILK board dependent part of the R8A7794 sound device node.
Add device node for Asahi Kasei AK4643 stereo codec to the I2C1 bus.
Add the "simple-audio-card" device node to interconnect the SoC sound
device and the codec.
This patch is based on the commit 493b4da7c1 ("ARM: dts: porter: add
sound support").
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
