added 1msec delay before resetting FS cntrl, to ensure no
glitch at the start of VI feedback.
Change-Id: Ia9ae296f336e4deb4b8bedb718316a6772466a95
Signed-off-by: sarath varma ganapathiraju <quic_ganavarm@quicinc.com>
Enable WSA RX1 mix path to ensure DMA is enabled
properly and data is consumed to drive right channel
using wsa mix path.
Change-Id: I2b0bc92eeaa82734254ceda96de39f20a761dc75
Signed-off-by: sarath varma ganapathiraju <quic_ganavarm@quicinc.com>
In lpass_cdc_wsa_macro_config_compander function,
add check for wsa_sys_gain array's index to make sure
it won't go out of bound.
Change-Id: I9d8512726de959e7a0d9e875e966140d70412e25
Signed-off-by: Deepali Jindal <quic_deepjind@quicinc.com>
Program WSA_DATA_FS_CTL reg based on input used(wsa rx/wsa2 rx)
and also update the channelmap based on mixer cntl.
Change-Id: I0cfac1d9b25dd1211824bcea2753bb6c1131f767
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
Mix path clk is gated by main path clk, as per current logic we are not
enabling main path clk for mix path use-cases.
Enable main path clk before enabling mix path for UPD dedicated backend
to work.
Change-Id: I209d1eaf25f4ef08bbd534f5ecc858e465ce7e18
Signed-off-by: Faiz Nabi Kuchay <quic_fkuchay@quicinc.com>
During spk playback and VA concurrency,
sometimes WSA CLK goes out of sync causing
VI_TX data mute. To resolve this, everytime
after WSA MCLK enable toggle fs_cnt_clr bit.
Change-Id: Ia936f1d4843890d2ae5c02b039f502941a5427b9
Signed-off-by: Soumya Managoli <quic_c_smanag@quicinc.com>
enable the wsa and wsa2 clk as per sequence.
Change-Id: Ieefa4b6ea7aec535d940d780b0ed923483b4d3ee
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
Unmute WSA after enabling main path for
ADIE loopback cases.
Change-Id: I850aa4dbcf77371811010c1d614c6c7e94736971
Signed-off-by: Eric Rosas <quic_erosas@quicinc.com>
Remove platform_max setting in WSA/WSA2 drivers
to correct the volume range for digital volume.
Change-Id: Ia87c9fbeacc7bbb37b02f707b5c624a4091251d9
Signed-off-by: Sam Rainey <quic_rainey@quicinc.com>
Disable the common pbr clk register only when no one uses
RX0 and RX1 channels.
Change-Id: Ia5fab1d3e4be7d9ecb01ad0b612b9f6ef7406bea
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
updated the out of bound check for comp_mode
if any such occurence happens setting it to default mode.
Change-Id: Ie4a7275d45af6a96f1a2ec4b6ece6dc7a5dca464
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
Enable the VI decimator at the end of Rx and VI enable sequence.
Change-Id: I12045c903b29d4cc830dbbfd242d805a629c0efd
Signed-off-by: Vangala, Amarnath <quic_avangala@quicinc.com>
Update ch_msk and audio path for VI feedback path
in lpass_wsa2 macro.
Change-Id: Ibc96fc1ad82e2e996b11af20522f35e47b94d8f0
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
After ADSP is up during SSR, core_hw_vote may fail and audio_hw_vote
may successed in lpass_cdc_runtime_resume which is caused some timing.
When getting slave device_id, as core_hw_vote is 0, it will skip reading
swr registers and return 0 which causes fail to read correct device_id.
Make this change to avoid calling lpass_cdc_runtime_resume when adsp_up
notification doesn't reach lpass_cdc.
Change-Id: I90a97e5c47bb95180a96ba1c60b462f1fa0124b7
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>
Signed-off-by: Kunlei Zhang <quic_kunleiz@quicinc.com>
Implement backend for CPS soundwire port in Bolero.
Change-Id: Ibbd38d067e46be1a71723de04a83bc83f0ec2925
Signed-off-by: Vangala, Amarnath <quic_avangala@quicinc.com>
Propagate all changes to lpass-cdc-wsa-macro to
lpass-cdc-wsa2-macro. Leave get_channel_map alone
because it is wsa macro specific.
Change-Id: I46733a759490d488f46eda24b4006a1dec63c7cc
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
update check not to exceed the array index for active_ch_mask and active_ch_cnt
Change-Id: Ic6d72d7469edbd004cd34a709384d527e90cd26f
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
Decrease idle holdoff time from 60 to 29 samples as per updated
documentation.
Change-Id: Ia8786020d6de8320f057f418e743507030c734c8
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
New requirement to update compander_ctl7 again_delay
field to 7.
Change-Id: I4c5ef15c645cabded50203bf92facbe7c8ff8c5b
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Update from SOC_ENUM to SOC_SINGLE to match rest of driver
implementation. Also remove remaining dev_mode enum references
in wsa884x driver.
Change-Id: I2a477c4fa8c29373ffa1e8e2eb599a0f1c61653d
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
replace all dev(pr)_err/info logs
that could potentially flood kernel logs with
ratelimit functions dev_err_ratelimited and
dev_info_ratelimited
Change-Id: I32dc6002dead1a07622978c4de63d541c01982fd
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
idle detect thr is a fixed value, do not need to change
Add debug statements in idle detect control func
Change-Id: I68a049f8560a1a444c019df2dc09f7cf62b37d46
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
the offset between LPASS_CDC_WSA_RX_INP_MUX_RX_INT0_CFG1 and
LPASS_CDC_WSA_RX_INP_MUX_RX_INT1_CFG1 is 8 so updating
0x104 + 8* interp
update ng block register write for NG2 mode in Kundu
Change-Id: I44da894feebb5d25bd467ffd4d54adde111778e6
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
Use LEGACY source if any of the below use cases is met:
EAR, PBR OFF, IDLE, NG2 and PA GAIN <= 13.5dB
Use PRE-LA when: All other cases
Change-Id: Iace0c1f6fea367a73cd604b958bd5c8905d29509
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
Can now set these registers during init once these values are
acquired.
Method called again before playback in case there are
speaker/recv changes.
Change-Id: I1b544633a660e98acadf94b9589b7656edebdd56
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Add new lpass RX paths. Needed to fix
WSA ADIE Loopback.
Update DAPM enum length to include these RXs.
Change-Id: Ie174cfab20b8beb103eefa94636e76ad756c7345
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Found potential issues relating to uninitialized or out-of-bounds variables
present in codec drivers. Place checks to ensure proper ranges are used.
Change-Id: Ib68cba2413788a57237f1f18fc5ce5fb5c6bfb0a
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Update function to correctly read array from device tree.
Previously not reading values and returning -EINVAL.
WSA bat_cfg/rload/sys_gain are now correctly configured.
Also add softclip clock enable during pbr config.
Change-Id: Ia1b93acfde3e799b3b72e05966d0fa955c3f49ac
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Add idle detect source select based on NG mode,
if NG2 then source is PRE-LA else LEGACY
Change-Id: I4e0cb3825960e6b795038fb5e85cfaa7a2fbfe62
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
Add idle detect enable for mixed control path,
and update copyright markings
Change-Id: Idf2932cd1813082f60ee96010788cdb1ef36afbf
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
Lpass-side enablement of new WSA feature.
Configure PBR registers based on WSA bat_cfg/rload/sys_gain.
Some registers updated during init, others during enable_interpolator.
Change-Id: Iac42672182827a9da47700319c61b9d0a17d0936
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Update WSA rload, system gain, bat_cfg to get from wsa_macro device tree.
WSA Bat_cfg change to read from VPHX_SYS_EN_STATUS reg.
Add device tree parsing for these params in WSA macro
and WSA driver.
Remove machine driver method of sending the parameters.
Add default_dev_mode (spkr vs rcv) from device tree for WSA.
Move code from spkr event to userspace controls or probe.
Change system_gain and affected params when switching between
dev_modes.
These changes simplify configuration data and code and allow
more registers to be written during bootup or before playback.
Change-Id: I79966c704adfac1bf2d85aa6519ea574764c7a8b
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Sometimes after SSR/DPR is triggered, RX_TX_CORE_CLK, WSA_TX_CORE_CLK
and WSA2_TX_CORE_CLK are not reset which causes WSA or WCD not
detected. Make this change to add reset during SSR.
Change-Id: I343f2f92244de3eee844e220a6201b389dc647b4
Signed-off-by: Meng Wang <mengw@codeaurora.org>
Add support to use 4p8MHz DAC rate for receiver over WSA.
Change-Id: Ia0811670326be8131687fbdff70464da063902b2
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
Add changes to use wsa883x for receiver with
low_noise mode settings.
Change-Id: Icfa43ebbdb1e366f365053535f541bee03751ca3
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
Thermal framework is expected an error to be returned if the requested
cur_state exceed the max_state.
Change-Id: I1e0d8124a1aa6c0d755b35225207638aefdcb464
Signed-off-by: Junkai Cai <junkai@codeaurora.org>
