asoc: lpass-cdc : Enable wsa clks during DAPM powerup sequence

enable the wsa and wsa2 clk as per  sequence.

Change-Id: Ieefa4b6ea7aec535d940d780b0ed923483b4d3ee
Signed-off-by: Ganapathiraju Sarath Varma <[email protected]>

asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c

@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
- * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #include <linux/module.h>
@@ -899,9 +899,6 @@ static int lpass_cdc_wsa_macro_mute_stream(struct snd_soc_dai *dai, int mute, in
 	struct snd_soc_component *component = dai->component;
 	struct device *wsa_dev = NULL;
 	struct lpass_cdc_wsa_macro_priv *wsa_priv = NULL;
-	uint16_t j = 0, reg = 0, mix_reg = 0, dsm_reg = 0;
-	u16 int_mux_cfg0 = 0, int_mux_cfg1 = 0;
-	u8 int_mux_cfg0_val = 0, int_mux_cfg1_val = 0;
 	bool adie_lb = false;
 
 	if (mute)
@@ -909,45 +906,19 @@ static int lpass_cdc_wsa_macro_mute_stream(struct snd_soc_dai *dai, int mute, in
 
 	if (!lpass_cdc_wsa_macro_get_data(component, &wsa_dev, &wsa_priv, __func__))
 		return -EINVAL;
-
 	switch (dai->id) {
 	case LPASS_CDC_WSA_MACRO_AIF1_PB:
 	case LPASS_CDC_WSA_MACRO_AIF_MIX1_PB:
-	for (j = 0; j < NUM_INTERPOLATORS; j++) {
-		reg = LPASS_CDC_WSA_RX0_RX_PATH_CTL +
-				(j * LPASS_CDC_WSA_MACRO_RX_PATH_OFFSET);
-		mix_reg = LPASS_CDC_WSA_RX0_RX_PATH_MIX_CTL +
-				(j * LPASS_CDC_WSA_MACRO_RX_PATH_OFFSET);
-		dsm_reg = LPASS_CDC_WSA_RX0_RX_PATH_CTL +
-				(j * LPASS_CDC_WSA_MACRO_RX_PATH_OFFSET) +
-				LPASS_CDC_WSA_MACRO_RX_PATH_DSMDEM_OFFSET;
-		int_mux_cfg0 = LPASS_CDC_WSA_RX_INP_MUX_RX_INT0_CFG0 + j * 8;
-		int_mux_cfg1 = int_mux_cfg0 + 4;
-		int_mux_cfg0_val = snd_soc_component_read(component,
-							int_mux_cfg0);
-		int_mux_cfg1_val = snd_soc_component_read(component,
-							int_mux_cfg1);
-		if (snd_soc_component_read(component, dsm_reg) & 0x01) {
-			if (int_mux_cfg0_val || (int_mux_cfg1_val & 0x38))
-				snd_soc_component_update_bits(component, reg,
-							0x20, 0x20);
-			if (int_mux_cfg1_val & 0x07) {
-				snd_soc_component_update_bits(component, reg,
-							0x20, 0x20);
-				snd_soc_component_update_bits(component,
-						mix_reg, 0x20, 0x20);
-			}
-		}
-	}
-	lpass_cdc_wsa_pa_on(wsa_dev, adie_lb);
-	lpass_cdc_wsa_unmute_interpolator(dai);
-	lpass_cdc_wsa_macro_enable_vi_decimator(component);
-		break;
+		lpass_cdc_wsa_pa_on(wsa_dev, adie_lb);
+		lpass_cdc_wsa_unmute_interpolator(dai);
+		lpass_cdc_wsa_macro_enable_vi_decimator(component);
+	break;
 	default:
-		break;
+	break;
 	}
 	return 0;
 }
+
 static int lpass_cdc_wsa_macro_mclk_enable(
 				struct lpass_cdc_wsa_macro_priv *wsa_priv,
 				 bool mclk_enable, bool dapm)
@@ -1221,6 +1192,12 @@ static int lpass_cdc_wsa_macro_disable_vi_feedback(struct snd_soc_dapm_widget *w
 			snd_soc_component_update_bits(component,
 				LPASS_CDC_WSA_TX1_SPKR_PROT_PATH_CTL,
 				0x10, 0x00);
+			snd_soc_component_update_bits(component,
+				LPASS_CDC_WSA_TX0_SPKR_PROT_PATH_CTL,
+				0x20, 0x00);
+			snd_soc_component_update_bits(component,
+				LPASS_CDC_WSA_TX1_SPKR_PROT_PATH_CTL,
+				0x20, 0x00);
 		}
 		if (test_bit(LPASS_CDC_WSA_MACRO_TX1,
 			&wsa_priv->active_ch_mask[LPASS_CDC_WSA_MACRO_AIF_VI])) {
@@ -1238,6 +1215,12 @@ static int lpass_cdc_wsa_macro_disable_vi_feedback(struct snd_soc_dapm_widget *w
 			snd_soc_component_update_bits(component,
 				LPASS_CDC_WSA_TX3_SPKR_PROT_PATH_CTL,
 				0x10, 0x00);
+			snd_soc_component_update_bits(component,
+				LPASS_CDC_WSA_TX2_SPKR_PROT_PATH_CTL,
+				0x20, 0x00);
+			snd_soc_component_update_bits(component,
+				LPASS_CDC_WSA_TX3_SPKR_PROT_PATH_CTL,
+				0x20, 0x00);
 		}
 		break;
 	}
@@ -1332,6 +1315,7 @@ static int lpass_cdc_wsa_macro_enable_mix_path(struct snd_soc_dapm_widget *w,
 	u16 gain_reg;
 	int offset_val = 0;
 	int val = 0;
+	uint16_t mix_reg = 0;
 
 	dev_dbg(component->dev, "%s %d %s\n", __func__, event, w->name);
 
@@ -1345,8 +1329,16 @@ static int lpass_cdc_wsa_macro_enable_mix_path(struct snd_soc_dapm_widget *w,
 		return 0;
 	}
 
+	mix_reg = LPASS_CDC_WSA_RX0_RX_PATH_MIX_CTL +
+			LPASS_CDC_WSA_MACRO_RX_PATH_OFFSET * w->shift;
+
 	switch (event) {
 	case SND_SOC_DAPM_PRE_PMU:
+		snd_soc_component_update_bits(component, mix_reg, 0x40, 0x40);
+		usleep_range(500, 510);
+		snd_soc_component_update_bits(component, mix_reg, 0x40, 0x00);
+		snd_soc_component_update_bits(component,
+					mix_reg, 0x20, 0x20);
 		lpass_cdc_wsa_macro_enable_swr(w, kcontrol, event);
 		val = snd_soc_component_read(component, gain_reg);
 		val += offset_val;
@@ -1651,6 +1643,8 @@ static int lpass_cdc_wsa_macro_enable_main_path(struct snd_soc_dapm_widget *w,
 	struct lpass_cdc_wsa_macro_priv *wsa_priv = NULL;
 	bool adie_lb = false;
 
+	dev_dbg(component->dev, "%s %d %s\n", __func__, event, w->name);
+
 	if (!lpass_cdc_wsa_macro_get_data(component, &wsa_dev, &wsa_priv, __func__))
 		return -EINVAL;
 
@@ -1659,10 +1653,13 @@ static int lpass_cdc_wsa_macro_enable_main_path(struct snd_soc_dapm_widget *w,
 			LPASS_CDC_WSA_MACRO_RX_PATH_OFFSET * w->shift;
 	switch (event) {
 	case SND_SOC_DAPM_PRE_PMU:
+		snd_soc_component_update_bits(component, reg, 0x40, 0x40);
+		usleep_range(500, 510);
+		snd_soc_component_update_bits(component, reg, 0x40, 0x00);
+		snd_soc_component_update_bits(component,
+					reg, 0x20, 0x20);
 		if (lpass_cdc_wsa_macro_adie_lb(component, w->shift)) {
 			adie_lb = true;
-			snd_soc_component_update_bits(component,
-						reg, 0x20, 0x20);
 			lpass_cdc_wsa_pa_on(wsa_dev, adie_lb);
 			snd_soc_component_update_bits(component,
 						reg, 0x10, 0x00);

asoc/codecs/lpass-cdc/lpass-cdc-wsa2-macro.c

@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
- * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #include <linux/module.h>
@@ -904,9 +904,6 @@ static int lpass_cdc_wsa2_macro_mute_stream(struct snd_soc_dai *dai, int mute, i
 	struct snd_soc_component *component = dai->component;
 	struct device *wsa2_dev = NULL;
 	struct lpass_cdc_wsa2_macro_priv *wsa2_priv = NULL;
-	uint16_t j = 0, reg = 0, mix_reg = 0, dsm_reg = 0;
-	u16 int_mux_cfg0 = 0, int_mux_cfg1 = 0;
-	u8 int_mux_cfg0_val = 0, int_mux_cfg1_val = 0;
 	bool adie_lb = false;
 
 	if (mute)
@@ -914,45 +911,19 @@ static int lpass_cdc_wsa2_macro_mute_stream(struct snd_soc_dai *dai, int mute, i
 
 	if (!lpass_cdc_wsa2_macro_get_data(component, &wsa2_dev, &wsa2_priv, __func__))
 		return -EINVAL;
-
 	switch (dai->id) {
 	case LPASS_CDC_WSA2_MACRO_AIF1_PB:
 	case LPASS_CDC_WSA2_MACRO_AIF_MIX1_PB:
-	for (j = 0; j < NUM_INTERPOLATORS; j++) {
-		reg = LPASS_CDC_WSA2_RX0_RX_PATH_CTL +
-				(j * LPASS_CDC_WSA2_MACRO_RX_PATH_OFFSET);
-		mix_reg = LPASS_CDC_WSA2_RX0_RX_PATH_MIX_CTL +
-				(j * LPASS_CDC_WSA2_MACRO_RX_PATH_OFFSET);
-		dsm_reg = LPASS_CDC_WSA2_RX0_RX_PATH_CTL +
-				(j * LPASS_CDC_WSA2_MACRO_RX_PATH_OFFSET) +
-				LPASS_CDC_WSA2_MACRO_RX_PATH_DSMDEM_OFFSET;
-		int_mux_cfg0 = LPASS_CDC_WSA2_RX_INP_MUX_RX_INT0_CFG0 + j * 8;
-		int_mux_cfg1 = int_mux_cfg0 + 4;
-		int_mux_cfg0_val = snd_soc_component_read(component,
-							int_mux_cfg0);
-		int_mux_cfg1_val = snd_soc_component_read(component,
-							int_mux_cfg1);
-		if (snd_soc_component_read(component, dsm_reg) & 0x01) {
-			if (int_mux_cfg0_val || (int_mux_cfg1_val & 0x38))
-				snd_soc_component_update_bits(component, reg,
-							0x20, 0x20);
-			if (int_mux_cfg1_val & 0x07) {
-				snd_soc_component_update_bits(component, reg,
-							0x20, 0x20);
-				snd_soc_component_update_bits(component,
-						mix_reg, 0x20, 0x20);
-			}
-		}
-	}
-	lpass_cdc_wsa_pa_on(wsa2_dev, adie_lb);
-	lpass_cdc_wsa2_unmute_interpolator(dai);
-	lpass_cdc_wsa2_macro_enable_vi_decimator(component);
+		lpass_cdc_wsa_pa_on(wsa2_dev, adie_lb);
+		lpass_cdc_wsa2_unmute_interpolator(dai);
+		lpass_cdc_wsa2_macro_enable_vi_decimator(component);
 		break;
 	default:
 		break;
 	}
 	return 0;
 }
+
 static int lpass_cdc_wsa2_macro_mclk_enable(
 				struct lpass_cdc_wsa2_macro_priv *wsa2_priv,
 				 bool mclk_enable, bool dapm)
@@ -1227,6 +1198,12 @@ static int lpass_cdc_wsa2_macro_disable_vi_feedback(struct snd_soc_dapm_widget *
 			snd_soc_component_update_bits(component,
 				LPASS_CDC_WSA2_TX1_SPKR_PROT_PATH_CTL,
 				0x10, 0x00);
+			snd_soc_component_update_bits(component,
+				LPASS_CDC_WSA2_TX0_SPKR_PROT_PATH_CTL,
+				0x20, 0x00);
+			snd_soc_component_update_bits(component,
+				LPASS_CDC_WSA2_TX1_SPKR_PROT_PATH_CTL,
+				0x20, 0x00);
 		}
 		if (test_bit(LPASS_CDC_WSA2_MACRO_TX1,
 			&wsa2_priv->active_ch_mask[LPASS_CDC_WSA2_MACRO_AIF_VI])) {
@@ -1244,6 +1221,12 @@ static int lpass_cdc_wsa2_macro_disable_vi_feedback(struct snd_soc_dapm_widget *
 			snd_soc_component_update_bits(component,
 				LPASS_CDC_WSA2_TX3_SPKR_PROT_PATH_CTL,
 				0x10, 0x00);
+			snd_soc_component_update_bits(component,
+				LPASS_CDC_WSA2_TX2_SPKR_PROT_PATH_CTL,
+				0x20, 0x00);
+			snd_soc_component_update_bits(component,
+				LPASS_CDC_WSA2_TX3_SPKR_PROT_PATH_CTL,
+				0x20, 0x00);
 		}
 		break;
 	}
@@ -1338,6 +1321,7 @@ static int lpass_cdc_wsa2_macro_enable_mix_path(struct snd_soc_dapm_widget *w,
 	u16 gain_reg;
 	int offset_val = 0;
 	int val = 0;
+	uint16_t mix_reg = 0;
 
 	dev_dbg(component->dev, "%s %d %s\n", __func__, event, w->name);
 
@@ -1351,8 +1335,15 @@ static int lpass_cdc_wsa2_macro_enable_mix_path(struct snd_soc_dapm_widget *w,
 		return 0;
 	}
 
+	mix_reg = LPASS_CDC_WSA2_RX0_RX_PATH_MIX_CTL +
+				LPASS_CDC_WSA2_MACRO_RX_PATH_OFFSET * w->shift;
 	switch (event) {
 	case SND_SOC_DAPM_PRE_PMU:
+		snd_soc_component_update_bits(component, mix_reg, 0x40, 0x40);
+		usleep_range(500, 510);
+		snd_soc_component_update_bits(component, mix_reg, 0x40, 0x00);
+		snd_soc_component_update_bits(component,
+					mix_reg, 0x20, 0x20);
 		lpass_cdc_wsa2_macro_enable_swr(w, kcontrol, event);
 		val = snd_soc_component_read(component, gain_reg);
 		val += offset_val;
@@ -1657,18 +1648,22 @@ static int lpass_cdc_wsa2_macro_enable_main_path(struct snd_soc_dapm_widget *w,
 	struct lpass_cdc_wsa2_macro_priv *wsa2_priv = NULL;
 	bool adie_lb = false;
 
+	dev_dbg(component->dev, "%s %d %s\n", __func__, event, w->name);
+
 	if (!lpass_cdc_wsa2_macro_get_data(component, &wsa2_dev, &wsa2_priv, __func__))
 		return -EINVAL;
 
-
 	reg = LPASS_CDC_WSA2_RX0_RX_PATH_CTL +
 			LPASS_CDC_WSA2_MACRO_RX_PATH_OFFSET * w->shift;
 	switch (event) {
 	case SND_SOC_DAPM_PRE_PMU:
+		snd_soc_component_update_bits(component, reg, 0x40, 0x40);
+		usleep_range(500, 510);
+		snd_soc_component_update_bits(component, reg, 0x40, 0x00);
+		snd_soc_component_update_bits(component,
+					reg, 0x20, 0x20);
 		if (lpass_cdc_wsa2_macro_adie_lb(component, w->shift)) {
 			adie_lb = true;
-			snd_soc_component_update_bits(component,
-						reg, 0x20, 0x20);
 			lpass_cdc_wsa_pa_on(wsa2_dev, adie_lb);
 			snd_soc_component_update_bits(component,
 						reg, 0x10, 0x00);