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asoc: codecs: Change WSA config params acquisition

Update WSA rload, system gain, bat_cfg to get from wsa_macro device tree.
WSA Bat_cfg change to read from VPHX_SYS_EN_STATUS reg.
Add device tree parsing for these params in WSA macro
and WSA driver.
Remove machine driver method of sending the parameters.
Add default_dev_mode (spkr vs rcv) from device tree for WSA.
Move code from spkr event to userspace controls or probe.
Change system_gain and affected params when switching between
dev_modes.
These changes simplify configuration data and code and allow
more registers to be written during bootup or before playback.

Change-Id: I79966c704adfac1bf2d85aa6519ea574764c7a8b
Signed-off-by: Matthew Rice <[email protected]>
Matthew Rice 3 years ago
parent
commit
311264875e

+ 43 - 0
asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c

@@ -1,5 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #include <linux/module.h>
@@ -251,6 +252,8 @@ enum {
  * @active_ch_cnt: channel count of all AIF DAIs
  * @rx_port_value: mixer ctl value of WSA RX MUXes
  * @wsa_io_base: Base address of WSA macro addr space
+ * @wsa_sys_gain System gain value, see wsa driver
+ * @wsa_rload Resistor load value for WSA Speaker, see wsa driver
  */
 struct lpass_cdc_wsa_macro_priv {
 	struct device *dev;
@@ -294,6 +297,11 @@ struct lpass_cdc_wsa_macro_priv {
 	uint32_t thermal_cur_state;
 	uint32_t thermal_max_state;
 	struct work_struct lpass_cdc_wsa_macro_cooling_work;
+	u32 wsa_rload[LPASS_CDC_WSA_MACRO_RX1 + 1];
+	u32 wsa_sys_gain[2 * (LPASS_CDC_WSA_MACRO_RX1 + 1)];
+	u32 wsa_bat_cfg[LPASS_CDC_WSA_MACRO_RX1 + 1];
+
+
 };
 
 static struct snd_soc_dai_driver lpass_cdc_wsa_macro_dai[];
@@ -3154,6 +3162,31 @@ static void lpass_cdc_wsa_macro_cooling_adjust_gain(struct work_struct *work)
 	return;
 }
 
+static int lpass_cdc_wsa_macro_read_array(struct platform_device *pdev,
+					  const char *name, int size,
+					  u32 *output)
+{
+	u32 len, ret;
+
+	if (!of_find_property(pdev->dev.of_node, name, &size)) {
+		dev_info(&pdev->dev, "%s: missing %s\n", __func__, name);
+		return 0;
+	}
+
+	len = size / sizeof(u32);
+	if (len != size) {
+		dev_info(&pdev->dev, "%s: invalid number of %s\n", __func__, name);
+		return -EINVAL;
+	}
+
+	ret = of_property_read_u32_array(pdev->dev.of_node, name, output, size);
+	if (ret)
+		dev_info(&pdev->dev, "%s: Failed to read %s\n", __func__, name);
+
+	return 0;
+
+}
+
 static void lpass_cdc_wsa_macro_init_ops(struct macro_ops *ops,
 			       char __iomem *wsa_io_base)
 {
@@ -3175,6 +3208,7 @@ static int lpass_cdc_wsa_macro_probe(struct platform_device *pdev)
 	char __iomem *wsa_io_base;
 	int ret = 0;
 	u32 is_used_wsa_swr_gpio = 1;
+
 	const char *is_used_wsa_swr_gpio_dt = "qcom,is-used-swr-gpio";
 
 	if (!lpass_cdc_is_va_macro_registered(&pdev->dev)) {
@@ -3229,6 +3263,15 @@ static int lpass_cdc_wsa_macro_probe(struct platform_device *pdev)
 		dev_err(&pdev->dev, "%s: ioremap failed\n", __func__);
 		return -EINVAL;
 	}
+
+	lpass_cdc_wsa_macro_read_array(pdev, "qcom,wsa-rloads",
+		LPASS_CDC_WSA_MACRO_RX1 + 1, wsa_priv->wsa_rload);
+	lpass_cdc_wsa_macro_read_array(pdev, "qcom,wsa-system-gains",
+		2 * (LPASS_CDC_WSA_MACRO_RX1 + 1), wsa_priv->wsa_sys_gain);
+	lpass_cdc_wsa_macro_read_array(pdev, "qcom,wsa-bat-cfgs",
+		LPASS_CDC_WSA_MACRO_RX1 + 1, wsa_priv->wsa_bat_cfg);
+
+
 	wsa_priv->wsa_io_base = wsa_io_base;
 	wsa_priv->reset_swr = true;
 	INIT_WORK(&wsa_priv->lpass_cdc_wsa_macro_add_child_devices_work,

+ 13 - 1
asoc/codecs/wsa884x/internal.h

@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
  * Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #ifndef WSA884X_INTERNAL_H
@@ -86,6 +87,12 @@ enum {
 	ENABLE,
 };
 
+enum {
+	SPEAKER,
+	RECEIVER,
+	MAX_DEV_MODE
+};
+
 enum {
 	SWR_DAC_PORT = 0,
 	SWR_COMP_PORT,
@@ -142,10 +149,13 @@ struct wsa884x_priv {
 	int version;
 	u8 pa_gain;
 	u8 bat_cfg;
-	u8 rload;
+	u32 rload;
 	u8 system_gain;
+	u32 sys_gains[MAX_DEV_MODE * 2];
+	bool default_dev_mode;
 	int min_gain;
 	int pa_aux_gain;
+	u8 dev_index;
 	struct irq_domain *virq;
 	struct wcd_irq_info irq_info;
 #ifdef CONFIG_DEBUG_FS
@@ -156,7 +166,9 @@ struct wsa884x_priv {
 	unsigned int read_data;
 #endif
 	struct device_node *parent_np;
+	struct device_node *macro_np;
 	struct platform_device *parent_dev;
+	struct platform_device *macro_dev;
 	struct notifier_block parent_nblock;
 	void *handle;
 	int (*register_notifier)(void *handle,

+ 186 - 121
asoc/codecs/wsa884x/wsa884x.c

@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
  * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #include <linux/module.h>
@@ -198,6 +199,7 @@ static const struct wsa_reg_mask_val reg_init[] = {
 	{REG_FIELD_VALUE(OTP_REG_40, ISENSE_RESCAL, 0x08)},
 	{REG_FIELD_VALUE(STB_CTRL1, SLOPE_COMP_CURRENT, 0x0D)},
 	{REG_FIELD_VALUE(ILIM_CTRL1, ILIM_OFFSET_PB, 0x03)},
+	{REG_FIELD_VALUE(CURRENT_LIMIT, CURRENT_LIMIT, 0x09)},
 	{REG_FIELD_VALUE(CKWD_CTL_1, CKWD_VCOMP_VREF_SEL, 0x13)},
 };
 
@@ -616,16 +618,85 @@ static irqreturn_t wsa884x_pa_on_err_handle_irq(int irq, void *data)
 	return IRQ_HANDLED;
 }
 
+static int wsa884x_set_gain_parameters(struct snd_soc_component *component)
+{
+	struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
+	u8 igain;
+	u8 vgain;
+
+	switch (wsa884x->bat_cfg) {
+	case CONFIG_1S:
+	case EXT_1S:
+		switch (wsa884x->system_gain) {
+		case G_21_DB:
+			wsa884x->comp_offset = COMP_OFFSET0;
+			wsa884x->min_gain = G_0_DB;
+			wsa884x->pa_aux_gain = PA_AUX_0_DB;
+			break;
+		case G_19P5_DB:
+			wsa884x->comp_offset = COMP_OFFSET1;
+			wsa884x->min_gain = G_M1P5_DB;
+			wsa884x->pa_aux_gain =  PA_AUX_M1P5_DB;
+			break;
+		case G_18_DB:
+			wsa884x->comp_offset = COMP_OFFSET2;
+			wsa884x->min_gain = G_M3_DB;
+			wsa884x->pa_aux_gain =  PA_AUX_M3_DB;
+			break;
+		case G_16P5_DB:
+			wsa884x->comp_offset = COMP_OFFSET3;
+			wsa884x->min_gain = G_M4P5_DB;
+			wsa884x->pa_aux_gain =  PA_AUX_M4P5_DB;
+			break;
+		default:
+			wsa884x->comp_offset = COMP_OFFSET4;
+			wsa884x->min_gain = G_M6_DB;
+			wsa884x->pa_aux_gain =  PA_AUX_M6_DB;
+			break;
+		}
+		break;
+	case CONFIG_3S:
+	case EXT_3S:
+		wsa884x->comp_offset = COMP_OFFSET0;
+		wsa884x->min_gain = G_7P5_DB;
+		wsa884x->pa_aux_gain =  PA_AUX_7P5_DB;
+		break;
+	case EXT_ABOVE_3S:
+		wsa884x->comp_offset = COMP_OFFSET0;
+		wsa884x->min_gain = G_12_DB;
+		wsa884x->pa_aux_gain =  PA_AUX_12_DB;
+		break;
+	default:
+		wsa884x->comp_offset = COMP_OFFSET0;
+		wsa884x->min_gain = G_0_DB;
+		wsa884x->pa_aux_gain = PA_AUX_0_DB;
+		break;
+	}
+
+	igain = isense_gain_data[wsa884x->system_gain][wsa884x->rload];
+	vgain = vsense_gain_data[wsa884x->system_gain];
+	snd_soc_component_update_bits(component,
+		REG_FIELD_VALUE(ISENSE2, ISENSE_GAIN_CTL, igain));
+	snd_soc_component_update_bits(component,
+		REG_FIELD_VALUE(VSENSE1, GAIN_VSENSE_FE, vgain));
+
+	snd_soc_component_update_bits(component,
+		REG_FIELD_VALUE(GAIN_RAMPING_MIN, MIN_GAIN, wsa884x->min_gain));
+
+	if (wsa884x->comp_enable)
+		snd_soc_component_update_bits(component,
+			REG_FIELD_VALUE(DRE_CTL_0, OFFSET,
+					wsa884x->comp_offset));
+	else
+		wsa884x->pa_aux_gain = pa_aux_no_comp[wsa884x->system_gain];
+
+	return 0;
+}
+
 static const char * const wsa_dev_mode_text[] = {
 	"speaker", "receiver"
 };
 
-enum {
-	SPEAKER,
-	RECEIVER,
-};
-
-
 static const struct soc_enum wsa_dev_mode_enum =
 	SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(wsa_dev_mode_text), wsa_dev_mode_text);
 
@@ -650,11 +721,19 @@ static int wsa_dev_mode_put(struct snd_kcontrol *kcontrol,
 	struct snd_soc_component *component =
 			snd_soc_kcontrol_component(kcontrol);
 	struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
+	int dev_mode;
 
-	dev_dbg(component->dev, "%s: ucontrol->value.integer.value[0]  = %ld\n",
-		__func__, ucontrol->value.integer.value[0]);
+	dev_mode = ucontrol->value.integer.value[0];
+	dev_dbg(component->dev, "%s: Dev Mode current: %d, new: %d  = %ld\n",
+		__func__, wsa884x->dev_mode, dev_mode);
 
-	wsa884x->dev_mode =  ucontrol->value.integer.value[0];
+	if (dev_mode >= SPEAKER && dev_mode <= RECEIVER) {
+		wsa884x->dev_mode =  dev_mode;
+		wsa884x->system_gain = wsa884x->sys_gains[
+			wsa884x->dev_mode + (wsa884x->dev_index - 1) * 2];
+	} else {
+		return -EINVAL;
+	}
 
 	return 0;
 }
@@ -910,18 +989,6 @@ int wsa884x_codec_info_create_codec_entry(struct snd_info_entry *codec_root,
 }
 EXPORT_SYMBOL(wsa884x_codec_info_create_codec_entry);
 
-int wsa884x_set_configuration(struct snd_soc_component *component,
-				     u8 rload, u8 bat_cfg, u8 system_gain)
-{
-	struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
-
-	wsa884x->rload = rload;
-	wsa884x->bat_cfg = bat_cfg;
-	wsa884x->system_gain = system_gain;
-	return 0;
-}
-EXPORT_SYMBOL(wsa884x_set_configuration);
-
 /*
  * wsa884x_codec_get_dev_num - returns swr device number
  * @component: Codec instance
@@ -1068,6 +1135,13 @@ static int wsa884x_set_pbr(struct snd_kcontrol *kcontrol,
 		snd_soc_component_update_bits(component,
 			WSA884X_CLSH_VTH1,
 			0xFF, 0xFF);
+		snd_soc_component_update_bits(component,
+			REG_FIELD_VALUE(CURRENT_LIMIT,
+			CURRENT_LIMIT_OVRD_EN, 0x00));
+	} else {
+		snd_soc_component_update_bits(component,
+			REG_FIELD_VALUE(CURRENT_LIMIT,
+			CURRENT_LIMIT_OVRD_EN, 0x01));
 	}
 
 	return 0;
@@ -1292,81 +1366,12 @@ static int wsa884x_enable_swr_dac_port(struct snd_soc_dapm_widget *w,
 	return 0;
 }
 
-static int wsa884x_set_gain_parameters(struct snd_soc_component *component)
-{
-	struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
-
-	switch (wsa884x->bat_cfg) {
-	case CONFIG_1S:
-	case EXT_1S:
-		switch (wsa884x->system_gain) {
-		case G_21_DB:
-			wsa884x->comp_offset = COMP_OFFSET0;
-			wsa884x->min_gain = G_0_DB;
-			wsa884x->pa_aux_gain = PA_AUX_0_DB;
-			break;
-		case G_19P5_DB:
-			wsa884x->comp_offset = COMP_OFFSET1;
-			wsa884x->min_gain = G_M1P5_DB;
-			wsa884x->pa_aux_gain =  PA_AUX_M1P5_DB;
-			break;
-		case G_18_DB:
-			wsa884x->comp_offset = COMP_OFFSET2;
-			wsa884x->min_gain = G_M3_DB;
-			wsa884x->pa_aux_gain =  PA_AUX_M3_DB;
-			break;
-		case G_16P5_DB:
-			wsa884x->comp_offset = COMP_OFFSET3;
-			wsa884x->min_gain = G_M4P5_DB;
-			wsa884x->pa_aux_gain =  PA_AUX_M4P5_DB;
-			break;
-		default:
-			wsa884x->comp_offset = COMP_OFFSET4;
-			wsa884x->min_gain = G_M6_DB;
-			wsa884x->pa_aux_gain =  PA_AUX_M6_DB;
-			break;
-		}
-		break;
-	case CONFIG_3S:
-	case EXT_3S:
-		wsa884x->comp_offset = COMP_OFFSET0;
-		wsa884x->min_gain = G_7P5_DB;
-		wsa884x->pa_aux_gain =  PA_AUX_7P5_DB;
-		break;
-	case EXT_ABOVE_3S:
-		wsa884x->comp_offset = COMP_OFFSET0;
-		wsa884x->min_gain = G_12_DB;
-		wsa884x->pa_aux_gain =  PA_AUX_12_DB;
-		break;
-	default:
-		wsa884x->comp_offset = COMP_OFFSET0;
-		wsa884x->min_gain = G_0_DB;
-		wsa884x->pa_aux_gain = PA_AUX_0_DB;
-		break;
-	}
-
-	if (!wsa884x->comp_enable)
-		wsa884x->pa_aux_gain = pa_aux_no_comp[wsa884x->system_gain];
-
-	snd_soc_component_update_bits(component,
-		REG_FIELD_VALUE(GAIN_RAMPING_MIN, MIN_GAIN, wsa884x->min_gain));
-	if (wsa884x->comp_enable)
-		snd_soc_component_update_bits(component,
-			REG_FIELD_VALUE(DRE_CTL_0, OFFSET,
-					wsa884x->comp_offset));
-	return 0;
-}
-
 static int wsa884x_spkr_event(struct snd_soc_dapm_widget *w,
 			struct snd_kcontrol *kcontrol, int event)
 {
 	struct snd_soc_component *component =
 			snd_soc_dapm_to_component(w->dapm);
 	struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
-	u8 igain;
-	u8 vgain;
-	u8 ana_wo_ctl_0_value;
-	u8 pa_aux_shift = 0x02;
 
 	dev_dbg(component->dev, "%s: %s %d\n", __func__, w->name, event);
 	switch (event) {
@@ -1374,19 +1379,11 @@ static int wsa884x_spkr_event(struct snd_soc_dapm_widget *w,
 		swr_slvdev_datapath_control(wsa884x->swr_slave,
 					    wsa884x->swr_slave->dev_num,
 					    true);
+		wcd_enable_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_PA_ON_ERR);
+		wcd_enable_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_UVLO);
+
+		/* Only written when there is a SPKR<->RECV switch */
 		wsa884x_set_gain_parameters(component);
-		/* Must write WO registers in a single write */
-		ana_wo_ctl_0_value = (0xC |
-				     (wsa884x->pa_aux_gain << pa_aux_shift) |
-				     !wsa884x->dev_mode);
-		snd_soc_component_update_bits(component,
-			WSA884X_ANA_WO_CTL_0, 0xFF, ana_wo_ctl_0_value);
-		snd_soc_component_update_bits(component,
-			WSA884X_ANA_WO_CTL_1, 0xFF, 0);
-		if (wsa884x->rload == WSA_4OHMS ||
-		    wsa884x->rload == WSA_6OHMS)
-			snd_soc_component_update_bits(component,
-				REG_FIELD_VALUE(OCP_CTL, OCP_CURR_LIMIT, 0x07));
 		if (wsa884x->dev_mode == SPEAKER) {
 			snd_soc_component_update_bits(component,
 				REG_FIELD_VALUE(DRE_CTL_0, PROG_DELAY, 0x0F));
@@ -1399,22 +1396,7 @@ static int wsa884x_spkr_event(struct snd_soc_dapm_widget *w,
 				REG_FIELD_VALUE(PWM_CLK_CTL,
 				PWM_CLK_FREQ_SEL, 0x01));
 		}
-		if (!wsa884x->pbr_enable) {
-			snd_soc_component_update_bits(component,
-				REG_FIELD_VALUE(CURRENT_LIMIT,
-				CURRENT_LIMIT_OVRD_EN, 0x01));
-			snd_soc_component_update_bits(component,
-				REG_FIELD_VALUE(CURRENT_LIMIT,
-				CURRENT_LIMIT, 0x09));
-		}
-		igain = isense_gain_data[wsa884x->system_gain][wsa884x->rload];
-		vgain = vsense_gain_data[wsa884x->system_gain];
-		snd_soc_component_update_bits(component,
-			REG_FIELD_VALUE(ISENSE2, ISENSE_GAIN_CTL, igain));
-		snd_soc_component_update_bits(component,
-			REG_FIELD_VALUE(VSENSE1, GAIN_VSENSE_FE, vgain));
-		wcd_enable_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_PA_ON_ERR);
-		wcd_enable_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_UVLO);
+
 		/* Force remove group */
 		swr_remove_from_group(wsa884x->swr_slave,
 				      wsa884x->swr_slave->dev_num);
@@ -1647,9 +1629,6 @@ static int wsa884x_codec_probe(struct snd_soc_component *component)
 	wsa884x->version = version;
 
 	wsa884x->comp_offset = COMP_OFFSET2;
-	wsa884x->bat_cfg = CONFIG_1S;
-	wsa884x->rload = WSA_8OHMS;
-	wsa884x->system_gain = G_19P5_DB;
 	wsa884x_codec_init(component);
 	wsa884x->global_pa_cnt = 0;
 
@@ -1896,6 +1875,9 @@ static int wsa884x_swr_probe(struct swr_device *pdev)
 	char buffer[MAX_NAME_LEN];
 	int dev_index = 0;
 	struct regmap_irq_chip *wsa884x_sub_regmap_irq_chip = NULL;
+	u8 wo0_val;
+	int sys_gain_size, sys_gain_length;
+
 
 	wsa884x = devm_kzalloc(&pdev->dev, sizeof(struct wsa884x_priv),
 			    GFP_KERNEL);
@@ -2104,6 +2086,89 @@ static int wsa884x_swr_probe(struct swr_device *pdev)
 		dev_info(&pdev->dev, "%s: parent node not found\n", __func__);
 	}
 
+	/* Start in speaker mode by default */
+	wsa884x->dev_mode = SPEAKER;
+	wsa884x->dev_index = dev_index;
+	wsa884x->macro_np = of_parse_phandle(pdev->dev.of_node,
+				"qcom,wsa-macro-handle", 0);
+	if (wsa884x->macro_np) {
+		wsa884x->macro_dev =
+				of_find_device_by_node(wsa884x->macro_np);
+		if (wsa884x->macro_dev) {
+			ret = of_property_read_u32_index(
+				wsa884x->macro_dev->dev.of_node,
+				"qcom,wsa-rloads",
+				dev_index - 1,
+				&wsa884x->rload);
+			if (ret) {
+				dev_err(&pdev->dev,
+					"%s: Failed to read wsa rloads\n",
+							__func__);
+				goto err_mem;
+			}
+
+			if (!of_find_property(wsa884x->macro_dev->dev.of_node,
+				"qcom,wsa-system-gains", &sys_gain_size)) {
+				dev_err(&pdev->dev,
+					"%s: missing wsa-system-gains\n",
+					__func__);
+				goto err_mem;
+			}
+
+			sys_gain_length = sys_gain_size / (2 * sizeof(u32));
+			ret = of_property_read_u32_array(
+				wsa884x->macro_dev->dev.of_node,
+				"qcom,wsa-system-gains", wsa884x->sys_gains,
+				sys_gain_length);
+
+			if (ret) {
+				dev_err(&pdev->dev,
+					"%s: Failed to read wsa system gains\n",
+						__func__);
+				goto err_mem;
+			}
+			wsa884x->system_gain = wsa884x->sys_gains[
+				wsa884x->dev_mode + (dev_index - 1) * 2];
+
+		} else {
+			dev_err(&pdev->dev, "%s: parent dev not found\n",
+				__func__);
+			goto err_mem;
+		}
+	} else {
+		dev_err(&pdev->dev, "%s: parent node not found\n", __func__);
+		goto err_mem;
+	}
+
+	wsa884x->bat_cfg = snd_soc_component_read(component,
+						  WSA884X_VPHX_SYS_EN_STATUS);
+	dev_dbg(component->dev,
+		"%s: Bat_cfg: 0x%x rload: 0x%x, sys_gain: 0x%x %x\n", __func__,
+		wsa884x->bat_cfg, wsa884x->rload, wsa884x->bat_cfg);
+	wsa884x_set_gain_parameters(component);
+	/* Must write WO registers in a single write */
+	wo0_val = (0xC | (wsa884x->pa_aux_gain << 0x02) | !wsa884x->dev_mode);
+	snd_soc_component_update_bits(component,
+		WSA884X_ANA_WO_CTL_0, 0xFF, wo0_val);
+	snd_soc_component_update_bits(component,
+		WSA884X_ANA_WO_CTL_1, 0xFF, 0);
+	if (wsa884x->rload == WSA_4OHMS || wsa884x->rload == WSA_6OHMS)
+		snd_soc_component_update_bits(component,
+			REG_FIELD_VALUE(OCP_CTL, OCP_CURR_LIMIT, 0x07));
+
+	if (wsa884x->dev_mode == SPEAKER) {
+		snd_soc_component_update_bits(component,
+			REG_FIELD_VALUE(DRE_CTL_0, PROG_DELAY, 0x0F));
+	} else {
+		snd_soc_component_update_bits(component,
+			REG_FIELD_VALUE(DRE_CTL_0, PROG_DELAY, 0x03));
+		snd_soc_component_update_bits(component,
+			REG_FIELD_VALUE(CDC_PATH_MODE, RXD_MODE, 0x01));
+		snd_soc_component_update_bits(component,
+			REG_FIELD_VALUE(PWM_CLK_CTL,
+			PWM_CLK_FREQ_SEL, 0x01));
+	}
+
 	mutex_init(&wsa884x->res_lock);
 
 #ifdef CONFIG_DEBUG_FS

+ 1 - 7
asoc/codecs/wsa884x/wsa884x.h

@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /* Copyright (c) 2015-2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #ifndef _WSA884X_H
@@ -25,8 +26,6 @@ int wsa884x_codec_info_create_codec_entry(
 					struct snd_info_entry *codec_root,
 					struct snd_soc_component *component);
 int wsa884x_codec_get_dev_num(struct snd_soc_component *component);
-int wsa884x_set_configuration(struct snd_soc_component *component,
-				     u8 rload, u8 bat_cfg, u8 system_gain);
 #else
 static int wsa884x_set_channel_map(struct snd_soc_component *component,
 				   u8 *port, u8 num_port, unsigned int *ch_mask,
@@ -47,11 +46,6 @@ static int wsa884x_codec_get_dev_num(struct snd_soc_component *component)
 	return 0;
 }
 
-static int wsa884x_set_configuration(struct snd_soc_component *component,
-				     u8 rload, u8 bat_cfg, u8 system_gain)
-{
-	return 0;
-}
 #endif
 
 #endif /* _WSA884X_H */

+ 0 - 12
asoc/kalama.c

@@ -1406,10 +1406,6 @@ static int msm_int_wsa_init(struct snd_soc_pcm_runtime *rtd)
 	struct msm_asoc_mach_data *pdata =
 				snd_soc_card_get_drvdata(rtd->card);
 
-	u8 wsa_rload[QUAD_SPEAKER] = {0x2, 0x2};
-	u8 wsa_bat_cfg[QUAD_SPEAKER] = {0x1, 0x1};
-	u8 wsa_system_gain[QUAD_SPEAKER] = {0x0, 0x0};
-
 	if (pdata->wsa_max_devs > 0) {
 		component = snd_soc_rtdcom_lookup(rtd, "wsa-codec.1");
 		if (!component) {
@@ -1423,8 +1419,6 @@ static int msm_int_wsa_init(struct snd_soc_pcm_runtime *rtd)
 
 		wsa884x_codec_info_create_codec_entry(pdata->codec_root,
 				component);
-		wsa884x_set_configuration(component, wsa_rload[0],
-			wsa_bat_cfg[0], wsa_system_gain[0]);
 	}
 
 	/* If current platform has more than one WSA */
@@ -1441,8 +1435,6 @@ static int msm_int_wsa_init(struct snd_soc_pcm_runtime *rtd)
 
 		wsa884x_codec_info_create_codec_entry(pdata->codec_root,
 			component);
-		wsa884x_set_configuration(component, wsa_rload[1],
-			wsa_bat_cfg[1], wsa_system_gain[1]);
 	}
 
 	if (pdata->wsa_max_devs > 2) {
@@ -1458,8 +1450,6 @@ static int msm_int_wsa_init(struct snd_soc_pcm_runtime *rtd)
 
 		wsa884x_codec_info_create_codec_entry(pdata->codec_root,
 			component);
-		wsa884x_set_configuration(component, wsa_rload[2],
-			wsa_bat_cfg[2], wsa_system_gain[2]);
 	}
 
 	if (pdata->wsa_max_devs > 3) {
@@ -1475,8 +1465,6 @@ static int msm_int_wsa_init(struct snd_soc_pcm_runtime *rtd)
 
 		wsa884x_codec_info_create_codec_entry(pdata->codec_root,
 			component);
-		wsa884x_set_configuration(component, wsa_rload[3],
-			wsa_bat_cfg[3], wsa_system_gain[3]);
 	}
 
 	msm_common_dai_link_init(rtd);