asoc: codecs: Enable main path clk before enabling mix path

Mix path clk is gated by main path clk, as per current logic we are not
enabling main path clk for mix path use-cases.

Enable main path clk before enabling mix path for UPD dedicated backend
to work.

Change-Id: I209d1eaf25f4ef08bbd534f5ecc858e465ce7e18
Signed-off-by: Faiz Nabi Kuchay <[email protected]>

asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c

@@ -1323,6 +1323,7 @@ static int lpass_cdc_wsa_macro_enable_mix_path(struct snd_soc_dapm_widget *w,
 	int offset_val = 0;
 	int val = 0;
 	uint16_t mix_reg = 0;
+	uint16_t reg = 0;
 
 	dev_dbg(component->dev, "%s %d %s\n", __func__, event, w->name);
 
@@ -1336,6 +1337,8 @@ static int lpass_cdc_wsa_macro_enable_mix_path(struct snd_soc_dapm_widget *w,
 		return 0;
 	}
 
+	reg = LPASS_CDC_WSA_RX0_RX_PATH_CTL +
+			(LPASS_CDC_WSA_MACRO_RX_PATH_OFFSET *  w->shift);
 	mix_reg = LPASS_CDC_WSA_RX0_RX_PATH_MIX_CTL +
 			LPASS_CDC_WSA_MACRO_RX_PATH_OFFSET * w->shift;
 
@@ -1344,6 +1347,8 @@ static int lpass_cdc_wsa_macro_enable_mix_path(struct snd_soc_dapm_widget *w,
 		snd_soc_component_update_bits(component, mix_reg, 0x40, 0x40);
 		usleep_range(500, 510);
 		snd_soc_component_update_bits(component, mix_reg, 0x40, 0x00);
+		snd_soc_component_update_bits(component,
+					reg, 0x20, 0x20);
 		snd_soc_component_update_bits(component,
 					mix_reg, 0x20, 0x20);
 		lpass_cdc_wsa_macro_enable_swr(w, kcontrol, event);

asoc/codecs/lpass-cdc/lpass-cdc-wsa2-macro.c

@@ -1329,6 +1329,7 @@ static int lpass_cdc_wsa2_macro_enable_mix_path(struct snd_soc_dapm_widget *w,
 	int offset_val = 0;
 	int val = 0;
 	uint16_t mix_reg = 0;
+	uint16_t reg = 0;
 
 	dev_dbg(component->dev, "%s %d %s\n", __func__, event, w->name);
 
@@ -1342,13 +1343,17 @@ static int lpass_cdc_wsa2_macro_enable_mix_path(struct snd_soc_dapm_widget *w,
 		return 0;
 	}
 
+	reg = LPASS_CDC_WSA2_RX0_RX_PATH_CTL +
+				LPASS_CDC_WSA2_MACRO_RX_PATH_OFFSET * w->shift;
 	mix_reg = LPASS_CDC_WSA2_RX0_RX_PATH_MIX_CTL +
 				LPASS_CDC_WSA2_MACRO_RX_PATH_OFFSET * w->shift;
+
 	switch (event) {
 	case SND_SOC_DAPM_PRE_PMU:
 		snd_soc_component_update_bits(component, mix_reg, 0x40, 0x40);
 		usleep_range(500, 510);
 		snd_soc_component_update_bits(component, mix_reg, 0x40, 0x00);
+		snd_soc_component_update_bits(component, reg, 0x20, 0x20);
 		snd_soc_component_update_bits(component,
 					mix_reg, 0x20, 0x20);
 		lpass_cdc_wsa2_macro_enable_swr(w, kcontrol, event);