Gráfico de commits

618 Commits

Autor SHA1 Mensagem Data
qctecmdr
5e39019863 Merge "msm: ipa: fix page_recycle_cnt array size" 2021-05-20 20:04:22 -07:00
qctecmdr
ad073dd8ed Merge "msm: ipa: fix to MHIP LPM mode" 2021-05-20 19:20:17 -07:00
qctecmdr
76f2b86821 Merge "msm: gsi: Add debug code for Flow Control" 2021-05-20 18:08:58 -07:00
Sivan Reinstein
5b713d37b0 msm: gsi: Add debug code for Flow Control
Increase timeout while waiting for FC command to complete.
For enable FC command wait longer in case PENDING bit is set.

Change-Id: I6d4443b1688d2ae426079638216829a4ddb30d94
Acked-by: Nadav Levintov <nadavl@qti.qualcomm.com>
Signed-off-by: Sivan Reinstein <sivanr@codeaurora.org>
2021-05-20 09:14:08 +03:00
Michael Adisumarta
685be554e1 msm: ipa: fix page_recycle_cnt array size
Increase the array size to include recycle count for
LL pipe as well.

Change-Id: I607067d01fc4fd2c756f36ebea965cbe37666cb2
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2021-05-19 17:04:07 -07:00
qctecmdr
95ca49f517 Merge "ipa-kernel-tests: Pull latest changes" 2021-05-18 11:35:56 -07:00
Ashok Vuyyuru
bc67a6408e msm: ipa3: Fix to save sgt table info in proper context
Sg table tables are not contiguous page due to this while copying
total sg table it failing. To avoid this copying the each sg
table individually

Change-Id: I08dfceaaee674ab642126c42d6978af5749d9909
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
2021-05-17 15:44:17 +05:30
qctecmdr
089976fc29 Merge "msm: ipa3: Changes to read the halt command return code after some delay" 2021-05-14 00:52:38 -07:00
qctecmdr
eacf46ce27 Merge "msm: ipa: update IPA clock plan for 5.0" 2021-05-13 22:52:36 -07:00
qctecmdr
199beb54af Merge "msm: ipa: fix for common event ring size" 2021-05-13 17:35:58 -07:00
Michael Adisumarta
9eea7feb1c msm: ipa: fix for common event ring size
When common event ring size is used, event ring memory is shared
across the pipes. Make changes to not increase the descriptor
fifo memory for pipes which use common event ring.

Change-Id: I3b93c8074c8c85eca2f04f18057dad6bfa7a8581
Signed-off-by: Chaitanya Pratapa <cpratapa@codeaurora.org>
2021-05-13 12:06:56 -07:00
Ashok Vuyyuru
797b181281 msm: ipa3: Changes to read the halt command return code after some delay
In some cases for updating the return code in SCRATCH register taking
time after raising the global interrupt. Adding changes to wait for
some time read the SCRATCH register again and also printing the
test bus registers and Q6 channel state in failed scenario.

Change-Id: I4112a2290739daa79629f718d9725258518aba4c
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
2021-05-13 11:59:29 +05:30
Bojun Pan
d71131b194 msm: ipa: add ipa pkt threshold functionality
ioctl interface to config the pkt threshold.

Change-Id: I71c037d17d14283bdcf456a255259fca42040821
2021-05-12 14:46:30 -07:00
Bojun Pan
358648ec10 msm: ipa: revert "add ipa pkt threshold functionality"
This reverts commit c1c1fd1cf3.

Change-Id: Ice7ace5dbd7d3bfdf9fc6280cdefa8ab5d806932
2021-05-12 14:36:42 -07:00
qctecmdr
fc1ef37e26 Merge "ip-accelerator: Add kernel-test to verify dynamic FLT table move" 2021-05-12 07:50:01 -07:00
qctecmdr
37553a788a Merge "msm: ipa: Clear IEOB for stopped channels with MSI IRQ" 2021-05-12 06:21:23 -07:00
qctecmdr
607b84c377 Merge "msm: ipa: enable multi queue on rmnet_ipa0" 2021-05-12 05:45:14 -07:00
qctecmdr
bb7b7dc551 Merge "msm:ipa: don't assert on wrong flt parameters" 2021-05-12 05:07:33 -07:00
Sivan Reinstein
aad6531b8d ip-accelerator: Add kernel-test to verify dynamic FLT table move
Verify dynamic move of FLT table between SRAM and DDR

Change-Id: Ib4d3248697dc7c9d484163cbf827e809697b8c84
Acked-by: Nadav Levintov <nadavl@qti.qualcomm.com>
Signed-off-by: Sivan Reinstein <sivanr@codeaurora.org>
2021-05-12 12:15:04 +03:00
qctecmdr
506114ab6c Merge "msm: ipa4: Add changes to support PCIe addr for WDI2 over GSI" 2021-05-11 23:05:28 -07:00
Sivan Reinstein
2a9bd8f3af msm: ipa: Clear IEOB for stopped channels with MSI IRQ
Clear IEOBs as part of CH stop for channels with MSI IRQ type

Change-Id: I7b9af7f385b0876fc2f43314bd3588110911a021
Acked-by: Nadav Levintov <nadav@qti.qualcomm.com>
Signed-off-by: Sivan Reinstein <sivanr@codeaurora.org>
2021-05-11 22:51:29 -07:00
qctecmdr
84a087fefa Merge "msm: ipa4: Enable dynamic switch between WDI2 and WDI3" 2021-05-11 22:27:35 -07:00
qctecmdr
56f3b1c620 Merge "msm: ipa3: new low latency data pipes support" 2021-05-11 21:50:59 -07:00
qctecmdr
23bbb03606 Merge "IPA: ipa3_tx_dp remove redundant variable" 2021-05-11 13:28:48 -07:00
Amir Levy
8f6db82c32 IPA: ipa3_tx_dp remove redundant variable
Removing a variable which was only set to NULL and later "freed".

Change-Id: I4973f8f2850669b9092eddee6d4179ab2089f227
Acked-by: Eliad Ben Yishay <ebenyish@qti.qualcomm.com>
Signed-off-by: Amir Levy <alevy@codeaurora.org>
2021-05-11 06:19:33 -07:00
Amir Levy
b14a195498 msm: IPA: ULSO LAN USB - RNDIS driver change
Support for ULSO LAN USB use case in rndis datapath.

Change-Id: I2035e5fcc7c927cc3e5d7f5652fb017c304b5ad5
Acked-by: Eliad Ben Yishay <ebenyish@qti.qualcomm.com>
Signed-off-by: Amir Levy <alevy@codeaurora.org>
2021-05-11 05:49:50 -07:00
Ashok Vuyyuru
581d69866d msm: ipa3: Changes to keep IPA clock voted in panic notifier
Adding changes to avoid unclocked access in panic notifier.
Increasing the IPA clock vote before saving the IPA registers.

Change-Id: Ie055ffa844df45b8a65603190495bc2d1cc3f84a
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
2021-05-10 22:30:59 -07:00
Michael Adisumarta
91efd29ef8 msm: ipa3: new low latency data pipes support
Includes low latency data pipe definition and
support for waipio.

Change-Id: I0158eb15b38de0dfd2b0052b699c69a7c7f58fa1
Signed-off-by: Michael Adisumarta <madisuma@codeaurora.org>
2021-05-10 17:21:49 -07:00
qctecmdr
92a085730d Merge "msm: ipa: add ipa pkt threshold functionality" 2021-05-10 10:18:40 -07:00
qctecmdr
aeea2f09f3 Merge "msm: ipa3: Adding chnages to update event RP from DDR" 2021-05-10 08:58:37 -07:00
Pooja Kumari
2a84451352 msm: ipa4: Add changes to support PCIe addr for WDI2 over GSI
Add changes to support PCIe addr for WDI2 over GSI.

Change-Id: Ibdf9e577990f9036fb22fa09378f47bbda37defa
Signed-off-by: Pooja Kumari <kumarip@codeaurora.org>
2021-05-10 04:58:52 -07:00
Pooja Kumari
0a25f1ce91 msm: ipa4: Enable dynamic switch between WDI2 and WDI3
Make change in techpack to enable WDI2 and
dynamic switching between WDI3 and WDI2
based on wlan input.

Change-Id: Ifa7fb2798e937cf8d0f0fadf7b204106a0eb4ce0
Signed-off-by: Pooja Kumari <kumarip@codeaurora.org>
2021-05-10 04:58:28 -07:00
qctecmdr
83f25ced0b Merge "msm: ipa: support new qmi request for hw filter stats info" 2021-05-09 14:56:03 -07:00
qctecmdr
3c771ef777 Merge "msm: ipa5: avoid NULL access in qmi_send_req_wait" 2021-05-07 19:45:37 -07:00
qctecmdr
9f9419fbae Merge "msm: ipa: update IPA clock plan for 5.1" 2021-05-07 17:37:56 -07:00
qctecmdr
ee167d89ca Merge "ipa: Take care of header table corner cases" 2021-05-07 01:48:17 -07:00
qctecmdr
db830a061d Merge "msm: ipa3: Changes to check disconnect in progress while sending data" 2021-05-06 15:48:04 -07:00
qctecmdr
68d72628a0 Merge "msm: ipa: page pool recycling enhancements" 2021-05-06 15:13:00 -07:00
Chaitanya Pratapa
1dd8898b3c msm: ipa: fix to MHIP LPM mode
There is no requirement to hold a vote for MHI device node
once the HW path is setup as this will block AP to go to
suspend state. Make changes to not hold MHI device vote
and only vote for PCIe link.

Change-Id: I2edf46ed44210c0f6f84375ad0f4d8522e4153c9
Signed-off-by: Chaitanya Pratapa <cpratapa@codeaurora.org>
2021-05-06 10:38:17 -07:00
Ashok Vuyyuru
d5c796665b msm: ipa3: Changes to check disconnect in progress while sending data
In SSR scenario while teardown the pipe there could be possibility to
receive the UL data to avoid queuing the data checking for disconnect
InProgress flag.

Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
Change-Id: I73397e51e6e7affae71313d08356f809788db484
2021-05-06 10:25:23 -07:00
Ashok Vuyyuru
9ea98412c7 msm: ipa3: Adding chnages to update event RP from DDR
In suspend scenario while checking channel empty scenario
updating the event ring RP pointer from direct register, it
may cause mismatch in reading in polling context. To avoid
discrepancy  reading RP pointer DDR location.

Change-Id: Ie198ea9ace033e31463acd974f10dccdcac45c55
Signed-off-by: Ashok Vuyyuru <avuyyuru@codeaurora.org>
2021-05-06 22:50:16 +05:30
Amir Levy
a779045daa msm:ipa: don't assert on wrong flt parameters
If given flt parameters are wrong, there is no need to
assert, just return an error.

Change-Id: I130b94928b2f1959585d5288fd1577d706424761
Signed-off-by: Amir Levy <alevy@codeaurora.org>
2021-05-06 10:00:40 -07:00
qctecmdr
5f833251e9 Merge "ipa-kernel-tests: Add ULSO to EP config" 2021-05-06 05:39:11 -07:00
qctecmdr
a5f12fda5d Merge "ipa: Do not commit partial only headers" 2021-05-06 01:55:33 -07:00
Ilia Lin
253428ee49 ipa-kernel-tests: Pull latest changes
Updating the kernel tests to the latest sha1 form the old project:
367590c22ab9d77f22290f0b11bd55b8c9e050cd

Specifically porting the changes:
1. I93a09b45ac1e04107ddf0f5af0782251e45dfaaf
2. Ic816ed3da12cb82a23a745467d6ed818ce569492

Change-Id: I71fe69ba02f3134d3ab9d2a8d5cf6b95ef7694ef
Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
2021-05-06 11:38:16 +03:00
Ilia Lin
809e12ad09 ipa-kernel-tests: Add ULSO to EP config
Change-Id: Id8f5e0db58b1ec3e72dbe6457b7338f19eaa29ea
Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
2021-05-05 23:51:06 -07:00
qctecmdr
389f327c0f Merge "msm:ipa: DDR to SRAM optimization for eth" 2021-05-05 15:47:03 -07:00
qctecmdr
5e63fdb447 Merge "msm: ipa: Enable GSI Channel almost empty Feature" 2021-05-05 15:11:15 -07:00
Chaitanya Pratapa
ac6f7e39fb msm: ipa: enable multi queue on rmnet_ipa0
Enable multi-queue on rmnet_ipa0 to segregate LL traffic
from default traffic. Default traffic uses rx-0 and LL
traffic uses rx-1.

Change-Id: I438497a44555455721162fc696a3565b3f2cd1b6
Signed-off-by: Chaitanya Pratapa <cpratapa@codeaurora.org>
2021-05-05 11:16:23 -07:00
qctecmdr
432970c45d Merge "msm: ipa3: add ipa sw-flt functionality" 2021-05-05 09:51:12 -07:00