Merge "msm: ipa3: Changes to read the halt command return code after some delay"

drivers/platform/msm/gsi/gsi.c

@@ -4606,6 +4606,35 @@ void gsi_get_inst_ram_offset_and_size(unsigned long *base_offset,
 }
 EXPORT_SYMBOL(gsi_get_inst_ram_offset_and_size);
 
+/*
+ * Dumping the Debug registers for halt issue debugging.
+ */
+static void gsi_dump_halt_debug_reg(unsigned int chan_idx, unsigned int ee)
+{
+	struct gsihal_reg_ch_k_cntxt_0 ch_k_cntxt_0;
+
+	GSIERR("DEBUG_PC_FOR_DEBUG = 0x%x\n",
+		gsihal_read_reg(GSI_EE_n_GSI_DEBUG_PC_FOR_DEBUG));
+
+	GSIERR("GSI_DEBUG_BUSY_REG 0x%x\n",
+		gsihal_read_reg(GSI_EE_n_GSI_DEBUG_BUSY_REG));
+
+	GSIERR("GSI_EE_n_CNTXT_GLOB_IRQ_EN_OFFS = 0x%x\n",
+			gsihal_read_reg_n(GSI_EE_n_CNTXT_GLOB_IRQ_EN, gsi_ctx->per.ee));
+
+	GSIERR("GSI_EE_n_CNTXT_GLOB_IRQ_STTS_OFFS IRQ type = 0x%x\n",
+		gsihal_read_reg_n(GSI_EE_n_CNTXT_GLOB_IRQ_EN, gsi_ctx->per.ee));
+
+	GSIERR("GSI_EE_n_CNTXT_SCRATCH_0_OFFS = 0x%x\n",
+		 gsihal_read_reg_n(GSI_EE_n_CNTXT_SCRATCH_0, gsi_ctx->per.ee));
+	if (gsi_ctx->per.ver >= GSI_VER_2_9)
+		GSIERR("GSI_EE_n_GSI_CH_k_SCRATCH_4 = 0x%x\n",
+			gsihal_read_reg_nk(GSI_EE_n_GSI_CH_k_SCRATCH_4, ee, chan_idx));
+
+	gsihal_read_reg_nk_fields(GSI_EE_n_GSI_CH_k_CNTXT_0, ee, chan_idx, &ch_k_cntxt_0);
+	GSIERR("Q6 channel [%d] state =  %d\n", chan_idx, ch_k_cntxt_0.chstate);
+}
+
 int gsi_halt_channel_ee(unsigned int chan_idx, unsigned int ee, int *code)
 {
 	enum gsi_generic_ee_cmd_opcode op = GSI_GEN_EE_CMD_HALT_CHANNEL;
@@ -4658,8 +4687,17 @@ int gsi_halt_channel_ee(unsigned int chan_idx, unsigned int ee, int *code)
 	}
 	if (gsi_ctx->scratch.word0.s.generic_ee_cmd_return_code == 0) {
 		GSIERR("No response received\n");
-		res = -GSI_STATUS_ERROR;
-		goto free_lock;
+		gsi_dump_halt_debug_reg(chan_idx, ee);
+		usleep_range(GSI_RESET_WA_MIN_SLEEP, GSI_RESET_WA_MAX_SLEEP);
+		GSIERR("Reading after usleep scratch 0 reg\n");
+		gsi_ctx->scratch.word0.val = gsihal_read_reg_n(GSI_EE_n_CNTXT_SCRATCH_0,
+				 gsi_ctx->per.ee);
+		if (gsi_ctx->scratch.word0.s.generic_ee_cmd_return_code == 0) {
+			GSIERR("No response received second attempt\n");
+			gsi_dump_halt_debug_reg(chan_idx, ee);
+			res = -GSI_STATUS_ERROR;
+			goto free_lock;
+		}
 	}
 
 	res = GSI_STATUS_SUCCESS;

drivers/platform/msm/gsi/gsihal/gsihal_reg.c

@@ -172,6 +172,8 @@ static const char *gsireg_name_to_str[GSI_REG_MAX] = {
 	__stringify(GSI_GSI_MCS_PROFILING_MCS_IDLE_CNT_LSB),
 	__stringify(GSI_GSI_MCS_PROFILING_MCS_IDLE_CNT_MSB),
 	__stringify(GSI_EE_n_CH_k_CH_ALMST_EMPTY_THRSHOLD),
+	__stringify(GSI_EE_n_GSI_DEBUG_PC_FOR_DEBUG),
+	__stringify(GSI_EE_n_GSI_DEBUG_BUSY_REG),
 };
 
 /*
@@ -1449,6 +1451,12 @@ static struct gsihal_reg_obj gsihal_reg_objs[GSI_VER_MAX][GSI_REG_MAX] = {
 	[GSI_VER_1_0][GSI_GSI_INST_RAM_n] = {
 	gsireg_construct_dummy, gsireg_parse_dummy,
 	0x00004000, GSI_GSI_INST_RAM_n_WORD_SZ, 0},
+	[GSI_VER_1_0][GSI_EE_n_GSI_DEBUG_BUSY_REG] = {
+	gsireg_construct_dummy, gsireg_parse_dummy,
+	0x00001010, 0, 0},
+	[GSI_VER_1_0][GSI_EE_n_GSI_DEBUG_PC_FOR_DEBUG] = {
+	gsireg_construct_dummy, gsireg_parse_dummy,
+	0x00001048, 0, 0},
 
 	/* GSIv1_2 */
 	[GSI_VER_1_2][GSI_EE_n_GSI_HW_PARAM] = {
@@ -1719,6 +1727,9 @@ static struct gsihal_reg_obj gsihal_reg_objs[GSI_VER_MAX][GSI_REG_MAX] = {
 	[GSI_VER_2_9][GSI_GSI_MCS_PROFILING_MCS_IDLE_CNT_MSB] = {
 	gsireg_construct_dummy, gsireg_parse_dummy,
 	0x00001878, 0, 0 },
+	[GSI_VER_2_9][GSI_EE_n_GSI_CH_k_SCRATCH_4] = {
+	gsireg_construct_dummy, gsireg_parse_dummy,
+	0x0000f040, 0x4000, 0x80 },
 
 	/* GSIv2_11 */
 	[GSI_VER_2_11][GSI_GSI_IRAM_PTR_MSI_DB] = {

drivers/platform/msm/gsi/gsihal/gsihal_reg.h

@@ -162,6 +162,8 @@ enum gsihal_reg_name {
 	GSI_GSI_MCS_PROFILING_MCS_IDLE_CNT_LSB,
 	GSI_GSI_MCS_PROFILING_MCS_IDLE_CNT_MSB,
 	GSI_EE_n_CH_k_CH_ALMST_EMPTY_THRSHOLD,
+	GSI_EE_n_GSI_DEBUG_PC_FOR_DEBUG,
+	GSI_EE_n_GSI_DEBUG_BUSY_REG,
 	GSI_REG_MAX
 };