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@@ -39,6 +39,11 @@
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#define IPA_V4_0_CLK_RATE_NOMINAL (220 * 1000 * 1000UL)
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#define IPA_V4_0_CLK_RATE_TURBO (250 * 1000 * 1000UL)
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+#define IPA_V5_0_CLK_RATE_SVS2 (120 * 1000 * 1000UL)
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+#define IPA_V5_0_CLK_RATE_SVS (240 * 1000 * 1000UL)
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+#define IPA_V5_0_CLK_RATE_NOMINAL (500 * 1000 * 1000UL)
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+#define IPA_V5_0_CLK_RATE_TURBO (600 * 1000 * 1000UL)
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+
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#define IPA_MAX_HOLB_TMR_VAL (4294967296 - 1)
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#define IPA_V3_0_BW_THRESHOLD_TURBO_MBPS (1000)
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@@ -8995,7 +9000,12 @@ int ipa3_init_mem_partition(enum ipa_hw_type type)
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int ipa3_controller_static_bind(struct ipa3_controller *ctrl,
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enum ipa_hw_type hw_type, u32 ipa_cfg_offset)
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{
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- if (hw_type >= IPA_HW_v4_0) {
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+ if (hw_type >= IPA_HW_v5_1) {
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+ ctrl->ipa_clk_rate_turbo = IPA_V5_0_CLK_RATE_TURBO;
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+ ctrl->ipa_clk_rate_nominal = IPA_V5_0_CLK_RATE_NOMINAL;
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+ ctrl->ipa_clk_rate_svs = IPA_V5_0_CLK_RATE_SVS;
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+ ctrl->ipa_clk_rate_svs2 = IPA_V5_0_CLK_RATE_SVS2;
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+ } else if (hw_type >= IPA_HW_v4_0) {
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ctrl->ipa_clk_rate_turbo = IPA_V4_0_CLK_RATE_TURBO;
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ctrl->ipa_clk_rate_nominal = IPA_V4_0_CLK_RATE_NOMINAL;
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ctrl->ipa_clk_rate_svs = IPA_V4_0_CLK_RATE_SVS;
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qctecmdr