Update from SOC_ENUM to SOC_SINGLE to match rest of driver
implementation. Also remove remaining dev_mode enum references
in wsa884x driver.
Change-Id: I2a477c4fa8c29373ffa1e8e2eb599a0f1c61653d
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
replace all dev(pr)_err/info logs
that could potentially flood kernel logs with
ratelimit functions dev_err_ratelimited and
dev_info_ratelimited
Change-Id: I32dc6002dead1a07622978c4de63d541c01982fd
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
idle detect thr is a fixed value, do not need to change
Add debug statements in idle detect control func
Change-Id: I68a049f8560a1a444c019df2dc09f7cf62b37d46
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
the offset between LPASS_CDC_WSA_RX_INP_MUX_RX_INT0_CFG1 and
LPASS_CDC_WSA_RX_INP_MUX_RX_INT1_CFG1 is 8 so updating
0x104 + 8* interp
update ng block register write for NG2 mode in Kundu
Change-Id: I44da894feebb5d25bd467ffd4d54adde111778e6
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
Use LEGACY source if any of the below use cases is met:
EAR, PBR OFF, IDLE, NG2 and PA GAIN <= 13.5dB
Use PRE-LA when: All other cases
Change-Id: Iace0c1f6fea367a73cd604b958bd5c8905d29509
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
Cast returned u16 value to int in VA/TX macro: clk_div_get
to avoid possible data type warnings seen in function
caller.
Change-Id: I08943a26294ce54a207b739867292c01d090623e
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Can now set these registers during init once these values are
acquired.
Method called again before playback in case there are
speaker/recv changes.
Change-Id: I1b544633a660e98acadf94b9589b7656edebdd56
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Update mode argument type from int to u32 to avoid
any potential data loss since input is also u32 type.
Change-Id: I9541a7da20d2a22a0066622736268adffde5adbf
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Add new lpass RX paths. Needed to fix
WSA ADIE Loopback.
Update DAPM enum length to include these RXs.
Change-Id: Ie174cfab20b8beb103eefa94636e76ad756c7345
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Found potential issues relating to uninitialized or out-of-bounds variables
present in codec drivers. Place checks to ensure proper ranges are used.
Change-Id: Ib68cba2413788a57237f1f18fc5ce5fb5c6bfb0a
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Update function to correctly read array from device tree.
Previously not reading values and returning -EINVAL.
WSA bat_cfg/rload/sys_gain are now correctly configured.
Also add softclip clock enable during pbr config.
Change-Id: Ia1b93acfde3e799b3b72e05966d0fa955c3f49ac
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Add idle detect source select based on NG mode,
if NG2 then source is PRE-LA else LEGACY
Change-Id: I4e0cb3825960e6b795038fb5e85cfaa7a2fbfe62
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
Add idle detect enable for mixed control path,
and update copyright markings
Change-Id: Idf2932cd1813082f60ee96010788cdb1ef36afbf
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
Lpass-side enablement of new WSA feature.
Configure PBR registers based on WSA bat_cfg/rload/sys_gain.
Some registers updated during init, others during enable_interpolator.
Change-Id: Iac42672182827a9da47700319c61b9d0a17d0936
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Update WSA rload, system gain, bat_cfg to get from wsa_macro device tree.
WSA Bat_cfg change to read from VPHX_SYS_EN_STATUS reg.
Add device tree parsing for these params in WSA macro
and WSA driver.
Remove machine driver method of sending the parameters.
Add default_dev_mode (spkr vs rcv) from device tree for WSA.
Move code from spkr event to userspace controls or probe.
Change system_gain and affected params when switching between
dev_modes.
These changes simplify configuration data and code and allow
more registers to be written during bootup or before playback.
Change-Id: I79966c704adfac1bf2d85aa6519ea574764c7a8b
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Udpate MSM DMIC power up sequence to reduce pop.
Change-Id: I5f3f2e439e31877d3f21c05575c95942b937252e
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>
add kalama config file to all drivers' Kbuild, including soc/dsp/ipc
Change-Id: I56a6092da515f211a56617f0cff60079dbf0aa39
Signed-off-by: Junkai Cai <junkai@quicinc.com>
Sometimes after SSR/DPR is triggered, RX_TX_CORE_CLK, WSA_TX_CORE_CLK
and WSA2_TX_CORE_CLK are not reset which causes WSA or WCD not
detected. Make this change to add reset during SSR.
Change-Id: I343f2f92244de3eee844e220a6201b389dc647b4
Signed-off-by: Meng Wang <mengw@codeaurora.org>
Add support to use 4p8MHz DAC rate for receiver over WSA.
Change-Id: Ia0811670326be8131687fbdff70464da063902b2
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
Add changes to use wsa883x for receiver with
low_noise mode settings.
Change-Id: Icfa43ebbdb1e366f365053535f541bee03751ca3
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
When SWR MIC is used, lpass-cdc doesn't know if it's amic
or dmic on WCD. Add new mixer control to indicate if
swr_dmic is used or not.
Change-Id: I2910053d1da9110edfe9b021df744f9d1662d158
Signed-off-by: Meng Wang <mengw@codeaurora.org>
When adsp SSR happens, VA_MCLK enabled by VA_SWR_PWR widget will
not be disabled as ADSP is down and it cannot enable TX_MCLk before
disabling VA_MCLK. After disabling SVA, VA_MCLk is left open.
Add dev_up flag to indicate SSR and close VA_MCLK during SSR.
Change-Id: Ic544ce32c46054c7362d3eb07a4a47ec115d2651
Signed-off-by: Meng Wang <mengw@codeaurora.org>
Thermal framework is expected an error to be returned if the requested
cur_state exceed the max_state.
Change-Id: I1e0d8124a1aa6c0d755b35225207638aefdcb464
Signed-off-by: Junkai Cai <junkai@codeaurora.org>
Update central broadcast register control to enable bcl path.
Change-Id: Ibc05289d9cdd41e81369c6ef2547eceffa36d73a
Signed-off-by: Vignesh Kulothungan <vigneshk@codeaurora.org>
When reading/writing lpass codec registers, pm_runtime_put_autosuspend
is missed when vote fails and it causes device fails suspending after
ssr. Add pm_runtime_put_autosuspend to pair with pm_runtime_get_sync.
When LPASS_CDC_MACRO_EVT_PRE_SSR_UP comes, core vote is needed before
resetting GFMUX reg and dev_up is not set to true yet. Add pre_dev_up
flag to indicate PRE_SSR_UP and be used in lpass_cdc_check_core_votes
to avoid false alarm.
Change-Id: Ic12ecd9645f291078e32f4921f9f77c2d85e4b8c
Signed-off-by: Meng Wang <mengw@codeaurora.org>
Incorrect check for return value of clk_div_get
causes CLK_DIV2 setting being missed. Fix the
return value check to address this.
Change-Id: Ic1b6761ab836a38c657ac7e43efda0e2f23c5fee
Signed-off-by: Aditya Bavanari <abavanar@codeaurora.org>
During ssr, when powering down audio path and core vote fails,
it directly exits without disabling clock. After adsp is up,
it will enable both RX_MCLk and RX_TX_MCLK which causes
glitch on headset output.
Change-Id: I98d3cdbffa0a5ae1ac4064579a52a29b02d4ae3e
Signed-off-by: Deepali Jindal <deepjind@codeaurora.org>
SVA switch is not retain at VA_CLK when switch
between handset and headset mic sva. Update the
clock release logic during swr power event.
Change-Id: I52c5f7576426af2ff385a862da872e8d86959ecb
Signed-off-by: Meng Wang <mengw@codeaurora.org>
When requested clk is not default clk, it should not enable
VA_MCLk directly. lpass_cdc_clk_rsc_check_and_update_va_clk
will take care of VA_MCLK switch.
Change-Id: I602be7dcc0228fd2e6ecd7624a96663e89485bd0
Signed-off-by: Meng Wang <mengw@codeaurora.org>
Add ftrace log to debug NOC issues.
When writing/reading lpass codec registers, add vote_lock
to make sure clk is not disabled.
Change-Id: I1df924d6aefee2899f7e5008851c1c324dabf62a
Signed-off-by: Meng Wang <mengw@codeaurora.org>
When multi wsas are connected to wsa-macro and some registers
are written to wsa, swr broadcast mode is used. When closing
one wsa, it will also send the register write to the other wsa
and it should not get updated. The other wsa will be in bad
state.
Remove broadcast for wsa-macro to resolve this issue.
Change-Id: I4c788a213fdcd217861703a13d44c096fd9b632d
Signed-off-by: Meng Wang <mengw@codeaurora.org>
During adsp SSR, after adsp is down, lpass_cdc_runtime_resume
is called in va-marco and fails. lpass_cdc_runtime_suspend is
not called 100ms later. After adsp is up and va-macro considers
lpass_cdc is resumed and not setting clk which causes wcd not
detected. Call runtime_suspend when vote fails to resolve
the issue.
Change-Id: Ice398d0168c5c67f6c98e3122af507ca74837175
Signed-off-by: Meng Wang <mengw@codeaurora.org>
cooling of WSA/WSA2 is to reduce the digital gain.
the cooling callback should only be called when the WSA pointer
has not been initialized.
Also the adjusted volume of RX0 and RX1 need to be set separately.
Change-Id: I6aac0e7a3a3219e8b5c24d711a6c7773824827e9
Signed-off-by: Junkai Cai <junkai@codeaurora.org>
the dapm_mclk_enable flag has not been set back to false
when the actual mclk is disabled.
Change-Id: Ic04756b3dcd074887dd1e93f23cf31873abc1428
Signed-off-by: Junkai Cai <junkai@codeaurora.org>
