Graphe des révisions

613 Révisions

Auteur SHA1 Message Date
Linux Build Service Account
3c31bbf469 Merge "disp: msm: sde: use dma_map_single to flush the buffer" into display-kernel.lnx.1.0 2019-12-04 17:43:19 -08:00
Linux Build Service Account
18295fa2a9 Merge "disp: msm: attach address space to msm_gem_object" into display-kernel.lnx.1.0 2019-12-04 17:43:17 -08:00
Linux Build Service Account
230741fe20 Merge "disp: msm: remove support for Cx iPeak mitigation" into display-kernel.lnx.1.0 2019-12-04 17:41:49 -08:00
Linux Build Service Account
8a4e84105b Merge changes I00518e84,I08f66c0e,I2948bc6e,I21bc67b4,I79acaf83,I2f8ffe6e into display-kernel.lnx.1.0
* changes:
  disp: msm: sde: use device tree node to enable INTF TE capability
  disp: msm: sde: refactor sde_hw_interrupts to use offsets from catalog
  disp: msm: sde: get INTF TEAR IRQ offsets from device tree
  disp: msm: sde: rename MDSS_INTR_* enums to SDE_INTR_*
  disp: msm: sde: add Lahaina version checks
  disp: msm: sde: move all hw version checks in to the catalog
2019-12-04 17:27:54 -08:00
Linux Build Service Account
8e2dde8420 Merge changes If37ec780,Ia691c95d into display-kernel.lnx.1.0
* changes:
  disp: msm: sde: remove sde wrapper for clock set flags
  Disp: Snapshot change for lahaina display driver
2019-12-04 17:27:51 -08:00
Linux Build Service Account
5706918517 Merge changes I15de8298,I71675c8f,Ifcf6d6f1,I766f1569 into display-kernel.lnx.1.0
* changes:
  disp: msm: rotator: migrated the new BUS driver for rotator on lahaina
  disp: msm: dsi: remove dsi bus scaling setting
  disp: msm: sde: migrated new sde icb bus scaling driver for lahaina
  display: add uapi and shared headers to techpack folder
2019-12-04 17:26:52 -08:00
Linux Build Service Account
16a8f25de1 Merge "drm/msm/sde: add FETCH_ACTIVE logic and set default group ID" into display-kernel.lnx.1.0 2019-12-04 17:26:50 -08:00
Abhijit Kulkarni
1fb09ffb74 disp: msm: sde: use dma_map_single to flush the buffer
dmac_flush_range api is no longer avaialable on latest kernel.
Use dma_map_single to flush the scm buffer before switching to
higher execution previlege.

Change-Id: Ia1c18a6ab9a9c80f5f9ce79816d9dbd3777474b0
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2019-12-04 16:05:09 -08:00
Narendra Muppalla
bf47dd1fb6 disp: msm: remove support for Cx iPeak mitigation
This change is removing cx ipeak mitigation logic
in sde driver till support is available through GKI.

Change-Id: I24f895001569d5fbb5dd0002c649f4f02a6650e8
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2019-12-04 09:46:08 -08:00
Yuan Zhao
f3553ab628 disp: msm: rotator: migrated the new BUS driver for rotator on lahaina
Migrate to icb framework API in drm and rotator driver. The change also
removes msm_bus custom API usage from both drivers.

Change-Id: I15de82986204a12e4cc124f51793328c3d403256
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
2019-12-03 18:46:57 -08:00
Yuan Zhao
cc564849ae disp: msm: dsi: remove dsi bus scaling setting
DSI driver did not use msm bus scaling setting,
remove the code.

Change-Id: I71675c8f4e3e97f1ded72ecac3fa87bdc7fb3774
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
2019-12-03 18:46:45 -08:00
Yuan Zhao
6cb205cbba disp: msm: sde: migrated new sde icb bus scaling driver for lahaina
Migrate to icb framework API in drm and sde driver. And
also removes old msm_bus custom APIs from the driver.

Change-Id: Ifcf6d6f157594638075742fe328b29a9be065bca
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
2019-12-03 18:46:27 -08:00
Shashank Babu Chinta Venkata
b7d71e1543 display: add uapi and shared headers to techpack folder
Move vendor specific display headers from include/uapi and
include/linux path to techpack/display.

Change-Id: I766f15694020eff9e2f1a20504f828be78d4175f
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
2019-12-03 12:08:30 -08:00
Narendra Muppalla
b02d482e6a disp: msm: sde: remove sde wrapper for clock set flags
Since clock set flags api is deprecated for new target, this
change removes sde wrapper and removes LUT memeory retention logic
from crtc module.

Change-Id: If37ec780913668c1a43f8a71e79249679526bd34
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2019-11-26 16:25:28 -08:00
Steve Cohen
18b3e27f49 disp: msm: sde: use device tree node to enable INTF TE capability
Set the INTF TE capability bit only on interfaces which have a non-zero
value in the device tree node qcom,sde-intf-tear-irq-off instead of
enabling it for all interfaces based only on the HW version. The HW
doesn't support TE programming for non-TE enabled interfaces, so this
patch only populates the TE ops for those which support it.

Change-Id: I00518e846dc44e1e0808a049625dc14099656e11
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2019-11-26 18:02:34 -05:00
Steve Cohen
f7329a7889 drm/msm/sde: add FETCH_ACTIVE logic and set default group ID
New required programming in CTL. Fetch active informs the HW
of the active fetch pipes. Group ID informs HW of which VM owns
that CTL. Force this group ID to default/disabled until
virtualization support is enabled in SW.

Change-Id: Id9d68ae725a640893a4e347b69ad2b506a998f25
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2019-11-26 14:54:03 -05:00
Steve Cohen
79d42e98f1 disp: msm: attach address space to msm_gem_object
Ensure the msm_gem_object gets a reference to valid address space
so that sg sync can be properly performed.

Change-Id: Iee7cf49689861b863b3b3bfb3b4b9919ad17caa9
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2019-11-26 14:30:24 -05:00
Steve Cohen
3560bdcad0 disp: msm: sde: refactor sde_hw_interrupts to use offsets from catalog
Refactor the SDE interrupts module to use the offsets in the catalog.
This avoids hard-coding offsets for interrupts within a block's
address space so when that block's base address is relocated the
interrupts for that block are shifted as well.

Change-Id: I08f66c0e93bbe102dfe67350c97c5c7a4fb5039a
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2019-11-26 14:24:01 -05:00
Steve Cohen
df8c709d23 disp: msm: sde: get INTF TEAR IRQ offsets from device tree
The INTF TEAR IRQ block offsets can shift between targets. Therefore,
to allow dynamically setting these offsets they should be specified
in the sde device tree node qcom,sde-intf-tear-irq-off.

Change-Id: I2948bc6eaa31fe5e180379770d88e7be72b6d345
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2019-11-26 14:07:40 -05:00
Steve Cohen
5fe5765fd4 disp: msm: sde: rename MDSS_INTR_* enums to SDE_INTR_*
Rename sde_intr_enum members to prefix with SDE instead of
the old MDSS naming used in legacy display driver.

Change-Id: I21bc67b4a79b7e53af0ac1beaebb6e9482015b0f
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2019-11-26 14:07:08 -05:00
Steve Cohen
fdc63188f4 disp: msm: sde: add Lahaina version checks
Add version checks for Lahaina (MDSS v7.0.0) and enable
all kona features.

Change-Id: I79acaf8310a437fff3d203656b856b44cdfdfb48
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2019-11-26 14:05:59 -05:00
Steve Cohen
b0671dbf17 disp: msm: sde: move all hw version checks in to the catalog
Remove the version checks used to populate some mixer and VBIF
ops, and check when constant color should be disabled in SSPP.
These are replaced with feature bits set by the catalog.

Change-Id: I2f8ffe6ebfe3e61c44588589f55ede7cba74e841
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2019-11-26 14:05:38 -05:00
Narendra Muppalla
d1d9ae8b19 Disp: Snapshot change for lahaina display driver
This snapshot change adds downstream support
for drm 5.x+(msm_lahaina branch) linux kernel.

Change-Id: Ia691c95da155a00e449c91a2f1a5b20a8e71aed4
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2019-11-24 12:30:51 -08:00
Alisha Thapaliya
1dc48c24cc Merge remote-tracking branch 'quic/display-kernel.lnx.4.19' into display-kernel.lnx.1.0
* quic/display-kernel.lnx.4.19:
  disp: add rev checks for bengal target
  disp: msm: sde: null check for kms device
  disp: msm: sde: log bw info in event logs
  disp: msm: sde: fix uidle trace format configuration
  disp: msm: sde: handle another case for lost pp-done interrupt
  disp: msm: sde: fix video mode prefill lines for RSCC
  disp: msm: sde: Use platform independent API for 64-bit div
  disp: msm: dsi: check bit clock before bypassing clock set during DMS
  Revert "disp: msm: sde: update splash resource allocation for dual display"
  disp: msm: sde: update clk rate for perf mode
  disp: msm: sde: check all dirty properties during plane update
  disp: msm: dp: perform host_init/deinit to reset abort
  disp: msm: dp: skip wait if audio engine is disabled
  disp: msm: add check for buffer length before copy

Change-Id: Ib04e4d9f8aea724b289164ab6161f60130a33669
Signed-off-by: Alisha Thapaliya <athapali@codeaurora.org>
2019-11-14 10:51:30 -08:00
Yashwanth
62c9902935 disp: add rev checks for bengal target
Add revision checks to support bengal target
for dpu and rotation driver.

Change-Id: I7eb8bd2943b94ab246889b1f74cd9613aeee2b2f
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2019-11-12 16:15:28 +05:30
qctecmdr
ffd0bffefb Merge "disp: msm: dp: perform host_init/deinit to reset abort" 2019-11-06 10:34:58 -08:00
qctecmdr
1b99045ab4 Merge "Revert "disp: msm: sde: update splash resource allocation for dual display"" 2019-11-04 14:38:09 -08:00
Nilaan Gunabalachandran
810738f232 disp: msm: sde: null check for kms device
Check if kms device objects exist before attempting to
create memory space.

Change-Id: Idc0cbfd0ce116dab8005f72ba231dcb8c82254ca
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2019-11-04 13:21:41 -05:00
qctecmdr
3d10584cd7 Merge "disp: msm: sde: log bw info in event logs" 2019-11-02 15:55:38 -07:00
qctecmdr
27c7bc5e5e Merge "disp: msm: sde: handle another case for lost pp-done interrupt" 2019-11-02 13:41:38 -07:00
qctecmdr
4d435e914d Merge "disp: msm: sde: fix uidle trace format configuration" 2019-11-02 11:25:34 -07:00
qctecmdr
b269dd05bc Merge "disp: msm: sde: fix video mode prefill lines for RSCC" 2019-11-02 09:08:46 -07:00
qctecmdr
7139bedc5a Merge "disp: msm: sde: Use platform independent API for 64-bit div" 2019-11-02 06:58:12 -07:00
qctecmdr
d34c5f2215 Merge "disp: msm: add check for buffer length before copy" 2019-11-01 12:09:12 -07:00
Veera Sundaram Sankaran
dd76462c66 disp: msm: sde: log bw info in event logs
Add all the MNOC, LLCC & EBI bandwidth info
in the eventlogs to help in debugging.

Change-Id: Idca62ceed2d3a1b2e907f14c245e158cc46900c3
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-11-01 11:04:46 -07:00
Dhaval Patel
2d40a1b2a1 disp: msm: sde: fix uidle trace format configuration
Uidle FAL1 and FAL10 counters use 32 bits and
should be printed with hex format instead of
signed integer format.

Change-Id: I31e9a06314ef53bd2dab7ebd041f38c096e84120
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2019-11-01 11:04:25 -07:00
Veera Sundaram Sankaran
a823531c33 disp: msm: sde: handle another case for lost pp-done interrupt
Due to interrupt delays, sometimes the pp-done interrupt
for an in-between frame is lost, as with posted-start
frames are queued to the hardware before the completion
of the previous frame. Handle the lost pp-done interrupt
in the case where frame-n pp-done interrupt is missed
and frame-n+1 pp-done interrupt is processed before
frame-n+1 wr-ptr interrupt.

Change-Id: I36ec7ac494b2720fc005dab75047d2f4a5a2a699
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-11-01 10:52:39 -07:00
Veera Sundaram Sankaran
b1c9d65e3d disp: msm: sde: fix video mode prefill lines for RSCC
The RSCC static wakeup and the bandwidth trigger for
the downvotes are based on the prefill lines. Reduce
the prefill lines based on the panel vertical front
porch to avoid issuing bw downvotes during active
region of the previous frame.

Change-Id: I408209ba308c32e71d9f70c5ed7e60c134877c84
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-11-01 10:09:35 -07:00
qctecmdr
46ec8687c0 Merge "disp: msm: sde: check all dirty properties during plane update" 2019-10-31 22:54:19 -07:00
qctecmdr
bd355c786d Merge "disp: msm: dp: skip wait if audio engine is disabled" 2019-10-31 20:40:30 -07:00
qctecmdr
ccb7c76483 Merge "disp: msm: dsi: check bit clock before bypassing clock set during DMS" 2019-10-31 18:39:32 -07:00
qctecmdr
9ffff1ad8d Merge "disp: msm: sde: update clk rate for perf mode" 2019-10-31 16:23:17 -07:00
Ravikanth Tuniki
b0df721f2d disp: msm: sde: Use platform independent API for 64-bit div
64-bit division( operator "/") on 32-bit platforms is not supported.
Using platform independent API's here.

Change-Id: I1ec71ac120bb29b7f0bceed581b979606f81e2a5
Signed-off-by: Ravikanth Tuniki <rtunik@codeaurora.org>
2019-10-31 15:38:00 +05:30
Alisha Thapaliya
2ee7f3858a Merge remote-tracking branch 'quic/display-kernel.lnx.4.19' into display-kernel.lnx.1.0
* quic/display-kernel.lnx.4.19:
  disp: msm: dsi: handle wait for dma cmd completion
  disp: msm: dsi: Config panel test pin to input mode when panel off
  disp: msm: adjust smmu detach sequence to include unmapping
  disp: msm: sde: Fix 32-bit compilation issues
  disp: msm: dsi: reject seamless commit with active changed
  disp: msm: update debug dump for ltm block
  disp: msm: remove runtime_pm support from rsc driver
  disp: msm: sde: avoid encoder power-collapse with pending frames
  disp: msm: sde: handle all error cases during sui transitions
  drm/msm/dsi: bypass dsi clock set during changing mode
  disp: msm: sde: remove dspp blocking
  disp: msm: sde: update avr mode config during commit prepare
  disp: msm: sde: add one-shot qsync mode support
  disp: msm: sde: update wr_ptr_success state post wait
  disp: msm: sde: allow qsync support along with VRR

Change-Id: Ib2a2a855a2fa49ed74789ed470ee669b21a95500
Signed-off-by: Alisha Thapaliya <athapali@codeaurora.org>
2019-10-30 14:36:58 -07:00
Satya Rama Aditya Pinapala
c404a2f158 disp: msm: dsi: check bit clock before bypassing clock set during DMS
This change ensures that if the dsi clock rate is not specified
in the timing modes, setting clkrate_change_pending is not bypassed.

Change-Id: I2475da1e548f29c68a6a4466c5ef540f7f11d553
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-10-30 11:01:23 -07:00
Nilaan Gunabalachandran
1195a394b1 Revert "disp: msm: sde: update splash resource allocation for dual display"
This reverts commit dbb1a3eee9.
This change causes regression in populating cont splash data for RM.

Change-Id: If239eb921e022fcad54033ae3c7e9e4c3dc54736
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2019-10-30 10:47:47 -04:00
Nilaan Gunabalachandran
423fb3468d disp: msm: sde: update clk rate for perf mode
This updates the mdp clock rate immediately,
instead of waiting for the next frame trigger.

Change-Id: I5d58a1f1200fff143b363e89e8c49f6e7d8d14c7
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2019-10-30 10:47:24 -04:00
Samantha Tran
4de15bb6ef disp: msm: sde: check all dirty properties during plane update
Previously when updating a plane's dirty features, if the
dirty all flag was set, the optimization was to break early.
This optimization left out color property updates for that plane.
This fix removes the mutex locks in the msm_prop function so
the break optimization is no longer needed. Function callers will
now need to acquire the lock and unlock the property lock when done.
Now the plane will iterate through all dirty properties.

Change-Id: I3114ac44d62ac0f0633897d757b6fd9a5b1f5d2e
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2019-10-30 06:04:16 -07:00
Sankeerth Billakanti
e7780e7526 disp: msm: dp: perform host_init/deinit to reset abort
When doing multiple immediate plug-unplug, the DP display
driver is waiting for a link training to exhaust the retry
count before processing the disconnect request while flushing
the connect_work. The driver should stop link training and
exit if the link is disconnected. This change will use the
ctrl_aborted flag to early return from link training and
perform the host init/deinit and host ready/unready in pairs
while handling connect/disconnect to reset the abort flags
for the next connect.

Change-Id: If321136ecf12ab2f67d13ef841f1590142aad406
Signed-off-by: Sankeerth Billakanti <sbillaka@codeaurora.org>
2019-10-30 12:14:10 +05:30
Satya Rama Aditya Pinapala
8bc240b71d disp: msm: dsi: handle wait for dma cmd completion
The current solution triggers the DMA command and waits till
the command dma done and ISR signals completion. This change
introduces asynchronous wait after a DCS command has been
triggered. Enable this mode only during pre kickoff, so as to not
block commit thread.

Change-Id: Iead7b6328883e844147d47ff68dc878943879553
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-10-29 18:40:25 -07:00