For PBR and CPS ports, need the ability to customized slave
SWR frame OFFSET1 settings. Add similar method to WCD TX where
offset1 and lane_ctrl parameters are parsed from WSA device tree
and configured in SWRM.
Change-Id: Ib973ed93d9daa5ba02461a156e5b0a8c816d371e
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Update HSTOP from 0 to 8 to match configuration.
Also fix slave ch en from 2 ch to 1 ch.
This fix resolves port collision/bus clash issues.
Change-Id: I91c6fe80a9db88d029e4ef81c7a06480a767b170
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
For all FIFO_WR/RD_CMDS, add function that increments cmd_id
every time for easier sw debugging.
Change-Id: I53d133d9b427dd6b80201aab3c6f367600e82bfc
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Slave reg SAMPLE_CONTROL_2_BANK (0x23) should only be written
when sample interval is > 0xFF otherwise we get CMD_Ignored IRQ.
Also add handling for this CMD_IGNORED_AND_EXEC_CONTINUED Irq.
Change-Id: I4693fb17ba78c73d4fda2e4ddce9fa6e0311309d
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Update to 5.15 kernel dapm api.
Pin name no longer needs prefix as it is added in API.
Change-Id: I5c1378839f4c4d2aa70fb11706c5bb65d4eb0952
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Update function to correctly read array from device tree.
Previously not reading values and returning -EINVAL.
WSA bat_cfg/rload/sys_gain are now correctly configured.
Also add softclip clock enable during pbr config.
Change-Id: Ia1b93acfde3e799b3b72e05966d0fa955c3f49ac
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Local variable is used for dma_vmap and same value is used for caching
which becomes invalid after going out of scope. Store in heap instead.
Change-Id: I2e291137dd461d0cdb49209a6c1d804f1e806457
Change wsa Word length param to be - 1.
Also, any value that is 0 should be set to 0xFF.
This causes the swr mstr driver to ignore the write
(default value).
Change-Id: I9bacb6657284c02cc023be655011b321a08ef3a9
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Removed PA Mute, COMP Offset, Ext_vdd as they will not be used
in WSA884x.
Change-Id: I58ffd490c9929fa3388678d9ab7114207779191d
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Add idle detect source select based on NG mode,
if NG2 then source is PRE-LA else LEGACY
Change-Id: I4e0cb3825960e6b795038fb5e85cfaa7a2fbfe62
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
Add idle detect enable for mixed control path,
and update copyright markings
Change-Id: Idf2932cd1813082f60ee96010788cdb1ef36afbf
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
Add set config function to validate and
set battery stack mode, rload and system gain
Change-Id: I075bf3cde6a9671a8d93f32aec43b941ea86f2ea
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
Read noise gate mode from device tree,
set NG2 based on the register read or
set to idle detect mode
Change-Id: Id1e478ad230125d1e35229493cb0fbd6867c6a3b
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
Boost current limit is now dependent on PBR and bat_cfg.
Add BOP2 VTH/HST initial settings.
Add OCP LOW VBAT ITH sel settings dependent on bat_cfg.
Change-Id: I235f4b75ee12e5f24d46fa0ebca67547997934e2
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Add PBR/CPS ports to debugging by adding logic to
is_swr_slave_reg_readable.
Change-Id: I9ef09ed90ccce2c696eaec7b1eed9c47a7e73f58
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Lpass-side enablement of new WSA feature.
Configure PBR registers based on WSA bat_cfg/rload/sys_gain.
Some registers updated during init, others during enable_interpolator.
Change-Id: Iac42672182827a9da47700319c61b9d0a17d0936
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Add CPU_m calculation in CPU_SW_MESSAGE.
Fix CLK_CTRL value. Skip 0x2C54 to 0x4000 in reg_show.
Change-Id: I487bfab9c9fa6c1e99af1b778da7d150ef5ac927
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Change PBR enable to be acquired from device tree.
Using system_gain, bat_cfg, rload, set pbr thresholds based on tables.
Table values are x100 to avoid kernel float issues,
truncate when converting to reg val.
Set pbr registers during initialization.
Rename WSA_8OHMS -> WSA_8_OHMS to match system gain naming.
Change-Id: I28985496e1da37ceeb8c9db6e17f4c48d37d11c7
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Previously we disabled all irqs by default and toggled them pre/post
playback. Update to leave them enabled by default and remove the toggling.
Also, leave the default values for edge/level triggering.
Change-Id: Iac96649fc0f33cbdf5a25f136cf577f7242db74e
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
If not using compander, allow for user to set pa gain
using DRE_CTL_1 register.
Change-Id: I45af5a64a5630ff1cd8410a66ed55914efb5a529
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Update WSA rload, system gain, bat_cfg to get from wsa_macro device tree.
WSA Bat_cfg change to read from VPHX_SYS_EN_STATUS reg.
Add device tree parsing for these params in WSA macro
and WSA driver.
Remove machine driver method of sending the parameters.
Add default_dev_mode (spkr vs rcv) from device tree for WSA.
Move code from spkr event to userspace controls or probe.
Change system_gain and affected params when switching between
dev_modes.
These changes simplify configuration data and code and allow
more registers to be written during bootup or before playback.
Change-Id: I79966c704adfac1bf2d85aa6519ea574764c7a8b
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
audio-rounting widgets are not expected to be defined when
it is using stub soundcard in RUMI validation.
Late probe is for WCD MBHC, which is also not enabled in the
RUMI validation.
Change-Id: Ibae76ef298aaa6db25eaef3d390fe885f8a06ad7
Signed-off-by: Junkai Cai <quic_junkai@quicinc.com>
When device enters LPM, it hurts audio latency as
CPU spends more time in entering/exiting LPM.
Hence, for LL and/or ULL, LPM is disabled.
Add pm qos mixer controls for cpu affinity and
increase the delay for the cores to enter LPM mode.
Change-Id: I3aa2d17f6b3ec3ffad180205085bd2f4961858b7
Signed-off-by: Srinivas Marka <quic_smarka@quicinc.com>
PA_ERR can happen during speaker path setup. Log the
error status in the interrupt handler and clear the error
status for next audio playback to resume properly on
the speaker.
Change-Id: I5800d9505a3036127097745aaa880b73b3e87f30
Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
Udpate MSM DMIC power up sequence to reduce pop.
Change-Id: I5f3f2e439e31877d3f21c05575c95942b937252e
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>
Fix isense/vsense gain tables to correct values.
Mark ana_wo_ctl registers as volatile.
Move VBAT_THRM_FLT_CTL to init reg sequence.
Change-Id: Ie04f302719f08b35f1ef9807dff7993c31e3aa43
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Add PBR, CPS port types and port parameters for WSA
Update RX and TX port types to include full list of ports
Change-Id: I5b69ee777addebcf4167dccd4ce4ab0af31b754d
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
regmap_irq_chip->irq_drv_data is shared by all attached wsa
devices and point to last probbed wsa device. This will cause
interrupt handle issue. Update irq_drv_data per wsa deviece to
resolve this issue.
Change-Id: I013f546d7f1ca6077f0b14e875b135a27325f851
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
Update correct register mask for FIFO overflow/underflow
to avoid any potential issue.
Change-Id: Ie6220b1f653d1ec76ecc48a3dfa73aea39608e55
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>
during devm_snd_soc_register_card(), the name_prefix can be set
if "sound-name-prefix" is provided in the DT nodes.
The original approach to set prefix would possibly cause ASoC
component probe failed if prefix has not set before probe is called
Change-Id: Ie78d042cda24b7d1d926223d476786e13d965ac7
Signed-off-by: Junkai Cai <quic_junkai@quicinc.com>
Interrupt from wsa884x are not handle as slave_irq is not set.
Add slave_irq for wsa884x to address this issue.
Change-Id: I82edb35b55f6a46d79bd96b7f0f4bfac58583860
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
In case of error scenario for get_tdm_clk_id/get_mi2s_clk_id, storing the
return value into uint32 clk_id which is always positive and does not handle
the invalid clk ids failure. So modify the incorrect comparsion.
Change-Id: I1e606709cd3c11a24a39679bcee638a045804961
Signed-off-by: Prasad Kumpatla <pkumpatl@codeaurora.org>
When interrupts are triggered on the second or third interrupt
status register, current logic cannot clear that interrupt status
after handling it. Enable use_single_read for wsa and wcd regmap
to resolve the issue.
Change-Id: Ieac57e169505d4455dde1dcd0e80e222e3e8eb1e
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>