Implement hal_rx_mpdu_get_fr_ds API
based on the chipset as the macro to
retrieve for_ds value is chipset
dependent.
Change-Id: I6d41d02ac50cae752567d98645f0447cc122a84f
CRs-Fixed: 2522133
Implement hal_rx_mpdu_get_to_ds API based
on the chipset as the macro to retrieve
to_ds bit value is chipset dependent.
Change-Id: I36d9d14e226bcc604b91d8aecbe52836c5a12272
CRs-Fixed: 2522133
Implement hal_rx_mpdu_start_sw_peer_id API
based on the chipset as the macro to retrieve
sw_peer_id value is chipset dependent.
Change-Id: Ifebaf2430731f5e0593dde4789d721e9fe7ce7c1
CRs-Fixed: 2522133
Implement hal_rx_get_mpdu_mac_ad4_valid API
based on the chipset as the macro to retrieve
mac_ad4 value is chipset dependent.
Change-Id: I9d7cc90e798d4f0775e915fe6edcb1a1f5129490
CRs-Fixed: 2522133
Implement hal_rx_msdu_end_last_msdu_get API
based on the chipset as the macro to retrieve
last_msdu value is chipset dependent.
Change-Id: I561c28a49062d7b650e68c5a4ce4da0183be34d6
CRs-Fixed: 2522133
Implement hal_rx_msdu_end_dat API based on
the chipset as the macro to retrieve da_is_valid
value is chipset dependent.
Change-Id: I79f06eaa2576e7516c21f963b2c149aac7f62c64
CRs-Fixed: 2522133
Implement hal_rx_msdu_end_first_msdu_get API
based on the chipset as the macro to retrieve
first_msdu value is chipset dependent.
Change-Id: Iea325159a0349c45a249c1ae113664c41a54b0f1
CRs-Fixed: 2522133
Implement hal_rx_print_pn API based on the
chipset as the macro to retrieve
pn value is chipset dependent.
Change-Id: Id9d0d3b34a5f6a09fe5903e1d24bb0a59205174b
CRs-Fixed: 2522133
Implement hal_rx_encryption_info API based
on the chipset as the macro to retrieve
sa_idx value is chipset dependent.
Change-Id: I0c48800dfa5628898c53f7a9271e517b6bfa3da7
CRs-Fixed: 2522133
Implement hal_rx_msdu_end_l3_hdr_padding_get API
based on the chipset as the macro to retrieve
sa_idx value is chipset dependent.
Change-Id: Ice1fc2d70e339dc1d80fa6f34f37c5a7aa074be5
CRs-Fixed: 2522133
Implement hal_rx_desc_is_first_msdu API
based on the chipset as the macro to
retrieve first_msdu bit value is chipset
dependent.
Change-Id: I8e8a3aceb225b591b96e6f8453ffbebf1f78e529
CRs-Fixed: 2522133
Implement hal_rx_msdu_end_sa_idx API
based on the chipset as the macro to
retrieve sa_idx value is chipset
dependent.
Change-Id: Ib874520be9e7ad778c2a9a3c415e5c3047450b31
CRs-Fixed: 2522133
Implement hal_rx_msdu_end_sa_is_valid_get API
based on the chipset as the macro to retrieve
sa_idx valid bit is chipset dependent.
Change-Id: I8bcb7030554331922ed12ea9da3ef51cd64b5c40
CRs-Fixed: 2522133
Implement hal_rx_msdu_end_da_is_mcbc_get based
on the chipset as the macro to retrieve
mcbc value is chipset dependent.
Change-Id: I860d259515c31345501080577d7a34beb97e5f60
CRs-Fixed: 2522133
Implement hal_rx_get_rx_fragment_number
based on the chipset as the macro
HAL_RX_MPDU_GET_SEQUENCE_NUMBER is
chipset specific.
Change-Id: I967190fa3a55d45f46760f58eab5007bf5fa908f
CRs-Fixed: 2522133
Currently after runtime resume all SW2TCL data and reo cmd
srng rings hp and tp value are flushed. In case of IPA
offload case SW2TCL3 righ hp value will be updated by IPA
and not by host. In case of runtime pm enable host is
setting the value to zero as part of runtime resume which
results in incorrect hp value of SW2TCL3. As part of this
change set flush event for rings which are accessed by host
during link down state and after runtime resume flush the
rings for which flush event is set.
Change-Id: I5c9afa708277cf3a6e6d5ef99447bc21f88cfdcf
CRs-Fixed: 2514621
When the scheduler thread initiates the WMA_SET_BSSKEY_REQ
we send CMD_UPDATE_RX_REO_QUEUE to REO srng. This is done by
posting a descriptor to the reo command ring and then we
update the HP so that the HW can consume the descriptor.
Avoid accessing HP shadow address when we are in runtime
suspend state. Perform a hif_pm_runtime_get to resume the
link and access the shadow register and once done initiate a
hif_pm_runtime_put to allow device to go into runtime
suspend.
Change-Id: I24c3e046a5769f03a0f1969360cccdbe55b81d45
CRs-Fixed: 2495720
Add code to replace usage of void pointers from
HAL layer and instead use appropriate opaque pointers
Change-Id: Id950bd9130a99014305738937aed736cf0144aca
CRs-Fixed: 2487250
Add code to remove void pointer usage for hal_srng
and use opaque pointer dp_hal_ring_t instead.
Change-Id: I6907f7376d7fe3c9180b8795bd96f49fead2ec64
CRs-Fixed: 2484404
Make change to remove usage of void pointers for
ring descriptors and instead use a opaque pointer
dp_ring_desc_t.
Change-Id: Ia1e9a3da9eaa3cccf297b2135b52a72f2fe21431
CRs-Fixed: 2484409
Add code to remove void pointer usage for hal_soc
and introduce opaque pointer to be used intead of void
from dp layer into hal layer
Change-Id: Ia38571174c6ed79558d0f0c9cd1a0f4afaa66483
CRs-Fixed: 2480857
Filter fcs_err frames and pass only first fcs ok msdu payload
from ppdu to upper layer
Change-Id: Ibf739193275f4f5a5c3e786abbbaa45165b5aa13
CRs-Fixed: 2439392
Some of the print messages in HAL module come very excessively.
Use hal_verbose_debug() API to print them.
CRs-fixed: 2405028
Change-Id: I4b4754af65c00edb571de898527026b6183ef15f
Functions hal_update_srng_hp_tp_address and hal_set_one_shadow_config
are dumping a lot of information, which is not needed.
Reduce INFO log levels to DEBUG.
Change-Id: I210cd5493d758685312b7851eb37e05ce93b6071
CRs-Fixed: 2342960
Functions hal_rx_wbm_err_info_get, hal_tx_comp_get_release_reason,
hal_rx_dump_mpdu_start_tlv uses some hardware macros directly and the
value differs between qca8074v1 and qca8074v2 targets.
Move these functions to generic api file and compile it per target.
Change-Id: Ib78fb6e69238577aac64da3f60f38a72cee316b0
keep hal tx and rx functions grouped as it will look clean
and avoid confusions while browsing code for others.
Change-Id: I519690d42cd077689bf7afe697908f43d7055da5
Some of the macro names defined in qca8074v1, are defined with
a slightly different name in qca8074v2, and few macros have the
same name in both headers but are defined with different values.
Fixed the same.
Change-Id: I5e948baf5326d1d8fdfa2bd7ee8aa072c710d17c
Removed qdf exports on functions defined in target specific
header files and defined those functions as static. Revert
changes on hal_rx_msdu_end_sa_idx_get and make
hal_rx_msdu_end_da_idx_get target specific
Change-Id: I2858b1d77118f0a26b54bf983bd342c7a4fe757d
make hal_rx_msdu_end_sa_idx_get and hal_rx_dump_msdu_end_tlv
routines target specific as qca6390 implementation differs
a bit. add target specific functions for qca6290 and qca8074
Change-Id: Ie05b91d965bae3642e3264620c6d8427ad368044
Create separate individual hal_srng_table and hal register
offset in target specific source files. Create separate
functions for qca6290 and qca8074 for few hal rx tx
functions as the macro value differs between the chipsets.
Assign target specific hal tx, rx ops as part of hal_attach
and call respective hal tx, rx ops through callbacks.
Change-Id: Ibbf490c678c39fdd9d54191aad7aaec786db30ec
Add max_size parameter in the hw_srng_table
to hold the maximum size for a given ring.
Change-Id: Ibfce021505ab9a55d3208b1c5aba26021d1fe230
CRs-Fixed: 2262818
Process WIFIPHYRX_OTHER_RECEIVE_INFO_E and
WIFIPHYRX_OTHER_RECEIVE_INFO_RU_DETAILS_E TLVs in monitor mode.
Change-Id: I9cea6cee0499fd9ae9e07d4479c7010e35f3e5a5
CRs-Fixed: 2242514
Direct Buffer Receive provides the driver with a mechanism by which target
can transfer information directly into host memory via DMA.
DMA rings must be initialized and configured before they can be shared
to the target for transfer ot data. Host driver will use the HAL SRNG
APIs to create, initialize and configure the DMA rings.
Change-Id: I43cd39ccbb5f5069c9a14092459d5c88ea514dca
CRs-Fixed: 2157986
Provision to send first MSDU of a PPDU to upper layer based
on PPDU ID received in RX monitor lite ring.
FR 42926
Change-Id: I6daed9382b57fb3355ec6453e0609085cc7b9bb0
CRs-Fixed: 2127108
In monitor mode, code decodes legacy rates and bandwidth information for
HT and VHT. Other changes include populating radiotap header with correct
nss and mcs values for legacy, HT and VHT frames. Mapping of mcs rates in
rx_msdu_start tlv and radiotap header info is done using Lithium data
structure document.
Change-Id: I5f20e5d89329738e3a6c076ee14457c003cab279
CRs-fixed: 2083027
Set BM_ACTION, RELEASE_SOURCE and BUFFER_OR_DESC_TYPE fields in WBM release
ring descriptor in hal_rx_msdu_link_desc_set function.
Added HAL API to retrieve RXDMA push reason and error code from REO entrance
descriptor.
Change-Id: I64209d9ebb332136fae43a55b39e0f0d242315fb
CRs-Fixed: 2062922
Changes to process PHY TLVs from monitor status ring and extract
information required for radiotap header.
Change-Id: I99d642e7506ea797b26dbfac89fd223d1a4c0a55
CRs-Fixed: 2048006
The register write apis for the srng rings pass the
srng structure as their context. Add a pointer to
the hal to enable windowing.
Change-Id: Ib3bda2d49d5c2d327cc1b986dcf825a216a004ef
CRs-Fixed: 2032131
Use windowing for register read/write. This allows
for pci based devices to reduce the mapped bar size.
Required for QCA6290.
Change-Id: Ifb173095c135e9eca454f2ba6132b5c54ea8fc4b
CRs-Fixed: 2032131
This change is for supporting monitor mode VAP. All the monitor mode ring
is configured. The related monitor mode ring includes:
-monitor mode buffer ring
-monitor mode destination ring
-monitor mode status ring
-monitor mode link descriptor ring
The packet is not sent to monitor mode ring unless the monitor mode VAP is
configured. This release support Multiple VAP - AP/STA VAP plus Monitor
VAP configuration. The status ring is not used in this release. However,
the ring is tested and the ring is moving and there are TLV's in the ring.
Change-Id: I782ee0c3b998d8b3bbac79b5e7fdecdbff15fa93
CRs-Fixed: 2013049
