qcacmn: move some hal functions to hal_generic_api.h

Functions hal_rx_wbm_err_info_get, hal_tx_comp_get_release_reason,
hal_rx_dump_mpdu_start_tlv uses some hardware macros directly and the
value differs between qca8074v1 and qca8074v2 targets.
Move these functions to generic api file and compile it per target.

Change-Id: Ib78fb6e69238577aac64da3f60f38a72cee316b0

dp/wifi3.0/dp_rx_err.c

@@ -1191,7 +1191,7 @@ dp_rx_wbm_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota)
 		 * save the wbm desc info in nbuf TLV. We will need this
 		 * info when we do the actual nbuf processing
 		 */
-		hal_rx_wbm_err_info_get(ring_desc, &wbm_err_info);
+		hal_rx_wbm_err_info_get(ring_desc, &wbm_err_info, hal_soc);
 		wbm_err_info.pool_id = rx_desc->pool_id;
 		hal_rx_wbm_err_info_set_in_tlv(qdf_nbuf_data(nbuf),
 								&wbm_err_info);

dp/wifi3.0/dp_tx.c

@@ -227,7 +227,8 @@ dp_tx_desc_release(struct dp_tx_desc_s *tx_desc, uint8_t desc_pool_id)
 
 	if (HAL_TX_COMP_RELEASE_SOURCE_TQM ==
 				hal_tx_comp_get_buffer_source(&tx_desc->comp))
-		comp_status = hal_tx_comp_get_release_reason(&tx_desc->comp);
+		comp_status = hal_tx_comp_get_release_reason(&tx_desc->comp,
+							     soc->hal_soc);
 	else
 		comp_status = HAL_TX_COMP_RELEASE_REASON_FW;
 

hal/wifi3.0/hal_generic_api.h

@@ -63,7 +63,7 @@ static void *hal_rx_link_desc_msdu0_ptr_generic(void *link_desc)
 	((defined(CONFIG_WIN) && (WCSS_VERSION > 81)) || \
 	 (defined(CONFIG_MCL) && (WCSS_VERSION >= 72)))
 static inline void hal_tx_comp_get_status_generic(void *desc,
-		void *ts1)
+		void *ts1, void *hal)
 {
 	uint8_t rate_stats_valid = 0;
 	uint32_t rate_stats = 0;
@@ -112,14 +112,14 @@ static inline void hal_tx_comp_get_status_generic(void *desc,
 	}
 
 	ts->release_src = hal_tx_comp_get_buffer_source(desc);
-	ts->status = hal_tx_comp_get_release_reason(desc);
+	ts->status = hal_tx_comp_get_release_reason(desc, hal);
 
 	ts->tsf = HAL_TX_DESC_GET(desc, UNIFIED_WBM_RELEASE_RING_6,
 			TX_RATE_STATS_INFO_TX_RATE_STATS);
 }
 #else
 static inline void hal_tx_comp_get_status_generic(void *desc,
-		struct hal_tx_completion_status *ts)
+		struct hal_tx_completion_status *ts, void *hal)
 {
 
 	ts->ppdu_id = HAL_TX_DESC_GET(desc, WBM_RELEASE_RING_3,
@@ -132,7 +132,7 @@ static inline void hal_tx_comp_get_status_generic(void *desc,
 			MSDU_PART_OF_AMSDU);
 
 	ts->release_src = hal_tx_comp_get_buffer_source(desc);
-	ts->status = hal_tx_comp_get_release_reason(desc);
+	ts->status = hal_tx_comp_get_release_reason(desc, hal);
 }
 #endif
 
@@ -1546,6 +1546,260 @@ static inline void hal_srng_dst_hw_init_generic(void *halsoc,
 	SRNG_DST_REG_WRITE(srng, MISC, reg_val);
 
 }
+
+#define HAL_RX_WBM_ERR_SRC_GET(wbm_desc) (((*(((uint32_t *) wbm_desc)+ \
+		(WBM_RELEASE_RING_2_RELEASE_SOURCE_MODULE_OFFSET >> 2))) & \
+		WBM_RELEASE_RING_2_RELEASE_SOURCE_MODULE_MASK) >> \
+		WBM_RELEASE_RING_2_RELEASE_SOURCE_MODULE_LSB)
+
+#define HAL_RX_WBM_REO_PUSH_REASON_GET(wbm_desc) (((*(((uint32_t *) wbm_desc)+ \
+		(WBM_RELEASE_RING_2_REO_PUSH_REASON_OFFSET >> 2))) & \
+		WBM_RELEASE_RING_2_REO_PUSH_REASON_MASK) >> \
+		WBM_RELEASE_RING_2_REO_PUSH_REASON_LSB)
+
+#define HAL_RX_WBM_REO_ERROR_CODE_GET(wbm_desc) (((*(((uint32_t *) wbm_desc)+ \
+		(WBM_RELEASE_RING_2_REO_ERROR_CODE_OFFSET >> 2))) & \
+		WBM_RELEASE_RING_2_REO_ERROR_CODE_MASK) >> \
+		WBM_RELEASE_RING_2_REO_ERROR_CODE_LSB)
+
+#define HAL_RX_WBM_RXDMA_PUSH_REASON_GET(wbm_desc)	\
+	(((*(((uint32_t *) wbm_desc) +			\
+	(WBM_RELEASE_RING_2_RXDMA_PUSH_REASON_OFFSET >> 2))) & \
+	WBM_RELEASE_RING_2_RXDMA_PUSH_REASON_MASK) >>	\
+	WBM_RELEASE_RING_2_RXDMA_PUSH_REASON_LSB)
+
+#define HAL_RX_WBM_RXDMA_ERROR_CODE_GET(wbm_desc)	\
+	(((*(((uint32_t *) wbm_desc) +			\
+	(WBM_RELEASE_RING_2_RXDMA_ERROR_CODE_OFFSET >> 2))) & \
+	WBM_RELEASE_RING_2_RXDMA_ERROR_CODE_MASK) >>	\
+	WBM_RELEASE_RING_2_RXDMA_ERROR_CODE_LSB)
+
+/**
+ * hal_rx_wbm_err_info_get_generic(): Retrieves WBM error code and reason and
+ *	save it to hal_wbm_err_desc_info structure passed by caller
+ * @wbm_desc: wbm ring descriptor
+ * @wbm_er_info1: hal_wbm_err_desc_info structure, output parameter.
+ * Return: void
+ */
+static inline void hal_rx_wbm_err_info_get_generic(void *wbm_desc,
+				void *wbm_er_info1)
+{
+	struct hal_wbm_err_desc_info *wbm_er_info =
+		(struct hal_wbm_err_desc_info *)wbm_er_info1;
+
+	wbm_er_info->wbm_err_src = HAL_RX_WBM_ERR_SRC_GET(wbm_desc);
+	wbm_er_info->reo_psh_rsn = HAL_RX_WBM_REO_PUSH_REASON_GET(wbm_desc);
+	wbm_er_info->reo_err_code = HAL_RX_WBM_REO_ERROR_CODE_GET(wbm_desc);
+	wbm_er_info->rxdma_psh_rsn = HAL_RX_WBM_RXDMA_PUSH_REASON_GET(wbm_desc);
+	wbm_er_info->rxdma_err_code = HAL_RX_WBM_RXDMA_ERROR_CODE_GET(wbm_desc);
+}
+
+/**
+ * hal_tx_comp_get_release_reason_generic() - TQM Release reason
+ * @hal_desc: completion ring descriptor pointer
+ *
+ * This function will return the type of pointer - buffer or descriptor
+ *
+ * Return: buffer type
+ */
+static inline uint8_t hal_tx_comp_get_release_reason_generic(void *hal_desc)
+{
+	uint32_t comp_desc =
+		*(uint32_t *) (((uint8_t *) hal_desc) +
+			       WBM_RELEASE_RING_2_TQM_RELEASE_REASON_OFFSET);
+
+	return (comp_desc & WBM_RELEASE_RING_2_TQM_RELEASE_REASON_MASK) >>
+		WBM_RELEASE_RING_2_TQM_RELEASE_REASON_LSB;
+}
+
+/**
+ * hal_rx_dump_mpdu_start_tlv_generic: dump RX mpdu_start TLV in structured
+ *			       human readable format.
+ * @mpdu_start: pointer the rx_attention TLV in pkt.
+ * @dbg_level: log level.
+ *
+ * Return: void
+ */
+static inline void hal_rx_dump_mpdu_start_tlv_generic(void *mpdustart,
+						      uint8_t dbg_level)
+{
+	struct rx_mpdu_start *mpdu_start = (struct rx_mpdu_start *)mpdustart;
+	struct rx_mpdu_info *mpdu_info =
+		(struct rx_mpdu_info *)&mpdu_start->rx_mpdu_info_details;
+
+	QDF_TRACE(QDF_MODULE_ID_DP, dbg_level,
+			"rx_mpdu_start tlv - "
+			"rxpcu_mpdu_filter_in_category: %d "
+			"sw_frame_group_id: %d "
+			"ndp_frame: %d "
+			"phy_err: %d "
+			"phy_err_during_mpdu_header: %d "
+			"protocol_version_err: %d "
+			"ast_based_lookup_valid: %d "
+			"phy_ppdu_id: %d "
+			"ast_index: %d "
+			"sw_peer_id: %d "
+			"mpdu_frame_control_valid: %d "
+			"mpdu_duration_valid: %d "
+			"mac_addr_ad1_valid: %d "
+			"mac_addr_ad2_valid: %d "
+			"mac_addr_ad3_valid: %d "
+			"mac_addr_ad4_valid: %d "
+			"mpdu_sequence_control_valid: %d "
+			"mpdu_qos_control_valid: %d "
+			"mpdu_ht_control_valid: %d "
+			"frame_encryption_info_valid: %d "
+			"fr_ds: %d "
+			"to_ds: %d "
+			"encrypted: %d "
+			"mpdu_retry: %d "
+			"mpdu_sequence_number: %d "
+			"epd_en: %d "
+			"all_frames_shall_be_encrypted: %d "
+			"encrypt_type: %d "
+			"mesh_sta: %d "
+			"bssid_hit: %d "
+			"bssid_number: %d "
+			"tid: %d "
+			"pn_31_0: %d "
+			"pn_63_32: %d "
+			"pn_95_64: %d "
+			"pn_127_96: %d "
+			"peer_meta_data: %d "
+			"rxpt_classify_info.reo_destination_indication: %d "
+			"rxpt_classify_info.use_flow_id_toeplitz_clfy: %d "
+			"rx_reo_queue_desc_addr_31_0: %d "
+			"rx_reo_queue_desc_addr_39_32: %d "
+			"receive_queue_number: %d "
+			"pre_delim_err_warning: %d "
+			"first_delim_err: %d "
+			"key_id_octet: %d "
+			"new_peer_entry: %d "
+			"decrypt_needed: %d "
+			"decap_type: %d "
+			"rx_insert_vlan_c_tag_padding: %d "
+			"rx_insert_vlan_s_tag_padding: %d "
+			"strip_vlan_c_tag_decap: %d "
+			"strip_vlan_s_tag_decap: %d "
+			"pre_delim_count: %d "
+			"ampdu_flag: %d "
+			"bar_frame: %d "
+			"mpdu_length: %d "
+			"first_mpdu: %d "
+			"mcast_bcast: %d "
+			"ast_index_not_found: %d "
+			"ast_index_timeout: %d "
+			"power_mgmt: %d "
+			"non_qos: %d "
+			"null_data: %d "
+			"mgmt_type: %d "
+			"ctrl_type: %d "
+			"more_data: %d "
+			"eosp: %d "
+			"fragment_flag: %d "
+			"order: %d "
+			"u_apsd_trigger: %d "
+			"encrypt_required: %d "
+			"directed: %d "
+			"mpdu_frame_control_field: %d "
+			"mpdu_duration_field: %d "
+			"mac_addr_ad1_31_0: %d "
+			"mac_addr_ad1_47_32: %d "
+			"mac_addr_ad2_15_0: %d "
+			"mac_addr_ad2_47_16: %d "
+			"mac_addr_ad3_31_0: %d "
+			"mac_addr_ad3_47_32: %d "
+			"mpdu_sequence_control_field: %d "
+			"mac_addr_ad4_31_0: %d "
+			"mac_addr_ad4_47_32: %d "
+			"mpdu_qos_control_field: %d "
+			"mpdu_ht_control_field: %d ",
+			mpdu_info->rxpcu_mpdu_filter_in_category,
+			mpdu_info->sw_frame_group_id,
+			mpdu_info->ndp_frame,
+			mpdu_info->phy_err,
+			mpdu_info->phy_err_during_mpdu_header,
+			mpdu_info->protocol_version_err,
+			mpdu_info->ast_based_lookup_valid,
+			mpdu_info->phy_ppdu_id,
+			mpdu_info->ast_index,
+			mpdu_info->sw_peer_id,
+			mpdu_info->mpdu_frame_control_valid,
+			mpdu_info->mpdu_duration_valid,
+			mpdu_info->mac_addr_ad1_valid,
+			mpdu_info->mac_addr_ad2_valid,
+			mpdu_info->mac_addr_ad3_valid,
+			mpdu_info->mac_addr_ad4_valid,
+			mpdu_info->mpdu_sequence_control_valid,
+			mpdu_info->mpdu_qos_control_valid,
+			mpdu_info->mpdu_ht_control_valid,
+			mpdu_info->frame_encryption_info_valid,
+			mpdu_info->fr_ds,
+			mpdu_info->to_ds,
+			mpdu_info->encrypted,
+			mpdu_info->mpdu_retry,
+			mpdu_info->mpdu_sequence_number,
+			mpdu_info->epd_en,
+			mpdu_info->all_frames_shall_be_encrypted,
+			mpdu_info->encrypt_type,
+			mpdu_info->mesh_sta,
+			mpdu_info->bssid_hit,
+			mpdu_info->bssid_number,
+			mpdu_info->tid,
+			mpdu_info->pn_31_0,
+			mpdu_info->pn_63_32,
+			mpdu_info->pn_95_64,
+			mpdu_info->pn_127_96,
+			mpdu_info->peer_meta_data,
+			mpdu_info->rxpt_classify_info_details.reo_destination_indication,
+			mpdu_info->rxpt_classify_info_details.use_flow_id_toeplitz_clfy,
+			mpdu_info->rx_reo_queue_desc_addr_31_0,
+			mpdu_info->rx_reo_queue_desc_addr_39_32,
+			mpdu_info->receive_queue_number,
+			mpdu_info->pre_delim_err_warning,
+			mpdu_info->first_delim_err,
+			mpdu_info->key_id_octet,
+			mpdu_info->new_peer_entry,
+			mpdu_info->decrypt_needed,
+			mpdu_info->decap_type,
+			mpdu_info->rx_insert_vlan_c_tag_padding,
+			mpdu_info->rx_insert_vlan_s_tag_padding,
+			mpdu_info->strip_vlan_c_tag_decap,
+			mpdu_info->strip_vlan_s_tag_decap,
+			mpdu_info->pre_delim_count,
+			mpdu_info->ampdu_flag,
+			mpdu_info->bar_frame,
+			mpdu_info->mpdu_length,
+			mpdu_info->first_mpdu,
+			mpdu_info->mcast_bcast,
+			mpdu_info->ast_index_not_found,
+			mpdu_info->ast_index_timeout,
+			mpdu_info->power_mgmt,
+			mpdu_info->non_qos,
+			mpdu_info->null_data,
+			mpdu_info->mgmt_type,
+			mpdu_info->ctrl_type,
+			mpdu_info->more_data,
+			mpdu_info->eosp,
+			mpdu_info->fragment_flag,
+			mpdu_info->order,
+			mpdu_info->u_apsd_trigger,
+			mpdu_info->encrypt_required,
+			mpdu_info->directed,
+			mpdu_info->mpdu_frame_control_field,
+			mpdu_info->mpdu_duration_field,
+			mpdu_info->mac_addr_ad1_31_0,
+			mpdu_info->mac_addr_ad1_47_32,
+			mpdu_info->mac_addr_ad2_15_0,
+			mpdu_info->mac_addr_ad2_47_16,
+			mpdu_info->mac_addr_ad3_31_0,
+			mpdu_info->mac_addr_ad3_47_32,
+			mpdu_info->mpdu_sequence_control_field,
+			mpdu_info->mac_addr_ad4_31_0,
+			mpdu_info->mac_addr_ad4_47_32,
+			mpdu_info->mpdu_qos_control_field,
+			mpdu_info->mpdu_ht_control_field);
+}
 #endif
 
 /**

hal/wifi3.0/hal_internal.h

@@ -285,9 +285,10 @@ struct hal_hw_txrx_ops {
 	void (*hal_tx_desc_set_lmac_id)(void *desc, uint8_t lmac_id);
 	 void (*hal_tx_desc_set_buf_addr)(void *desc, dma_addr_t paddr,
 			uint8_t pool_id, uint32_t desc_id, uint8_t type);
-	void (*hal_tx_comp_get_status)(void *desc, void *ts);
 	void (*hal_tx_desc_set_search_type)(void *desc, uint8_t search_type);
 	void (*hal_tx_desc_set_search_index)(void *desc, uint32_t search_index);
+	void (*hal_tx_comp_get_status)(void *desc, void *ts, void *hal);
+	uint8_t (*hal_tx_comp_get_release_reason)(void *hal_desc);
 
 	/* rx */
 	uint32_t (*hal_rx_msdu_start_nss_get)(uint8_t *);
@@ -309,6 +310,10 @@ struct hal_hw_txrx_ops {
 	uint32_t (*hal_rx_status_get_tlv_info)(void *rx_tlv_hdr,
 			void *ppdu_info,
 			void *hal);
+	void (*hal_rx_wbm_err_info_get)(void *wbm_desc,
+				void *wbm_er_info);
+	void (*hal_rx_dump_mpdu_start_tlv)(void *mpdustart,
+						uint8_t dbg_level);
 };
 
 /**

hal/wifi3.0/hal_rx.h

@@ -2317,10 +2317,6 @@ uint8_t hal_rx_ret_buf_manager_get(void *ring_desc)
  * RX WBM ERROR APIS
  ******************************************************************************/
 
-#define HAL_RX_WBM_ERR_SRC_GET(wbm_desc) (((*(((uint32_t *) wbm_desc)+ \
-		(WBM_RELEASE_RING_2_RELEASE_SOURCE_MODULE_OFFSET >> 2))) & \
-		WBM_RELEASE_RING_2_RELEASE_SOURCE_MODULE_MASK) >> \
-		WBM_RELEASE_RING_2_RELEASE_SOURCE_MODULE_LSB)
 
 #define HAL_RX_WBM_BUF_TYPE_GET(wbm_desc) (((*(((uint32_t *) wbm_desc)+ \
 		(WBM_RELEASE_RING_2_BUFFER_OR_DESC_TYPE_OFFSET >> 2))) & \
@@ -2341,15 +2337,6 @@ enum hal_rx_wbm_reo_push_reason {
 	HAL_RX_WBM_REO_PSH_RSN_ROUTE,
 };
 
-#define HAL_RX_WBM_REO_PUSH_REASON_GET(wbm_desc) (((*(((uint32_t *) wbm_desc)+ \
-		(WBM_RELEASE_RING_2_REO_PUSH_REASON_OFFSET >> 2))) & \
-		WBM_RELEASE_RING_2_REO_PUSH_REASON_MASK) >> \
-		WBM_RELEASE_RING_2_REO_PUSH_REASON_LSB)
-
-#define HAL_RX_WBM_REO_ERROR_CODE_GET(wbm_desc) (((*(((uint32_t *) wbm_desc)+ \
-		(WBM_RELEASE_RING_2_REO_ERROR_CODE_OFFSET >> 2))) & \
-		WBM_RELEASE_RING_2_REO_ERROR_CODE_MASK) >> \
-		WBM_RELEASE_RING_2_REO_ERROR_CODE_LSB)
 
 /**
  * enum hal_rx_wbm_rxdma_push_reason: Indicates why REO pushed the frame to
@@ -2365,17 +2352,6 @@ enum hal_rx_wbm_rxdma_push_reason {
 	HAL_RX_WBM_RXDMA_PSH_RSN_ROUTE,
 };
 
-#define HAL_RX_WBM_RXDMA_PUSH_REASON_GET(wbm_desc)	\
-	(((*(((uint32_t *) wbm_desc) +			\
-	(WBM_RELEASE_RING_2_RXDMA_PUSH_REASON_OFFSET >> 2))) & \
-	WBM_RELEASE_RING_2_RXDMA_PUSH_REASON_MASK) >>	\
-	WBM_RELEASE_RING_2_RXDMA_PUSH_REASON_LSB)
-
-#define HAL_RX_WBM_RXDMA_ERROR_CODE_GET(wbm_desc)	\
-	(((*(((uint32_t *) wbm_desc) +			\
-	(WBM_RELEASE_RING_2_RXDMA_ERROR_CODE_OFFSET >> 2))) & \
-	WBM_RELEASE_RING_2_RXDMA_ERROR_CODE_MASK) >>	\
-	WBM_RELEASE_RING_2_RXDMA_ERROR_CODE_LSB)
 
 #define HAL_RX_WBM_FIRST_MSDU_GET(wbm_desc)		\
 	(((*(((uint32_t *) wbm_desc) +			\
@@ -2510,193 +2486,13 @@ static inline void hal_rx_dump_rx_attention_tlv(struct rx_attention *rx_attn,
 
 }
 
-/**
- * hal_rx_dump_mpdu_start_tlv: dump RX mpdu_start TLV in structured
- *			       human readable format.
- * @ mpdu_start: pointer the rx_attention TLV in pkt.
- * @ dbg_level: log level.
- *
- * Return: void
- */
 static inline void hal_rx_dump_mpdu_start_tlv(struct rx_mpdu_start *mpdu_start,
-uint8_t dbg_level)
+					      uint8_t dbg_level,
+					      struct hal_soc *hal)
 {
-	struct	rx_mpdu_info *mpdu_info =
-		(struct rx_mpdu_info *) &mpdu_start->rx_mpdu_info_details;
-	QDF_TRACE(QDF_MODULE_ID_DP, dbg_level,
-			"rx_mpdu_start tlv - "
-			"rxpcu_mpdu_filter_in_category: %d "
-			"sw_frame_group_id: %d "
-			"ndp_frame: %d "
-			"phy_err: %d "
-			"phy_err_during_mpdu_header: %d "
-			"protocol_version_err: %d "
-			"ast_based_lookup_valid: %d "
-			"phy_ppdu_id: %d "
-			"ast_index: %d "
-			"sw_peer_id: %d "
-			"mpdu_frame_control_valid: %d "
-			"mpdu_duration_valid: %d "
-			"mac_addr_ad1_valid: %d "
-			"mac_addr_ad2_valid: %d "
-			"mac_addr_ad3_valid: %d "
-			"mac_addr_ad4_valid: %d "
-			"mpdu_sequence_control_valid: %d "
-			"mpdu_qos_control_valid: %d "
-			"mpdu_ht_control_valid: %d "
-			"frame_encryption_info_valid: %d "
-			"fr_ds: %d "
-			"to_ds: %d "
-			"encrypted: %d "
-			"mpdu_retry: %d "
-			"mpdu_sequence_number: %d "
-			"epd_en: %d "
-			"all_frames_shall_be_encrypted: %d "
-			"encrypt_type: %d "
-			"mesh_sta: %d "
-			"bssid_hit: %d "
-			"bssid_number: %d "
-			"tid: %d "
-			"pn_31_0: %d "
-			"pn_63_32: %d "
-			"pn_95_64: %d "
-			"pn_127_96: %d "
-			"peer_meta_data: %d "
-			"rxpt_classify_info.reo_destination_indication: %d "
-			"rxpt_classify_info.use_flow_id_toeplitz_clfy: %d "
-			"rx_reo_queue_desc_addr_31_0: %d "
-			"rx_reo_queue_desc_addr_39_32: %d "
-			"receive_queue_number: %d "
-			"pre_delim_err_warning: %d "
-			"first_delim_err: %d "
-			"key_id_octet: %d "
-			"new_peer_entry: %d "
-			"decrypt_needed: %d "
-			"decap_type: %d "
-			"rx_insert_vlan_c_tag_padding: %d "
-			"rx_insert_vlan_s_tag_padding: %d "
-			"strip_vlan_c_tag_decap: %d "
-			"strip_vlan_s_tag_decap: %d "
-			"pre_delim_count: %d "
-			"ampdu_flag: %d "
-			"bar_frame: %d "
-			"mpdu_length: %d "
-			"first_mpdu: %d "
-			"mcast_bcast: %d "
-			"ast_index_not_found: %d "
-			"ast_index_timeout: %d "
-			"power_mgmt: %d "
-			"non_qos: %d "
-			"null_data: %d "
-			"mgmt_type: %d "
-			"ctrl_type: %d "
-			"more_data: %d "
-			"eosp: %d "
-			"fragment_flag: %d "
-			"order: %d "
-			"u_apsd_trigger: %d "
-			"encrypt_required: %d "
-			"directed: %d "
-			"mpdu_frame_control_field: %d "
-			"mpdu_duration_field: %d "
-			"mac_addr_ad1_31_0: %d "
-			"mac_addr_ad1_47_32: %d "
-			"mac_addr_ad2_15_0: %d "
-			"mac_addr_ad2_47_16: %d "
-			"mac_addr_ad3_31_0: %d "
-			"mac_addr_ad3_47_32: %d "
-			"mpdu_sequence_control_field: %d "
-			"mac_addr_ad4_31_0: %d "
-			"mac_addr_ad4_47_32: %d "
-			"mpdu_qos_control_field: %d "
-			"mpdu_ht_control_field: %d ",
-			mpdu_info->rxpcu_mpdu_filter_in_category,
-			mpdu_info->sw_frame_group_id,
-			mpdu_info->ndp_frame,
-			mpdu_info->phy_err,
-			mpdu_info->phy_err_during_mpdu_header,
-			mpdu_info->protocol_version_err,
-			mpdu_info->ast_based_lookup_valid,
-			mpdu_info->phy_ppdu_id,
-			mpdu_info->ast_index,
-			mpdu_info->sw_peer_id,
-			mpdu_info->mpdu_frame_control_valid,
-			mpdu_info->mpdu_duration_valid,
-			mpdu_info->mac_addr_ad1_valid,
-			mpdu_info->mac_addr_ad2_valid,
-			mpdu_info->mac_addr_ad3_valid,
-			mpdu_info->mac_addr_ad4_valid,
-			mpdu_info->mpdu_sequence_control_valid,
-			mpdu_info->mpdu_qos_control_valid,
-			mpdu_info->mpdu_ht_control_valid,
-			mpdu_info->frame_encryption_info_valid,
-			mpdu_info->fr_ds,
-			mpdu_info->to_ds,
-			mpdu_info->encrypted,
-			mpdu_info->mpdu_retry,
-			mpdu_info->mpdu_sequence_number,
-			mpdu_info->epd_en,
-			mpdu_info->all_frames_shall_be_encrypted,
-			mpdu_info->encrypt_type,
-			mpdu_info->mesh_sta,
-			mpdu_info->bssid_hit,
-			mpdu_info->bssid_number,
-			mpdu_info->tid,
-			mpdu_info->pn_31_0,
-			mpdu_info->pn_63_32,
-			mpdu_info->pn_95_64,
-			mpdu_info->pn_127_96,
-			mpdu_info->peer_meta_data,
-			mpdu_info->rxpt_classify_info_details.reo_destination_indication,
-			mpdu_info->rxpt_classify_info_details.use_flow_id_toeplitz_clfy,
-			mpdu_info->rx_reo_queue_desc_addr_31_0,
-			mpdu_info->rx_reo_queue_desc_addr_39_32,
-			mpdu_info->receive_queue_number,
-			mpdu_info->pre_delim_err_warning,
-			mpdu_info->first_delim_err,
-			mpdu_info->key_id_octet,
-			mpdu_info->new_peer_entry,
-			mpdu_info->decrypt_needed,
-			mpdu_info->decap_type,
-			mpdu_info->rx_insert_vlan_c_tag_padding,
-			mpdu_info->rx_insert_vlan_s_tag_padding,
-			mpdu_info->strip_vlan_c_tag_decap,
-			mpdu_info->strip_vlan_s_tag_decap,
-			mpdu_info->pre_delim_count,
-			mpdu_info->ampdu_flag,
-			mpdu_info->bar_frame,
-			mpdu_info->mpdu_length,
-			mpdu_info->first_mpdu,
-			mpdu_info->mcast_bcast,
-			mpdu_info->ast_index_not_found,
-			mpdu_info->ast_index_timeout,
-			mpdu_info->power_mgmt,
-			mpdu_info->non_qos,
-			mpdu_info->null_data,
-			mpdu_info->mgmt_type,
-			mpdu_info->ctrl_type,
-			mpdu_info->more_data,
-			mpdu_info->eosp,
-			mpdu_info->fragment_flag,
-			mpdu_info->order,
-			mpdu_info->u_apsd_trigger,
-			mpdu_info->encrypt_required,
-			mpdu_info->directed,
-			mpdu_info->mpdu_frame_control_field,
-			mpdu_info->mpdu_duration_field,
-			mpdu_info->mac_addr_ad1_31_0,
-			mpdu_info->mac_addr_ad1_47_32,
-			mpdu_info->mac_addr_ad2_15_0,
-			mpdu_info->mac_addr_ad2_47_16,
-			mpdu_info->mac_addr_ad3_31_0,
-			mpdu_info->mac_addr_ad3_47_32,
-			mpdu_info->mpdu_sequence_control_field,
-			mpdu_info->mac_addr_ad4_31_0,
-			mpdu_info->mac_addr_ad4_47_32,
-			mpdu_info->mpdu_qos_control_field,
-			mpdu_info->mpdu_ht_control_field);
-}
 
+	hal->ops->hal_rx_dump_mpdu_start_tlv(mpdu_start, dbg_level);
+}
 /**
  * hal_rx_dump_msdu_end_tlv: dump RX msdu_end TLV in structured
  *			     human readable format.
@@ -3242,13 +3038,10 @@ uint8_t hal_rx_reo_ent_rxdma_error_code_get(void *reo_ent_desc)
  * Return: void
  */
 static inline void hal_rx_wbm_err_info_get(void *wbm_desc,
-				struct hal_wbm_err_desc_info *wbm_er_info)
+				struct hal_wbm_err_desc_info *wbm_er_info,
+				struct hal_soc *hal_soc)
 {
-	wbm_er_info->wbm_err_src = HAL_RX_WBM_ERR_SRC_GET(wbm_desc);
-	wbm_er_info->reo_psh_rsn = HAL_RX_WBM_REO_PUSH_REASON_GET(wbm_desc);
-	wbm_er_info->reo_err_code = HAL_RX_WBM_REO_ERROR_CODE_GET(wbm_desc);
-	wbm_er_info->rxdma_psh_rsn = HAL_RX_WBM_RXDMA_PUSH_REASON_GET(wbm_desc);
-	wbm_er_info->rxdma_err_code = HAL_RX_WBM_RXDMA_ERROR_CODE_GET(wbm_desc);
+	hal_soc->ops->hal_rx_wbm_err_info_get(wbm_desc, (void *)wbm_er_info);
 }
 
 /**
@@ -3396,7 +3189,7 @@ static inline void hal_rx_dump_pkt_tlvs(struct hal_soc *hal_soc,
 	struct rx_pkt_hdr_tlv    *pkt_hdr_tlv = &pkt_tlvs->pkt_hdr_tlv;
 
 	hal_rx_dump_rx_attention_tlv(rx_attn, dbg_level);
-	hal_rx_dump_mpdu_start_tlv(mpdu_start, dbg_level);
+	hal_rx_dump_mpdu_start_tlv(mpdu_start, dbg_level, hal_soc);
 	hal_rx_dump_msdu_start_tlv(hal_soc, msdu_start, dbg_level);
 	hal_rx_dump_mpdu_end_tlv(mpdu_end, dbg_level);
 	hal_rx_dump_msdu_end_tlv(hal_soc, msdu_end, dbg_level);

hal/wifi3.0/hal_tx.h

@@ -784,16 +784,14 @@ static inline uint32_t hal_tx_comp_get_buffer_type(void *hal_desc)
  *
  * Return: buffer type
  */
-static inline uint8_t hal_tx_comp_get_release_reason(void *hal_desc)
+static inline uint8_t hal_tx_comp_get_release_reason(void *hal_desc, void *hal)
 {
-	uint32_t comp_desc =
-		*(uint32_t *) (((uint8_t *) hal_desc) +
-			       WBM_RELEASE_RING_2_TQM_RELEASE_REASON_OFFSET);
+	struct hal_soc *hal_soc = hal;
 
-	return (comp_desc & WBM_RELEASE_RING_2_TQM_RELEASE_REASON_MASK) >>
-		WBM_RELEASE_RING_2_TQM_RELEASE_REASON_LSB;
+	return hal_soc->ops->hal_tx_comp_get_release_reason(hal_desc);
 }
 
+
 /**
  * hal_tx_comp_desc_sync() - collect hardware descriptor contents
  * @hal_desc: hardware descriptor pointer
@@ -968,7 +966,7 @@ static inline void hal_tx_comp_get_status(void *desc, void *ts, void *hal)
 {
 	struct hal_soc *hal_soc = hal;
 
-	hal_soc->ops->hal_tx_comp_get_status(desc, ts);
+	hal_soc->ops->hal_tx_comp_get_status(desc, ts, hal);
 }
 
 

hal/wifi3.0/qca6290/hal_6290.c

@@ -121,9 +121,10 @@ struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
 	hal_tx_update_dscp_tid_6290,
 	hal_tx_desc_set_lmac_id_6290,
 	hal_tx_desc_set_buf_addr_generic,
-	hal_tx_comp_get_status_generic,
 	hal_tx_desc_set_search_type_generic,
 	hal_tx_desc_set_search_index_generic,
+	hal_tx_comp_get_status_generic,
+	hal_tx_comp_get_release_reason_generic,
 
 	/* rx */
 	hal_rx_msdu_start_nss_get_6290,
@@ -140,6 +141,8 @@ struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
 	hal_rx_link_desc_msdu0_ptr_generic,
 	hal_reo_status_get_header_generic,
 	hal_rx_status_get_tlv_info_generic,
+	hal_rx_wbm_err_info_get_generic,
+	hal_rx_dump_mpdu_start_tlv_generic,
 };
 
 struct hal_hw_srng_config hw_srng_table_6290[] = {

hal/wifi3.0/qca6390/hal_6390.c

@@ -121,9 +121,10 @@ struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
 	hal_tx_update_dscp_tid_6390,
 	hal_tx_desc_set_lmac_id_6390,
 	hal_tx_desc_set_buf_addr_generic,
-	hal_tx_comp_get_status_generic,
 	hal_tx_desc_set_search_type_generic,
 	hal_tx_desc_set_search_index_generic,
+	hal_tx_comp_get_status_generic,
+	hal_tx_comp_get_release_reason_generic,
 
 	/* rx */
 	hal_rx_msdu_start_nss_get_6390,
@@ -140,6 +141,8 @@ struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
 	hal_rx_link_desc_msdu0_ptr_generic,
 	hal_reo_status_get_header_generic,
 	hal_rx_status_get_tlv_info_generic,
+	hal_rx_wbm_err_info_get_generic,
+	hal_rx_dump_mpdu_start_tlv_generic,
 };
 
 struct hal_hw_srng_config hw_srng_table_6390[] = {

hal/wifi3.0/qca8074v1/hal_8074v1.c

@@ -117,9 +117,10 @@ struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
 	hal_tx_update_dscp_tid_8074,
 	hal_tx_desc_set_lmac_id_8074,
 	hal_tx_desc_set_buf_addr_generic,
-	hal_tx_comp_get_status_generic,
 	hal_tx_desc_set_search_type_generic,
 	hal_tx_desc_set_search_index_generic,
+	hal_tx_comp_get_status_generic,
+	hal_tx_comp_get_release_reason_generic,
 
 	/* rx */
 	hal_rx_msdu_start_nss_get_8074,
@@ -136,6 +137,8 @@ struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
 	hal_rx_link_desc_msdu0_ptr_generic,
 	hal_reo_status_get_header_generic,
 	hal_rx_status_get_tlv_info_generic,
+	hal_rx_wbm_err_info_get_generic,
+	hal_rx_dump_mpdu_start_tlv_generic,
 };
 
 struct hal_hw_srng_config hw_srng_table_8074[] = {

hal/wifi3.0/qca8074v2/hal_8074v2.c

@@ -117,9 +117,10 @@ struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
 	hal_tx_update_dscp_tid_8074v2,
 	hal_tx_desc_set_lmac_id_8074v2,
 	hal_tx_desc_set_buf_addr_generic,
-	hal_tx_comp_get_status_generic,
 	hal_tx_desc_set_search_type_generic,
 	hal_tx_desc_set_search_index_generic,
+	hal_tx_comp_get_status_generic,
+	hal_tx_comp_get_release_reason_generic,
 
 	/* rx */
 	hal_rx_msdu_start_nss_get_8074v2,
@@ -136,6 +137,8 @@ struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
 	hal_rx_link_desc_msdu0_ptr_generic,
 	hal_reo_status_get_header_generic,
 	hal_rx_status_get_tlv_info_generic,
+	hal_rx_wbm_err_info_get_generic,
+	hal_rx_dump_mpdu_start_tlv_generic,
 };
 
 struct hal_hw_srng_config hw_srng_table_8074v2[] = {