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@@ -161,6 +161,7 @@
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#define SRNG_MAX_SIZE_DWORDS \
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(SRNG_MS(SRNG_SRC_FLD(BASE_MSB, RING_SIZE), 0xffffffff))
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+#define HAL_RXDMA_MAX_RING_SIZE 0xFFFF
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/**
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* HW ring configuration table to identify hardware ring attributes like
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* register addresses, number of rings, ring entry size etc., for each type
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@@ -191,6 +192,8 @@ static struct hal_hw_srng_config hw_srng_table[] = {
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HWIO_REO_R2_REO2SW2_RING_HP_ADDR(0) -
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HWIO_REO_R2_REO2SW1_RING_HP_ADDR(0),
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},
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+ .max_size = HWIO_REO_R0_REO2SW1_RING_BASE_MSB_RING_SIZE_BMSK >>
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+ HWIO_REO_R0_REO2SW1_RING_BASE_MSB_RING_SIZE_SHFT,
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},
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{ /* REO_EXCEPTION */
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/* Designating REO2TCL ring as exception ring. This ring is
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@@ -211,6 +214,8 @@ static struct hal_hw_srng_config hw_srng_table[] = {
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/* Single ring - provide ring size if multiple rings of this
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* type are supported */
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.reg_size = {},
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+ .max_size = HWIO_REO_R0_REO2TCL_RING_BASE_MSB_RING_SIZE_BMSK >>
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+ HWIO_REO_R0_REO2TCL_RING_BASE_MSB_RING_SIZE_SHFT,
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},
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{ /* REO_REINJECT */
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.start_ring_id = HAL_SRNG_SW2REO,
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@@ -227,6 +232,8 @@ static struct hal_hw_srng_config hw_srng_table[] = {
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/* Single ring - provide ring size if multiple rings of this
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* type are supported */
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.reg_size = {},
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+ .max_size = HWIO_REO_R0_SW2REO_RING_BASE_MSB_RING_SIZE_BMSK >>
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+ HWIO_REO_R0_SW2REO_RING_BASE_MSB_RING_SIZE_SHFT,
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},
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{ /* REO_CMD */
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.start_ring_id = HAL_SRNG_REO_CMD,
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@@ -244,6 +251,8 @@ static struct hal_hw_srng_config hw_srng_table[] = {
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/* Single ring - provide ring size if multiple rings of this
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* type are supported */
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.reg_size = {},
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+ .max_size = HWIO_REO_R0_REO_CMD_RING_BASE_MSB_RING_SIZE_BMSK >>
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+ HWIO_REO_R0_REO_CMD_RING_BASE_MSB_RING_SIZE_SHFT,
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},
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{ /* REO_STATUS */
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.start_ring_id = HAL_SRNG_REO_STATUS,
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@@ -261,6 +270,8 @@ static struct hal_hw_srng_config hw_srng_table[] = {
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/* Single ring - provide ring size if multiple rings of this
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* type are supported */
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.reg_size = {},
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+ .max_size = HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_RING_SIZE_BMSK >>
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+ HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_RING_SIZE_SHFT,
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},
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{ /* TCL_DATA */
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.start_ring_id = HAL_SRNG_SW2TCL1,
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@@ -281,6 +292,8 @@ static struct hal_hw_srng_config hw_srng_table[] = {
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HWIO_TCL_R2_SW2TCL2_RING_HP_ADDR(0) -
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HWIO_TCL_R2_SW2TCL1_RING_HP_ADDR(0),
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},
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+ .max_size = HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RING_SIZE_BMSK >>
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+ HWIO_TCL_R0_SW2TCL1_RING_BASE_MSB_RING_SIZE_SHFT,
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},
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{ /* TCL_CMD */
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.start_ring_id = HAL_SRNG_SW2TCL_CMD,
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@@ -298,6 +311,8 @@ static struct hal_hw_srng_config hw_srng_table[] = {
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/* Single ring - provide ring size if multiple rings of this
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* type are supported */
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.reg_size = {},
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+ .max_size = HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_MSB_RING_SIZE_BMSK >>
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+ HWIO_TCL_R0_SW2TCL_CMD_RING_BASE_MSB_RING_SIZE_SHFT,
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},
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{ /* TCL_STATUS */
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.start_ring_id = HAL_SRNG_TCL_STATUS,
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@@ -315,6 +330,8 @@ static struct hal_hw_srng_config hw_srng_table[] = {
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/* Single ring - provide ring size if multiple rings of this
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* type are supported */
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.reg_size = {},
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+ .max_size = HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RING_SIZE_BMSK >>
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+ HWIO_TCL_R0_TCL_STATUS1_RING_BASE_MSB_RING_SIZE_SHFT,
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},
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{ /* CE_SRC */
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.start_ring_id = HAL_SRNG_CE_0_SRC,
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@@ -334,6 +351,8 @@ static struct hal_hw_srng_config hw_srng_table[] = {
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SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_1_CHANNEL_SRC_REG_OFFSET -
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SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_0_CHANNEL_SRC_REG_OFFSET,
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},
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+ .max_size = HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_RING_SIZE_BMSK >>
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+ HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_RING_SIZE_SHFT,
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},
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{ /* CE_DST */
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.start_ring_id = HAL_SRNG_CE_0_DST,
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@@ -357,6 +376,8 @@ static struct hal_hw_srng_config hw_srng_table[] = {
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SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_1_CHANNEL_DST_REG_OFFSET -
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SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_0_CHANNEL_DST_REG_OFFSET,
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},
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+ .max_size = HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_RING_SIZE_BMSK >>
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+ HWIO_WFSS_CE_CHANNEL_DST_R0_DEST_RING_BASE_MSB_RING_SIZE_SHFT,
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},
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{ /* CE_DST_STATUS */
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.start_ring_id = HAL_SRNG_CE_0_DST_STATUS,
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@@ -377,6 +398,9 @@ static struct hal_hw_srng_config hw_srng_table[] = {
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SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_1_CHANNEL_DST_REG_OFFSET -
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SEQ_WCSS_UMAC_WFSS_CE_0_REG_WFSS_CE_0_CHANNEL_DST_REG_OFFSET,
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},
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+ .max_size =
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+ HWIO_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_RING_SIZE_BMSK >>
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+ HWIO_WFSS_CE_CHANNEL_DST_R0_STATUS_RING_BASE_MSB_RING_SIZE_SHFT,
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},
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{ /* WBM_IDLE_LINK */
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.start_ring_id = HAL_SRNG_WBM_IDLE_LINK,
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@@ -391,6 +415,9 @@ static struct hal_hw_srng_config hw_srng_table[] = {
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/* Single ring - provide ring size if multiple rings of this
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* type are supported */
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.reg_size = {},
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+ .max_size =
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+ HWIO_WBM_R0_WBM_IDLE_LINK_RING_BASE_MSB_RING_SIZE_BMSK >>
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+ HWIO_WBM_R0_WBM_IDLE_LINK_RING_BASE_MSB_RING_SIZE_SHFT,
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},
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{ /* SW2WBM_RELEASE */
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.start_ring_id = HAL_SRNG_WBM_SW_RELEASE,
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@@ -405,6 +432,9 @@ static struct hal_hw_srng_config hw_srng_table[] = {
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/* Single ring - provide ring size if multiple rings of this
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* type are supported */
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.reg_size = {},
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+ .max_size =
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+ HWIO_WBM_R0_SW_RELEASE_RING_BASE_MSB_RING_SIZE_BMSK >>
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+ HWIO_WBM_R0_SW_RELEASE_RING_BASE_MSB_RING_SIZE_SHFT,
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},
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{ /* WBM2SW_RELEASE */
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.start_ring_id = HAL_SRNG_WBM2SW0_RELEASE,
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@@ -422,6 +452,9 @@ static struct hal_hw_srng_config hw_srng_table[] = {
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HWIO_WBM_R2_WBM2SW1_RELEASE_RING_HP_ADDR(SEQ_WCSS_UMAC_WBM_REG_OFFSET) -
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HWIO_WBM_R2_WBM2SW0_RELEASE_RING_HP_ADDR(SEQ_WCSS_UMAC_WBM_REG_OFFSET),
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},
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+ .max_size =
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+ HWIO_WBM_R0_WBM2SW0_RELEASE_RING_BASE_MSB_RING_SIZE_BMSK >>
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+ HWIO_WBM_R0_WBM2SW0_RELEASE_RING_BASE_MSB_RING_SIZE_SHFT,
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},
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{ /* RXDMA_BUF */
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.start_ring_id = HAL_SRNG_WMAC1_SW2RXDMA0_BUF0,
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@@ -438,6 +471,7 @@ static struct hal_hw_srng_config hw_srng_table[] = {
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*/
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.reg_start = {},
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.reg_size = {},
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+ .max_size = HAL_RXDMA_MAX_RING_SIZE,
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},
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{ /* RXDMA_DST */
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.start_ring_id = HAL_SRNG_WMAC1_RXDMA2SW0,
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@@ -450,6 +484,7 @@ static struct hal_hw_srng_config hw_srng_table[] = {
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*/
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.reg_start = {},
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.reg_size = {},
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+ .max_size = HAL_RXDMA_MAX_RING_SIZE,
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},
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{ /* RXDMA_MONITOR_BUF */
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.start_ring_id = HAL_SRNG_WMAC1_SW2RXDMA2_BUF,
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@@ -462,6 +497,7 @@ static struct hal_hw_srng_config hw_srng_table[] = {
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*/
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.reg_start = {},
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.reg_size = {},
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+ .max_size = HAL_RXDMA_MAX_RING_SIZE,
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},
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{ /* RXDMA_MONITOR_STATUS */
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.start_ring_id = HAL_SRNG_WMAC1_SW2RXDMA1_STATBUF,
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@@ -474,6 +510,7 @@ static struct hal_hw_srng_config hw_srng_table[] = {
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*/
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.reg_start = {},
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.reg_size = {},
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+ .max_size = HAL_RXDMA_MAX_RING_SIZE,
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},
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{ /* RXDMA_MONITOR_DST */
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.start_ring_id = HAL_SRNG_WMAC1_RXDMA2SW1,
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@@ -486,6 +523,7 @@ static struct hal_hw_srng_config hw_srng_table[] = {
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*/
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.reg_start = {},
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.reg_size = {},
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+ .max_size = HAL_RXDMA_MAX_RING_SIZE,
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},
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{ /* RXDMA_MONITOR_DESC */
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.start_ring_id = HAL_SRNG_WMAC1_SW2RXDMA1_DESC,
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@@ -498,6 +536,7 @@ static struct hal_hw_srng_config hw_srng_table[] = {
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*/
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.reg_start = {},
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.reg_size = {},
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+ .max_size = HAL_RXDMA_MAX_RING_SIZE,
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},
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{ /* DIR_BUF_RX_DMA_SRC */
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.start_ring_id = HAL_SRNG_DIR_BUF_RX_SRC_DMA_RING,
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@@ -510,6 +549,7 @@ static struct hal_hw_srng_config hw_srng_table[] = {
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*/
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.reg_start = {},
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.reg_size = {},
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+ .max_size = HAL_RXDMA_MAX_RING_SIZE,
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},
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#ifdef WLAN_FEATURE_CIF_CFR
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{ /* WIFI_POS_SRC */
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@@ -523,6 +563,7 @@ static struct hal_hw_srng_config hw_srng_table[] = {
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*/
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.reg_start = {},
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.reg_size = {},
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+ .max_size = HAL_RXDMA_MAX_RING_SIZE,
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},
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#endif
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};
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@@ -1325,8 +1366,10 @@ qdf_export_symbol(hal_srng_get_entrysize);
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*/
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uint32_t hal_srng_max_entries(void *hal_soc, int ring_type)
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{
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- struct hal_hw_srng_config *ring_config = HAL_SRNG_CONFIG(hal, ring_type);
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- return SRNG_MAX_SIZE_DWORDS / ring_config->entry_size;
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+ struct hal_hw_srng_config *ring_config =
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+ HAL_SRNG_CONFIG(hal, ring_type);
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+
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+ return ring_config->max_size / ring_config->entry_size;
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}
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qdf_export_symbol(hal_srng_max_entries);
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