Asynchronous command transfer wait during pre kickoff
is only applicable for DSI. The change ensures that
the flag is set only for DSI connector, otherwise it can
result in memory scribbling for other connectors.
Change-Id: I623f15cf13fcd3ae72f584d5ef8883570a848c93
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
DSI controller and clock will be disabled/enabled during panel mode
switch, so disallow backlight update during panel mode switch to
avoiding DSI exception.
Change-Id: I37e2f3c9aa929555593ffb53950521150ee7698f
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Make sure that cmd dma done mask is set before sending
dma commands. This will make sure that we don't timeout
if the refcnt's are not properly handled. Many oem's
have their own customizations around this which maynot
handle the refcnt's correctly.
Change-Id: If7f5ed1fae20b57f6e9147cae2caa3c5097466c9
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
For command mode panels, if a dynamic mode switch occurs on
the first frame, the current code skips DSI controller initialization
and registering for error handlers. This causes the software state
to be uninitialized for DSI CTRL, resulting in command transfer
failures and eventual crash. The change ensures that initialization
is complete even if the DMS occurs on first frame.
Change-Id: I83e3336f7c09424b6c7b95826c30b37974ec29ab
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Add this change to ensure that DFPS and RFI happen in the
same panel mode for avoiding unexpected panel mode switch.
Change-Id: I6783b320e73a88e8f75cb83bcce85e50f798b6ab
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Reject composition if panel mode switch is requested
during power on/off commits.
Change-Id: I3a5b28fd9f5bd927537824033a1c8dc838366d5b
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Avoid esd check during pm_suspend state because core
clock enable will fail. This change adds additional
check and also adds the clock enable failure check.
Change-Id: Ie8bfa4f74d323ff15a07fb037675f07ab942f016
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
It should not be an error that panel mode isn't specified
in timing node, so add this change to lower the log level
from error to info.
Change-Id: I49bd1fec1c09697d9829a8e0767dfa3cf2cff512
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
For constant fps feature, porch is calculated based on supported
clk rates. Currently, data type of local variables used for porch
calculation is u32 which leads to incorrect porch calculation for
higher clk rates. So, update the data type to u64.
Change-Id: I8eb04487d1dcce05989448c0b063e56752af412b
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Add changes to support dynamic switching of dsi clock feature for
phy ver 2.0. This helps to avoid RF interference with DSI clock.
Change-Id: I69958d9224665296cc0f272e39dcdfcefbe293d4
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
For video mode panels, async wait feature for DCS command
transmission may not always be reliable as additional programming
would be needed to ensure that the DCS commands are correctly scheduled.
Until this feature is properly implemented and validated, disable this
for video mode panels to avoid potential DSI command transfer
failures.
Change-Id: I18c853bc5607cc1cc523b36f6f346b213911c1a9
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Change will be removing checking and clearing dsi cmd done
interrupt in commit thread and in workqueue context, which
can race with dsi isr, when it tries to clear the interrupt.
Change-Id: I96e7f8dffed1af3cec0c7668ab1729337d4b260e
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
There is lag or lead in the FPS during dynamic clock change,
along with the increment or decrement in clock. So, HFP or
VFP are adjusted to ensure a constant FPS.
Change-Id: I87ba7a185104a0f5f1d13734a7e487e728d6b2c0
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
This change adds logic to align timing engine vsync with panel
tear check if it is supported.
Change-Id: I3f881f392929589848c893f567822b21c0650000
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
DSI host vsync is expected to align with panel internal vsync
during transition from command mode to video mode operation.
In order to facilitate this, keep panel TE enabled in video mode
operation until it is aligned with vysnc.
Change-Id: I3fc59b01336b30cd436be332af6953c5a01be7fd
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
Change fixes parsing of software TE tag added to the display
name from bootloader.
Change-Id: I4747cc6eff43d681477150d6cad7a737963bf11c
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Check against the max clk_type and clk_state enumerations before
to validate the type and state of DSI clocks to avoid Control
Flow Integrity issues.
Change-Id: Id53465c2b12debb1b356c0c91064eb017c2ca30d
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Register the MDSS_HW block (at base offset 0) for access via the
sde_reg node in SDE's debugfs directory. This is needed for
validating correct UBWC register programming.
Change-Id: I2494e066a7603747f2ec12546e58a17f2120a521
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
This reverts commit 7470449242.
This is required to satisfy cross component dependencies with
kernel-5.4.
Change-Id: Idba2983923a8605ec0a05408da48f7549730035d
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
This reverts commit 982574f095.
This is required to satisfy cross component dependencies with
kernel-5.4.
Change-Id: I979e0371973376c46f2a11659348df726be2679d
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
This reverts commit eaed3221fa
which uses a downstream implementation for checksum calculation.
This will be fixed once the upstream changes to address checksum
calculation are merged.
Change-Id: I7a6ed1c4d4baf52533485d59bcdcb6dd1009d626
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
Update the HBR and RBR swing and pre-emphasis levels as per the
latest published hardware programming guide.
Change-Id: If3b6713e0b6680f65539882221aae32b00bf0254
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
Update colorimetry definition usage and how we access DSC information
as per changes in the upstream DRM framework code.
Change-Id: Ie52aed2df2f6c3f2df1e4129f342a85256f8fae4
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
With the introduction of sync state drivers, msm_drm probe can be
moved back to module level from late init. It is now guaranteed
that the dependencies are probed before the actual driver is.
Change-Id: Ib7c3e0e3c3d32b37b7672b6119bcf5371783659d
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Support different safe, danger and creq qos lut
configuration based on display fps. It also removes
the fill level calculations from sspp and wb block
because mdss hw supports simple configuration.
Change-Id: I203e4300c9eab27d3632c890bedd6383cca0e5a8
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
DSC and VDC-M sub-block registers are not on contiguous
address range. This change allows dumping the registers
for each individual sub-block.
Change-Id: I06dfc64562211370a0e29f6fc1134351c47722f6
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Ramdump node only allocates portion of splash
buffer memory. It should not be within reserve
memory area because splash buffer is already reserving
these pages.
Change-Id: I7caa818b19cb993571e6bf0648a4dfbbc2ad9d71
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Add underrun line count information for each underrun.
Change-Id: I34a740c33240fa8d444f4bbc3b8b014b0282fca1
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
This reverts commit 483c9fdff4c611f250574fe6909cd8e5336808f5. It
is no longer needed on kernel-5.4 as all the upstream changes are
now available.
Change-Id: I11b0317c0e05ea2fe03fb1af734a79a1174b1922
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
