Add support for BT Soundwire port configurations.
Add support for flow control modes for fractional channel rates.
Configure slave side data ports for flow controls modes.
Fix the direction adn offset1 fields for Tx ports on BT Soundwire.
When the flow control mode is not required,
update the slave configuration accordingly.
Sample Interval HIGH field in slave port controls needs to be
reset to zero when Sample Interval value is less than 255.
Avoid clock stop mode for bt swr slave during runtime suspend call.
In case of fractional sampling rates, additional offset bits need
to be added between samples to carry flow control information.
Change-Id: If023946f62c5157119836cf43e8542cfd6e0ce16
Signed-off-by: Vangala, Amarnath <quic_avangala@quicinc.com>
-add support for swr version 1p7.
-Return 0 instead of EBUSY during swrm_suspend to
allow system to enter suspend without rx swrm
preventing it.
- Update proper reg value during pcm port config.
Change-Id: Id42d3625a0609507fffc92b650cfae92b0e1dc4f
Signed-off-by: Sarath Varma Ganapathiraju <quic_ganavarm@quicinc.com>
from Linux version(>= 5.10) for disabling the irq need
irq_set_irq_wake() along with disable_irq_nosync(). Only
disable_irq_nosync() not allows IQRs to fully disable.
Change-Id: I4eb18ec0d6b96cdb11dcc35d847fefb0ed59cc82
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
Add logic to handle invalid address passed to swrm_peek and swrm_poke
debugfs node.
Change-Id: I46443734e6b4b758276cdf8fd28a022d37112bfc
Signed-off-by: Faiz Nabi Kuchay <quic_fkuchay@quicinc.com>
During swr disconnect port, swr master num port is
updated based on the portinfo we receive from slave.
Instead update the master num port based on the ports
enabled. and also if requested port is not enabled
continue to check for other enable port instead of
returning error.
Change-Id: Ia8a6e4935df443f9833e01d56195b590afe3bb4a
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
During stress testing, observed master num port is
going out of bounds which is impacting the next usecase
and leads to bus clsh error.
added a check to set master num port to 0 if it is
going out of boundary.
Change-Id: If273230fcef612bae484b19c5b69506606b0e911
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
For PCM usecase enable/disable we have dedicated ports, so no need of
using counter to manage enable and disable of ports.
This is revert of change-id: I2c65e7658bf90ae01203ebb1b15f14db581ffa55.
Change-Id: Id1953f529569ae48b01dce1c88d2790479cf1a6b
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
PCM_DP_OUT/IN enable bit are used for any data_port which supports
word_length larger than 8. Disable these two bits only when all
the ports are disabled.
Change-Id: I2c65e7658bf90ae01203ebb1b15f14db581ffa55
Signed-off-by: Meng Wang <mengw@codeaurora.org>
during SSR, swrm_disable_ports() is not called so the pcm_enable_count
never decreased. Reset the count to 0 when SSR
Change-Id: I937dd309ab9fb2c28c0962053cd1632c891fb598
Signed-off-by: Junkai Cai <junkai@quicinc.com>
as part of swrm_runtime_suspend, multiple attempts are made
to write into swr regisers. Incase of SSR state, all those write
attempts are bound to fail.
Hence avoid swr read/write operations during SSR state.
Also move updating dev_up flag for SSR event to an early point in call flow.
Change-Id: I805d1ccf8bcdab5fdde7b74582a65463d5bcbd6e
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
Allow the swrm to runtime suspend first before entering system
suspend. This will prevent suspend being blocked for about 700ms.
Change-Id: I8f90a9f1ba4f6af0decc256cace2f3bd2295dece
disabling pcm port only when master port needs to be disabled.
Change-Id: I666d4acdad5d7c01e366fac972cb72f85f99d75e
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
If the peripheral device is not enumerated, device number is stuck at
0. Check device number for 0 before initializing port params.
Change-Id: I444b37d56bebdebf75e8e7554cd435beece6b066
During PDR, WSA auto-enumeration is swapped (WSA2
gets enumerated before WSA1 unlike bootup).
This causes offset1s to be swapped because dev_nums are
swapped and are used to index into device tree data.
Store dev_id during enumeration and use this instead of
dev_num to pick out offset1 from device tree data.
Change-Id: Ia98ba6554acf67055357625fc789065b60d7006b
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Update digital_cdc_rsc_mgr_hw_vote_enable/disable API with device
info for easy debug. Also, add swrm clock enable checks during SSR.
When SSR happens, swrm->hw_core_clk_en and swrm->aud_core_clk_en will
be reset without resetting audio_vote and core_vote clk. This would
cause clk mismatch in audio driver and adsp and device fails suspending
when there's no audio usecase. Make this change to reset audio_vote
and core_vote clk when receiving SWR_DEVICE_SSR_DOWN.
Change-Id: I9875aac9f6faf8b6481457a70f31b005073369e0
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>
Update settings to match how swr_mstr_ctrl driver is using the
SWR settings to set the registers. Previously, an offset1 of
0xFF would write 0xFF to the register instead of skipping it, unlike
other swr settings. This is similarly true for SWR Slave setting
for bp_mode.
Change-Id: I3c5b2635c5a88a52639cbac9455a544d5cfee154
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
replace all dev(pr)_err/info logs
that could potentially flood kernel logs with
ratelimit functions dev_err_ratelimited and
dev_info_ratelimited
Change-Id: I32dc6002dead1a07622978c4de63d541c01982fd
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
FIFO_Flush should only be for SWRM_INTERRUPT_STATUS_CMD_ERROR.
For other usecase, it should not be flushed otherwise it would
cause register write mismatch and cause some sideeffect.
Change-Id: I6d40a30129dfdf48993125fb57042ab97a13a631
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>
For PBR and CPS ports, need the ability to customized slave
SWR frame OFFSET1 settings. Add similar method to WCD TX where
offset1 and lane_ctrl parameters are parsed from WSA device tree
and configured in SWRM.
Change-Id: Ib973ed93d9daa5ba02461a156e5b0a8c816d371e
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
For all FIFO_WR/RD_CMDS, add function that increments cmd_id
every time for easier sw debugging.
Change-Id: I53d133d9b427dd6b80201aab3c6f367600e82bfc
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Slave reg SAMPLE_CONTROL_2_BANK (0x23) should only be written
when sample interval is > 0xFF otherwise we get CMD_Ignored IRQ.
Also add handling for this CMD_IGNORED_AND_EXEC_CONTINUED Irq.
Change-Id: I4693fb17ba78c73d4fda2e4ddce9fa6e0311309d
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Add CPU_m calculation in CPU_SW_MESSAGE.
Fix CLK_CTRL value. Skip 0x2C54 to 0x4000 in reg_show.
Change-Id: I487bfab9c9fa6c1e99af1b778da7d150ef5ac927
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
Simplify register write logic for PCM ports due to multi-ee changes.
Update SWRM_MCP_CTRL to SWRM_CLK_CTRL(ee).
Change-Id: I36e78f3f2abdb65925b141d5192adf618697d674
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
When ext clk stop wakeup and slave_pending_irq come together
then interrupt at swrslave is cleared due to calling
enable_slave_irq. Do not clear interrupts for enable_slave_irq
when its called from clk stop wakeup.
Change-Id: Ia710030ab80306d6750bea7264f0d4c07053d701
Signed-off-by: Vatsal Bucha <vbucha@codeaurora.org>
Add support to use 4p8MHz DAC rate for receiver over WSA.
Change-Id: Ia0811670326be8131687fbdff70464da063902b2
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
When swr master is in clk stop mode, the value of interrupt_status
is not actual interrupt value. Add check for pm_runtime status to
avoid endless interrupt handler.
Change-Id: I4cd7fe5f01ffdca2a441521088ea39f8804d6b51
Signed-off-by: Meng Wang <mengw@codeaurora.org>
the APSS would suspend within ~120ms after audio off, if system suspend
swrm_suspend() is called before swrm_runtime_suspend. The clock stop
sequence require writing IPC and expect interrupt, which would stop
the APSS to be suspended. Reduce the auto suspend time specifically when
swr event is done can call the swrm_runtime_suspend
Change-Id: Iee0c9143d65e5a8e68a8e20ab73bea9def1920bd
Signed-off-by: Junkai Cai <junkai@codeaurora.org>
Underflow is observed sometimes with CPS spkr prot enabled.
Reduce no of retry count for wsa to 1 so as to optimize delay
between reads on wsa and prevent underflow.
Propagated from the 5.0 branch.
Change-Id: I9b20a242ad4e8375718844c9dfeb0e4996588a19
Signed-off-by: Junkai Cai <junkai@codeaurora.org>
During SSR up event handler, if soundwire state is
already up or auto suspend jiffies is not completed,
ensure put in suspend/SSR state.
Propagated from the 5.0 branch.
Change-Id: I2a8a995399e7844cbc1d6a5676f0d57d97577862
Signed-off-by: Junkai Cai <junkai@codeaurora.org>
At bootup device wakeup enable is called for all masters
causing issue for wsa. This is because wsa
supports interrupts. Thus enable device wakeup
only for tx master.
Propagated this change from previous target.
Change-Id: Iade70defc599952b77b664b752cc55570b4aed27
Signed-off-by: Junkai Cai <junkai@codeaurora.org>
propagated from component audio-drivers.lnx.5.0 with same time.
However, original 5.10 code includes the change functionally already.
Adding check when irq_get_irq_data returns NULL.
Original comments:
Enable interrupt request only when the interrupt is
in disabled state.
Change-Id: Ic5048d2fbddf53bd0e42536677bf5d935f4e0683
Signed-off-by: Junkai Cai <junkai@codeaurora.org>
Add ftrace log to debug NOC issues.
When writing/reading lpass codec registers, add vote_lock
to make sure clk is not disabled.
Change-Id: I1df924d6aefee2899f7e5008851c1c324dabf62a
Signed-off-by: Meng Wang <mengw@codeaurora.org>
In swrm_runtime_resume, when hw vote fails, it still requests
clk and tries to access gfmux which may cause kernel panic.
Update the logic to return when requesting hw vote fails.
Change-Id: I15d2913ae69bf7442ef504b588e0a55917a26071
Signed-off-by: Meng Wang <mengw@codeaurora.org>
0 is invalid slave swrm device_num and it should
avoid config swr frameshape.
Add check for port_id_offset to avoid overflow.
Change-Id: I1eae8936c90bb7b66c27f2ff549eef099c25f011
Signed-off-by: Meng Wang <mengw@codeaurora.org>
Check for fifo availability before writing slave registers
during swrm master bulk write so as to prevent swr
overflow, underflow errors.
Change-Id: I97a914cac289b3f1215ccf5c1abec88b959a9f21
Signed-off-by: Vatsal Bucha <vbucha@codeaurora.org>
runtime_suspend may get from multi functions and reslock is
unlock and lock inbetween which may cause clk count mismatch
with multi rutime_suspend called. Add new lock to make sure
runtime_suspend is run in sequence.
Change-Id: Ie465ded6dc1db1244035e9f4d216466b630df82b
Signed-off-by: Meng Wang <mengw@codeaurora.org>
In soundwire v1p7, CPU1 register bits used from Apps EE.
Update interrupt status and mask bits for CPU1 also to
be included.
Change-Id: Ied86e11756db8609fcd5b81e505f07a4c066c2b8
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
Some soundwire register dump is skipped with current logic.
Update ppos logic to dump all soundwire registers correctly.
Change-Id: Id053e2b71705ca17caf2de2bb85f8c987790099a
Signed-off-by: Meng Wang <mengw@codeaurora.org>
Register SWRM_DP_PORT_CTRL_BANK only has sample interval low.
When disconnecting swr port, only update sampleinterval low for
active port.
Change-Id: I79e52a54c5ff1d08cf320835a8401041a10b8181
Signed-off-by: Meng Wang <mengw@codeaurora.org>
