This pull request brings in the Raspberry Pi 3 DT for its arm64
support. Note that it also merges in the ethernet DT changes so that
the Pi3's ethernet can also get the MAC address.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
The document about rockchip platform make a mistaken in available
compatible name of "rk3288-edp", we should correct it to "rk3288-dp"
which correspond to the compatible name in driver.
This mistaken was introduced in commit be91c36247 ("dt-bindings:
add document for rockchip variant of analogix_dp").
Reported-by: Tomasz Figa <tfiga@chromium.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
For RK3399's GRF module, if we want to operate the graphic related grf
registers, we need to enable the pclk_vio_grf which supply power for VIO
GRF IOs, so it's better to introduce an optional grf clock in driver.
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Tomasz Figa <tomasz.figa@chromium.com>
Qualcomm ARM Based Driver Updates for v4.8
* Rework of SCM driver
* Add file patterns for Qualcomm Maintainers entry
* Add worker for wcnss_ctrl signaling
* Fixes for smp2p
* Update smem_state properties to match documentation
* Add SCM Peripheral Authentication service
* Expose SCM PAS command 10 as a reset controller
* tag 'qcom-drivers-for-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
firmware: qcom: scm: Expose PAS command 10 as reset-controller
firmware: qcom: scm: Peripheral Authentication Service
soc: qcom: Update properties for smem state referencing
soc: qcom: smp2p: Drop io-accessors
soc: qcom: smp2p: Correct addressing of outgoing value
soc: qcom: wcnss_ctrl: Make wcnss_ctrl parent the other components
firmware: qcom: scm: Add support for ARM64 SoCs
firmware: qcom: scm: Convert to streaming DMA APIS
firmware: qcom: scm: Generalize shared error map
firmware: qcom: scm: Use atomic SCM for cold boot
firmware: qcom: scm: Convert SCM to platform driver
MAINTAINERS: Add file patterns for qcom device tree bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
Device tree changes for omaps for v4.8 merge window:
- PWM binding updates and related dts changes
- OCM RAM updates for dra7
- Enable n900 lirc-rx51 driver
- omap3-gta04 updates for backlight, bma180, itg3200, hmc5843 and wifi
- am335x, am437x and am57xx operating point updates and additions
- am335x-icev2 pca9536 node
- dra72-evm regulator updates
- edma spelling fixes
- am335x and am437x ethernet phy update
- a series of mcbsp updates
- omap3-gta04 eeprom
- dra7 PCIe unit address fix
- stdout-path for beaglebone variants
- crypto accelerator nodes for am335x, am437x and dra7
* tag 'omap-for-v4.8/dt-part1-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (42 commits)
ARM: dts: AM43xx: Add node for RNG
ARM: dts: AM43xx: clk: Add RNG clk node
ARM: dts: DRA7: Add DT node for RNG IP
ARM: dts: DRA7: Add support for SHA IP
ARM: dts: DRA7: Add DT nodes for AES IP
ARM: dts: DRA7: Add DT node for DES IP
ARM: dts: am335x-bone-common: use stdout-path in Beaglebone boards.
ARM: dts: DRA7: fix unit address of second PCIe instance
ARM: dts: omap3-gta04: Add RFID eeprom node
ARM: dts: omap4-duovero: Add pdmclk binding for audio
ARM: dts: omap4-var-som-om44: Add pdmclk binding for audio
ARM: dts: omap4-sdp: Add pdmclk binding for audio
ARM: dts: omap4-panda-common: Add pdmclk binding for audio
ARM: dts: omap5-board-common: Add pdmclk binding for audio
ARM: dts: omap3: Add clocks to McBSP nodes
ARM: dts: am335x-bone-common: Mark MAC as having only one PHY
ARM: dts: am437x-idk-evm: Mark MAC as having only one PHY
ARM: dts: Correct misspelling, "emda3" -> "edma3"
ARM: dts: dra72-evm: Rename 3.3V regulator tag
ARM: dts: am335x-icev2: Add DT node for TI PCA9536
...
Signed-off-by: Olof Johansson <olof@lixom.net>
First part of X-Gene DTS changes queued for v4.8
The changes include:
+ 2 clean-up and style-fix patches from Bjorn
+ Correct timer interrupt polarity for X-Gene 2
+ Remove unused qmlclk node on X-Gene 1
* tag 'xgene-dts-for-v4.8-part1' of https://github.com/AppliedMicro/xgene-next:
arm64: dts: apm: Remove unused qmlclk node on X-Gene 1
arm64: dts: apm: Fix timer interrupt polarity for X-Gene 2 SoC
arm64: dts: apm: Remove leading '0x' from unit addresses
arm64: dts: apm: Use lowercase consistently for hex constants
Signed-off-by: Olof Johansson <olof@lixom.net>
SCPI updates and fixes for v4.8
1. Adds support for device power state management using generic power
domains and runtime PM
2. Other minor/miscellaneous fixes to the driver
* tag 'scpi-updates-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
firmware: scpi: add device power domain support using genpd
Documentation: add DT bindings for ARM SCPI power domains
firmware: arm_scpi: add support for device power state management
firmware: arm_scpi: make it depend on MAILBOX instead of ARM_MHU
firmware: arm_scpi: mark scpi_get_sensor_value as static
firmware: arm_scpi: remove dvfs_get packed structure
Signed-off-by: Olof Johansson <olof@lixom.net>
Add supports for 16k (wideband BT) and add a general compatible
string "linux,bt-sco"
Signed-off-by: Garlic Tseng <garlic.tseng@mediatek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
The usb-phy is fully enclosed in the general register files (GRF).
Therefore as seen from the device-tree it shouldn't be a separate
platform-device but instead a sub-device of the GRF - using the
simply-mfd mechanism.
As the usb-phy is part of the kernel for some releases now, we keep
the old (and now deprecated) binding for compatibility purposes.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Device tree binding for new phy-da8xx-usb driver.
Signed-off-by: David Lechner <david@lechnology.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Add the device tree documentation for all the supported parts. Apart the
compatible string and standard I2C binding, no other binding is currently
needed.
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Add the device tree documentation for all the supported parts. Mandatory
binding is the compatible string and the slave I2C address.
Optional properties can be used to specify the Vcc / Vref regulators, as
well as the IRQ line if available.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
The only way for a fixed factor clock to change its rate would be to change
its parent rate.
Since passing blindly CLK_SET_RATE_PARENT might break a lot of platforms
that were relying on the fact that the parent rate wouldn't change,
introduce a compatible-based whitelist that will allow clocks to opt-in
that flag.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Add the device tree binding documentation for Apalis TK1.
Note that this is using dashes aka '-' in compatible strings as
previously suggested by Rob.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add binding documentation for the Tegra ACONNECT bus that is part of the
Audio Processing Engine (APE) on Tegra210. The ACONNECT bus is used to
access devices within the APE subsystem. The APE is located in a
separate power domain and so accesses made to the ACONNECT require the
power domain to be enabled as well as some platform specific clocks.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This may well be the world's most inconsequential patch, but there is a
spelling mistake that needs fixing and Andrea was bored enough to write
the patch (along with 1528 others...).
Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net>
Signed-off-by: Will Deacon <will.deacon@arm.com>
The DT bindings example for the Tegra XUSB controller omits the 'lanes'
subnode in the XUSB pad controller which is required according to the DT
bindings documentation for the Tegra XUSB pad controller[0]. In addition
to this the phy-names with the suffix 'utmi' are also not valid and
should have the suffix 'usb2'. Correct both the XUSB pad controller pad
path and phy-names for the XUSB example.
[0]: Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The DT bindings document for the Tegra XUSB pad controller states that
'utmi' is one of the valid choices for the Tegra210 PHY node names and
has child lanes named, 'utmi-0', 'utmi-1', 'utmi-2' and 'utmi-3'.
However, neither the XUSB pad controller PHY driver or the actual
Tegra210 bindings for the XUSB pad controller use these names. Instead
both the driver and binding use the node name 'usb2' and for the child
lanes use the names 'usb2-0', 'usb2-1', 'usb2-2' and 'usb2-3'. Given
that the driver and binding are consistent with the naming, update the
DT bindings documentation to match.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
On Tegra124, Tegra132 and Tegra210 devices the pads used by the Display
Port Auxiliary (DPAUX) channel are multiplexed such that they can also
be used by one of the internal I2C controllers. Note that this is
different from I2C-over-AUX supported by the DPAUX controller. The
register that configures these pads is part of the DPAUX controllers
register set and so a pinctrl driver is being added for the DPAUX device
to share these pads. Add the device-tree binding documentation for the
DPAUX pad controller.
Although there is only one group of pads associated with the DPAUX that
can be multiplexed, the group still needs to be described by the binding.
If the 'groups' property is not present in the binding, then the pads
will not be allocated by the pinctrl core for a client and this would
allow another client to re-configure the same pads that may already be
in-use.
Please note that although the "off" function for the DPAUX pads is not
technically a pin-mux setting but more of a pin-conf setting it is
simpler to expose these as a function so that the user can simply select
either "aux", "i2c" or "off" as the current function/mode.
Update the main DPAUX binding documentation to reference the DPAUX pad
controller binding document and add the 'i2c-bus' subnode. The 'i2c-bus'
subnode is used for populating I2C slaves for the DPAUX device so that
the I2C driver core does not attempt to add the DPAUX pad controller
nodes as I2C slaves.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Update the DPAUX compatibility string information for Tegra124, Tegra132
and Tegra210.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Several cases of overlapping changes, except the packet scheduler
conflicts which deal with the addition of the free list parameter
to qdisc_enqueue().
Signed-off-by: David S. Miller <davem@davemloft.net>
The I2C driver core for boards using device-tree assumes any subnode of
an I2C adapter in the device-tree blob is an I2C slave device. Although
this makes complete sense, some I2C adapters may have subnodes which
are not I2C slaves but subnodes presenting other features. For example
some Tegra devices have an I2C interface which may share its pins with
other devices. In order to share these pins using the pinctrl framework,
it is necessary to add subnodes to the I2C device node that represent
these pins.
To allow I2C adapters to have non-I2C specific subnodes in device-tree
that are not parsed by the I2C driver core, add support for an optional
'i2c-bus' subnode where I2C slaves can be placed. If the 'i2c-bus'
subnode is present then all I2C slaves must be placed under this
subnode.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Wolfram Sang <wsa@the-dreams.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
With the upcoming removal of legacy boot, lets add support to one of the
last N900 drivers remaining without it. As the driver still uses omap
dmtimer, add auxdata as well.
Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Pali Rohár <pali.rohar@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
OMAP GP timers can have different input clocks that allow different PWM
frequencies. However, there is no other way of setting the clock source but
through clocks or clock-names properties of the timer itself. This limits
PWM functionality to only the frequencies allowed by the particular clock
source. Allowing setting the clock source by PWM rather than by timer
allows different PWMs to have different ranges by not hard-wiring the clock
source to the timer.
Signed-off-by: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Pali Rohár <pali.rohar@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Jonathan writes:
Second round of new iio device support, features and cleanups in the 4.8 cycle
Firstly some contact detail updates:
* NXP took over freescale. Update the mma8452 header to reflect this.
* Martin Kepplinger email address change in mma8452 header.
* Adriana Reus has changed email address. Update .mailmap.
* Matt Ranostay has changed email address. Update .mailmap.
New Device Support
* max1363
- add the missing i2c_device_ids for a couple of parts so they can actually
be used.
* ms5867
- add device ids for ms5805 and ms5837 parts.
New Features
* ad5755
- DT support. This one was a bit controversial and under review for a long
time. Still no one could come up with a better solution.
* stx104
- add gpio support
* ti-adc081c
- Add ACPI device ID matching.
Core changes
* Refuse to register triggers with duplicate names. There is no way to
distinguish between them so this makes no sense. A few drivers do not
generate unique names for each instance of the device present. We can't
fix this without changing ABI so leave them and wait for someone to
actually take the rare step of two identical accelerometers on the same
board.
* buffer-dma
- use ARRAY_SIZE in a few appropriate locations.
Tools
* Fix the fact that the --trigger-num option in generic_buffer didn't allow
0 which is perfectly valid in the ABI.
Cleanups
* as3935
- improve error reporting.
- remove redundant zeroing of a field in iio_priv.
* gp2ap020a00f
- use the iio_device_claim_*_mode helpers rather than open coding locking
around mode changes.
* isl29125
- use the iio_device_claim_*_mode helpers rather than open coding locking.
* lidar
- use the iio_device_claim_*_mode helpers rather than open coding locking.
* mma8452
- more detail in devices supported description in comments (addresses and
similar)
* sca3000
- add a missing error check.
* tcs3414
- use the iio_device_claim_*_mode helpers rather than open coding locking.
* tcs3472
- use the iio_device_claim_*_mode helpers rather than open coding locking.
When the CS line is not connected, it is not needed to enable or
disable the chip selection functionality from the s3c64xx
devices in order to perform a transfer.
Set the CS controller logically always enabled already during
initialization (by writing '0' in the S3C64XX_SPI_SLAVE_SEL
register) and never disable it.
Signed-off-by: Andi Shyti <andi.shyti@samsung.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Add TI syscon reset controller binding. This will hook to the reset
framework and use syscon/regmap to set reset bits. This allows reset
control of individual SoC subsytems and devices with memory-mapped
reset registers in a common register memory space.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Add compatible for media reset controller.
Actually, there are two reset controllers in hi6220 SoC:
The peripheral reset controller bits are part of sysctrl registers.
The media reset controller bits are part of mediactrl registers.
So for the compatible part, it should contain "syscon" for both peripheral
and media reset controller.
Signed-off-by: Xinliang Liu <xinliang.liu@linaro.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
This patch adds DT bindings documentation for Maxim MAX98504
speaker amplifier.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
On some boards, like omap5-uevm the MCLK is gated by default and in order
to be able to use the High performance modes of twl6040 it need to be
enabled by SW.
Add support for handling the MCLK source clock via CCF.
At the same time lower the print priority of the notification that the 32K
clock is not provided and it is not going to be handled by the driver.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
The Ricoh RN5T567 is from the same family as the Ricoh RN5T618 is,
the differences are:
+ DCDC4
+ Slightly different output voltage/currents
+ 32kHz Output
- ADC/Charger capabilities
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
The LP8556 datasheet describes an EN/VDDIO input, which serves "both as
a chip enable and as a power supply reference for PWM, SDA, and SCL
inputs." The LP8556 that I'm testing doesn't respond properly if I try
to talk I2C to it too quickly after enabling VDDIO, and the LP8555
datasheet mentions a t_RESPONSE delay of up to 1 millisecond.
Support this EN/VDDIO by adding a regulator property to the binding;
enabling this regulator at probe time; and sleeping for 1 to 2ms, if the
EN/VDDIO regulator was provided.
Signed-off-by: Brian Norris <briannorris@chromium.org>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Milo Kim <milo.kim@ti.com>
Reviewed-by: Stephen Barber <smbarber@chromium.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
The msm8974 pinctrl variant has a couple USB HSIC "glue"
registers that let us mux between the pinctrl register settings
or the HSIC core settings for the HSIC pins (gpio 144 and gpio
145). Support this method of operation by adding hsic_data and
hsic_strobe pins that can select between hsic_ctl and gpio
functions. This allows us to toggle the hsic pin configuration
over to the HSIC core at runtime.
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
