This pull request contains Device Tree changes for Broadcom ARM64-based SoCS:
- Anup adds nodes for the AHCI and SATA3 PHY peripherals to the Northstar2 SoCs
- Dhanajay enables pinctrl for the Northstar2 SoCs
- Jon Mason enables all of the UART peripherals found in the NS2 SVK and
finally adds the CCI-400 and PMU nodes
* tag 'arm-soc/for-4.8/devicetree-arm64' of http://github.com/Broadcom/stblinux:
arm64: dts: NS2: Add CCI-400 PMU support
arm64: dts: NS2: Add all of the UARTs
arm64: dts: Enable GPIO for Broadcom NS2 SoC
arm64: dts: enable pinctrl for Broadcom NS2 SoC
arm64: dts: Add SATA3 AHCI and SATA3 PHY DT nodes for NS2
dt-bindings: ata: add compatible string for iProc AHCI controller
Signed-off-by: Olof Johansson <olof@lixom.net>
This pull request contains Device Tree changes for Broadcom ARM-based SoCs:
- Chris provides documentation and DTS fixes for the bcm11351 CPU enable-method in preparation
for adding support for the BCM23550 SoC and its corresponding documentation, SoC dtsi
and the Sparrow board DTS file
- Jon adds MSI support to the PCI nodes, updates the secondary cores boot address for the B0
production revision of the Northstar Plus SoC, adds a DTS for the BCM958625HR board, another
one for the BCM958525XMC board, and finally adds the PL330 DMA controller to the NSP DTS
- Rafal enables the SPI NOR flash on dual flash systems (NAND + SPI) on the BCM5301x SoCs
and devices
- Florian adds support for the BCM5301x built-in Ethernet switch by adding nodes for the
Gigabit MAC controllers and the Switch Register Access block, and finally updates the
SmartRG SR-400AC board with its switch port layout
* tag 'arm-soc/for-4.8/devicetree' of http://github.com/Broadcom/stblinux:
ARM: dts: BCM5310x: Enable switch ports on SmartRG SR400AC
ARM: dts: BCM5301X: Add SRAB interrupts
ARM: dts: Enable SRAB switch and GMACs on 5301x DTS
ARM: dts: NSP: Add PL330 support
ARM: dts: NSP: Add XMC board support
ARM: dts: bcm23550: Add device tree files
Documentation: devicetree: Document BCM23550 bindings
ARM: BCM5301X: Enable SPI-NOR on dual flash devices
ARM: dts: NSP: Add new DT file for bcm958625hr
ARM: dts: NSP: modify second CPU address
ARM: dts: NSP: Add MSI support on PCI
ARM: BCM: modify Broadcom CPU enable method
ARM: dts: fix use of bcm11351 enable method
Documentation: Binding docs for bcm11351 enable method
Signed-off-by: Olof Johansson <olof@lixom.net>
Topic branch for Exynos MFC changes for v4.8:
Pull s5p-mfc changes from media tree so the arm/mach-exynos code
could be removed. The bindings are converted to generic reserved memory
bindings.
* tag 'samsung-drivers-exynos-mfc-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Enable MFC device on Exynos4412 Odroid boards
ARM: dts: exynos: Convert MFC device to generic reserved memory bindings
ARM: EXYNOS: Remove code for MFC custom reserved memory handling
media: s5p-mfc: add iommu support
media: s5p-mfc: replace custom reserved memory handling code with generic one
media: s5p-mfc: use generic reserved memory bindings
of: reserved_mem: add support for using more than one region for given device
media: set proper max seg size for devices on Exynos SoCs
media: vb2-dma-contig: add helper for setting dma max seg size
s5p-mfc: Fix race between s5p_mfc_probe() and s5p_mfc_open()
s5p-mfc: Add release callback for memory region devs
s5p-mfc: Set device name for reserved memory region devs
Signed-off-by: Olof Johansson <olof@lixom.net>
Marc Kleine-Budde says:
====================
pull-request: can-next 2016-06-17
this is a pull request of 14 patches for net-next/master.
Geert Uytterhoeven contributes a patch that adds a file patterns for
CAN device tree bindings to MAINTAINERS. A patch by Alexander Aring
fixes warnings when building without proc support. A patch by me
improves the sample point calculation. Marek Vasut's patch converts
the slcan driver to use CAN_MTU. A patch by William Breathitt Gray
converts the tscan1 driver to use module_isa_driver.
Two patches by Maximilian Schneider for the gs_usb driver fix coding
style and add support for set_phys_id callback. 5 patches by Oliver
Hartkopp add support for CANFD to the bcm. And finally two patches
by Ramesh Shanmugasundaram, which add support for the rcar_canfd
driver.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
There is no reason to hold s/w dependent parameter in device tree.
Even more, there is no reason in this parameter because davinici_cpdma
driver splits pool of descriptors equally between tx and rx channels
anyway.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
This patch adds support for the CAN FD controller found in Renesas R-Car
SoCs. The controller operates in CAN FD only mode by default.
CAN FD mode supports both Classical CAN & CAN FD frame formats. The
controller supports ISO 11898-1:2015 CAN FD format only.
This controller supports two channels and the driver can enable either
or both of the channels.
Driver uses Rx FIFOs (one per channel) for reception & Common FIFOs (one
per channel) for transmission. Rx filter rules are configured to the
minimum (one per channel) and it accepts Standard, Extended, Data &
Remote Frame combinations.
Note: There are few documentation errors in R-Car Gen3 Hardware User
Manual v0.5E with respect to CAN FD controller. They are listed below:
1. CAN FD interrupt numbers 29 & 30 are listed as per channel
interrupts. However, they are common to both channels (i.e.) they are
global and channel interrupts respectively.
2. CANFD clock is derived from PLL1. This is not documented.
3. CANFD clock is further divided by (1/2) within the CAN FD controller.
This is not documented.
4. The minimum value of NTSEG1 in RSCFDnCFDCmNCFG register is 2 Tq. It
is specified 4 Tq in the manual.
5. The maximum number of message RAM area the controller can use is 3584
bytes. It is specified 10752 bytes in the manual.
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
On some platforms the VSP performs memory accesses through an FCP. When
that's the case get a reference to the FCP from the VSP DT node and
enable/disable it at runtime as needed.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
The FCP is a companion module of video processing modules in the Renesas
R-Car Gen3 SoCs. It provides data compression and decompression, data
caching, and conversion of AXI transactions in order to reduce the
memory bandwidth.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Sebastian pointed out that .../bindings/reset is usually used for
peripheral reset controllers, whereas .../bindings/power/reset is
used for Board/System reset controllers.
Reported-by: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Chris Brand <chris.brand@broadcom.com>
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Add an optional ddc-i2c-bus phandle property that points to
an I2C master controller that handles the connector DDC pins.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Add 'dma-coherent' description for PCI nodes.
The 'dma-coherent' indicates that the hardware IP block can ensure
the coherency of the data transferred from/to the IP block. This
can avoid the software cache flush/invalid actions, and improve
the performance significantly.
The PCI IP block of ls1043a has this capability, so adding
this feature to improve the PCI performance.
Signed-off-by: Liu Gang <Gang.Liu@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Document the Blanche device tree bindings, listing it as a supported board.
This allows to use checkpatch.pl to validate .dts files referring to the
Blanche board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add device tree binding documentation details for Cirrus Logic
CS8900/CS8920 ethernet chip.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
The devices from the ADAU17X1 family all have a MCLK clock input which
supplies the master clock for the device. The master clock is used as the
input clock for the PLL. Currently the MCLK rate as well as the desired PLL
output frequency need to be supplied by calling snd_soc_dai_set_pll() form
a machine driver.
Add support for specifying the MCLK using the common clock framework. In
addition to that also automatically configure the PLL to a suitable rate
if the master clock was provided using the CCW. This allows to use the
CODEC driver without any special configuration requirements from the
machine driver.
While the PLL output frequency can be configured over a (more or less)
continuous range the narrowness of the range and the other constraints of
the clocking tree usually only result in two output frequencies that will
actually be chosen. One for 44.1kHz based rates and one for 48kHz based
rates, these are the rates that the automatic PLL configuration will use.
For the rare case where a non-standard setup is required a machine driver
can disable the auto-configuration and configure a custom frequency using
the existing mechanisms.
If the common clock framework is not enabled clk_get() will return NULL and
the driver will function as before and the clock rate needs to be
configured manually.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
ramoops is one of the remaining places where ARM vendors still rely on
board-specific shims. Device Tree lets us replace those shims with
generic code.
These bindings mirror the ramoops module parameters, with two small
differences:
(1) dump_oops becomes an optional "no-dump-oops" property, since ramoops
sets dump_oops=1 by default.
(2) mem_type=1 becomes the more self-explanatory "unbuffered" property.
Signed-off-by: Greg Hackmann <ghackmann@google.com>
[fixed platform_get_drvdata() crash, thanks to Brian Norris]
[switched from u64 to u32 to simplify code, various whitespace fixes]
[use dev_of_node() to gain code-elimination for CONFIG_OF=n]
Signed-off-by: Kees Cook <keescook@chromium.org>
Reset controller changes for v4.8, part 2
- add Amlogic Meson SoC Reset Controller driver
* tag 'reset-for-4.8-2' of git://git.pengutronix.de/git/pza/linux:
dt-bindings: reset: Add bindings for the Meson SoC Reset Controller
reset: Add support for the Amlogic Meson SoC Reset Controller
Signed-off-by: Olof Johansson <olof@lixom.net>
Drivers for 4.8:
- Add a driver for the EBI
* tag 'at91-ab-4.8-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
memory: atmel-ebi: add DT bindings documentation
memory: add Atmel EBI (External Bus Interface) driver
Signed-off-by: Olof Johansson <olof@lixom.net>
Topic branch for adding Exynos 5410 Odroid XU board for v4.8.
This brings support for Hardkernel's Odroid XU board. It was the first
design with big.LITTLE SoC from Samsung: Exynos5410. The board is not
very popular. Newer XU3 and XU4 got more attention.
Board details:
1. Exynos5410 octa-core (A15+A7, however as of now only one cluster is
enabled),
2. 2 GB DDR3 RAM,
3. PowerVR SGX544MP3 GPU (not enabled in DTS),
4. USB 3.0 Host x 1, USB 3.0 OTG x 1, USB 2.0 Host x 4,
5. HDMI 1.4a, MIPI DSI and Display Port (Display Port not on all of
revisions though),
6. eMMC 4.5 and microSD slots.
* tag 'samsung-dt-odroid-xu-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (28 commits)
ARM: dts: exynos: Add watchdog and Security SubSystem to Exynos5410
ARM: dts: exynos: Configure PWM, usb3503, PMIC and thermal on Odroid XU board
ARM: dts: exynos: Add Thermal Management Unit to Exynos5410
ARM: dts: exynos: Interrupt for USB DWC3-1 differs between Exynos5420 and 5410
dt-bindings: clock: Add watchdog and SSS clock IDs to Exynos5410
dt-bindings: clock: Add TMU clock ID to Exynos5410
ARM: dts: exynos: Add RTC and I2C to Exynos5410
ARM: dts: exynos: Add I2C, PWM and UART pinctrl to Exynos5410
ARM: dts: exynos: Move HSI2C nodes to exynos54xx.dtsi
ARM: dts: exynos: Add initial support for Odroid XU board
ARM: dts: exynos: Add USB to Exynos5410
ARM: dts: exynos: Move common Exynos5410/542x/5800 nodes to new DTSI
ARM: dts: exynos: MCT is not an interrupt controller and extend length of iomap
ARM: dts: exynos: Enable UART3 on Exynos5410
ARM: dts: exynos: Include common exynos5 in exynos5410.dtsi
ARM: dts: exynos: Move Exynos5250 and Exynos5420 nodes under soc
ARM: dts: exynos: Use phandle to get parent node in exynos5250-snow
ARM: dts: exynos: Prepare for inclusion of exynos5.dtsi in exynos5410.dtsi
ARM: dts: exynos: Move common nodes to exynos5.dtsi
ARM: dts: exynos: Split Odroid XU3 LEDs to separate DTSI
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Some I2C devices have multiple addresses assigned, for example each address
corresponding to a different internal register map page of the device.
So far drivers which need support for this have handled this with a driver
specific and non-generic implementation, e.g. passing the additional address
via platform data.
This patch provides a new helper function called i2c_new_secondary_device()
which is intended to provide a generic way to get the secondary address
as well as instantiate a struct i2c_client for the secondary address.
The function expects a pointer to the primary i2c_client, a name
for the secondary address and an optional default address. The name is used
as a handle to specify which secondary address to get.
The default address is used as a fallback in case no secondary address
was explicitly specified. In case no secondary address and no default
address were specified the function returns NULL.
For now the function only supports look-up of the secondary address
from devicetree, but it can be extended in the future
to for example support board files and/or ACPI.
Signed-off-by: Jean-Michel Hautbois <jean-michel.hautbois@veo-labs.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
The Tegra AGIC interrupt controller is compatible with the ARM GIC-400
interrupt controller. Add the compatible string and clock information
for the AGIC to the GIC device-tree binding documentation.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Add the device tree binding documentation for Mediatek HDMI,
HDMI PHY and HDMI DDC devices.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
The i.MX6 Q/DL has an erratum (ERR006687) that prevents the FEC from
waking the CPUs when they are in wait(unclocked) state. As the hardware
workaround isn't applicable to all boards, disable the deeper idle state
when the workaround isn't present and the FEC is in use.
This allows to safely run a kernel with CPUidle enabled on all i.MX6
boards.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: David S. Miller <davem@davemloft.net> (for network changes)
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Pull i2c fixes from Wolfram Sang:
- a bigger fix for i801 to finally be able to be loaded on some
machines again
- smaller driver fixes
- documentation update because of a renamed file
* 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
i2c: mux: reg: Provide of_match_table
i2c: mux: refer to i2c-mux.txt
i2c: octeon: Avoid printk after too long SMBUS message
i2c: octeon: Missing AAK flag in case of I2C_M_RECV_LEN
i2c: i801: Allow ACPI SystemIO OpRegion to conflict with PCI BAR
Pull DeviceTree fixes from Rob Herring:
- fix unflatten_dt_nodes when dad parameter is set.
- add vendor prefixes for TechNexion and UniWest
- documentation fix for Marvell BT
- OF IRQ kerneldoc fixes
- restrict CMA alignment adjustments to non dma-coherent
- a couple of warning fixes in reserved-memory code
- DT maintainers updates
* tag 'devicetree-fixes-for-4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
drivers: of: add definition of early_init_dt_alloc_reserved_memory_arch
drivers/of: Fix depth for sub-tree blob in unflatten_dt_nodes()
drivers: of: Fix of_pci.h header guard
dt-bindings: Add vendor prefix for TechNexion
of: add vendor prefix for UniWest
dt: bindings: fix documentation for MARVELL's bt-sd8xxx wireless device
of: add missing const for of_parse_phandle_with_args() in !CONFIG_OF
of: silence warnings due to max() usage
drivers: of: of_reserved_mem: fixup the CMA alignment not to affect dma-coherent
of: irq: fix of_irq_get[_byname]() kernel-doc
MAINTAINERS: DeviceTree maintainer updates
Add the Device Tree binding documentation that allows to describe the PCIe
controller found in the Axis ARTPEC-6 SoC.
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rob Herring <robh@kernel.org>
Change "mdio-parent-bus" from mandatory section to optional
as it won't be required by integrated MDIO multiplexer
which has bus selection and mdio transaction generation logic,
integrated inside.
Signed-off-by: Pramod Kumar <pramod.kumar@broadcom.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Conflicts:
net/sched/act_police.c
net/sched/sch_drr.c
net/sched/sch_hfsc.c
net/sched/sch_prio.c
net/sched/sch_red.c
net/sched/sch_tbf.c
In net-next the drop methods of the packet schedulers got removed, so
the bug fixes to them in 'net' are irrelevant.
A packet action unload crash fix conflicts with the addition of the
new firstuse timestamp.
Signed-off-by: David S. Miller <davem@davemloft.net>
Add PWMSS device tree nodes for DRA7 SoC family and add documentation
for dt bindings.
Signed-off-by: Vignesh R <vigneshr@ti.com>
[fcooper@ti.com: Add eCAP and use updated bindings for PWMSS and ePWM]
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>