Mohit Khanna b4429e8278 qcacmn: Add delayed register write support in HAL
In case the bus is in low power mode, the register writes (followed by a
memory barrier) may take a long time (~4ms). This can cause the caller
to block till the PCIe write is completed. Thus, even though PCI
writes are posted, it can still block the caller.

Hence, in case the bus is in low power mode (not in M0), or not in high
throughput scenarios, queue the register write in a workqueue. The
register write will happen in the delayed work context. In other cases,
i.e ,when the bus is not in low power mode or in high thoughput
scenarios, do the register writes in caller context.

Change-Id: Idf218e4581545bc6ac67b91d0f70d495387ca90e
CRs-Fixed: 2602029
2020-03-09 20:58:23 -07:00
2020-02-13 04:12:30 -08:00
2020-03-05 05:38:38 -08:00
2017-09-15 21:45:35 +05:30
2017-03-27 08:31:31 -07:00

 This is CNSS WLAN Host Driver for products starting from iHelium  
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