ad4b936b50007a2883c5863cfda8727dd4969dc0

When display is left on from the bootloader, disp_cc driver will put a proxy vote on clocks to maintain the hardware configuration of bootloader. Once all the consumers have been probed, the dispcc driver will synchronize the hardware state of the device to match the aggregated software state requested by all the consumers using sync_state call. If there is an idle power collapse or a suspend before sync state call, branch clocks and in turn RCG will not get turned off during clocks disable sequence because of the proxy vote of disp_cc driver. This can be the case even if there is a vote from any other disp_cc consumers. During a subsequent call to enable the clocks from DSI driver, we are currently switching RCG parent to PLL and then turning on the PLL. If the sync state call doesn't happen before we enable the clocks back, we'll be setting PLL which is off as a parent to RCG that is on. But ideally when RCG is on, both the old and new sources should be on while switching the RCG parent. Avoid this by turning on the PLL before switching RCG parent during clock enable sequence. Change-Id: I1597cf2c8095957cd2b2a20a72bf7199e0d61809 Signed-off-by: Srihitha Tangudu <quic_tangudu@quicinc.com>
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