This change is needed for domain id feature support.
When a PHY and its lanes for a particular CSID are
protected in a secure session, the same for other
unused CSIDs are to be protected as well. This is
to prevent other CSIDs from tapping the data streaming
onto those lanes if they share the same PHY.
For this, the clocks for other CSIDs (eg CSID-Lite)
need to be turned on. Given that the existing driver
turns on the clocks for the CSID in use, and that
this clock information is embedded within the CSID
hw blocks, these clocks are now exposed as optional
clocks to CPAS to enable the PHY driver to turn them
on during streamon for secure session.
CRs-Fixed: 3304650
Change-Id: I1415e78467208b6b4a74223521d964a199288857
Signed-off-by: Li Sha Lim <quic_lishlim@quicinc.com>
Create OFE HW layer which contains device, soc, and core files.
Device file provides the prob functionality and OFE dev interface
to ICP HW MGR. Core file provides HW related functionalities such
as PC, reset, init/deinit hw, etc. Soc file provides intermediate
functions to utilize camera soc APIs such as DT parsing, Clock
update, etc.
Modify Kbuild to include compilation of the source files. Update
camera main file to invoke ofe init module function during camera
module init. Update camera main header file to allow CRM to match
OFE driver for component bind.
Update OFE HW register addresses such as power status/power ctrl,
reset, irq, etc.
CRs-Fixed: 3266673
Change-Id: I97efe095801b1b42e9de07aeba6f26112cb8f92b
Signed-off-by: Sokchetra Eung <quic_eung@quicinc.com>
This change adds domain-id support for new
targets. This change involves adding information
to the SCM call currently in use such that it is
a superset, and the additional fields needed are
the IFE and CDM number being used, and VC mask.
These are in addition to existing PHY mask selection,
and lane/trio mask selection.
All the information above will be sent over from CSID
to the PHY driver, and the PHY driver will pack the
information in a generic format before sending it
over in an SCM call. Where previously, this information
is packed in format that matches the register, this
will be sent generically moving forward.
Given that there are multiple instances per physical
PHY hardware, and that the usual dev_handle used by
userspace to identify them are not accessible CSID
side, the lane_assign/lane_cfg parameter is used to find
the specific PHY instance used in conjunction with the
CSID instance in a session. lane_assign from PHY driver
and lane_cfg from CSID have the same values.
CRs-Fixed: 3259706
Change-Id: Ie050b1b9e742c6a63812eb38db7eca76db24667f
Signed-off-by: Li Sha Lim <quic_lishlim@quicinc.com>
Add error handling and information logging for drv error and
info irqs for drv. Also, add debugfs for vote up and down irqs.
Add ddr and mnoc register value logging in vote up and down
irq bottom half.
CRs-Fixed: 3065551
Change-Id: I5332658924762a528625e628c3fa5d5dec07da62
Signed-off-by: Mukund Madhusudan Atre <quic_matre@quicinc.com>
Add support for bw update version 3. Add provision to
maintain cpas per path bw info internally in drivers.
CRs-Fixed: 3065551
Change-Id: I65e97c6e41f933818f1211bbc27651842e93c028
Signed-off-by: Mukund Madhusudan Atre <quic_matre@quicinc.com>
Enable camnoc slave error irq to identify address decode
errors. Also change the camnoc irq clear logic. The change
also avoids dumping error logger info. Also remove
any error logging in client callbacks for slave error
if the client intends to not handle it.
CRs-Fixed: 3175797
Change-Id: Iec2c0c3b50a52a4c61ce2d5f6f263327625a8267
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
For Kalama, Low level cache controller can be used
for Long exposures as well. To support this, cache
can be shared among SFEs and a single SFE needs to
toggle between the cache IDs to keep the caches
clean.
This commit adds changes to support above requirements.
Change-Id: I9dadf4655db946254be62116b45e81abdb979b3f
CRs-Fixed: 3153295
Signed-off-by: Gaurav Jindal <quic_gjindal@quicinc.com>
Parrot has different version of CPAS which requires
camnoc interface changes and CPAS version change.
This change adds the same.
CRs-Fixed: 3081144
Change-Id: Icf39e12d3af8518471b093c860888df05af279b7
Signed-off-by: Alok Pandey <akumarpa@codeaurora.org>
Cape has different version of CPAS version which
requires camnoc interface changes and CPAS version
change. This change adds the same.
CRs-Fixed: 3063982
Change-Id: Iaca2f12954cc12224da6c8cdb2ee76f2b14aca0b
Signed-off-by: Alok Chauhan <quic_alokc@quicinc.com>
Diwali has different version of CPAS version which
requires camnoc interface changes and CPAS version
change. This change adds the same.
CRs-Fixed: 3043114
Change-Id: I698b251c43d34225053ab3a0e9c581201d6be638
Signed-off-by: Ayush Kumar <ayushkr@codeaurora.org>
Currently, camnoc buffer fill level register offsets are part
of cpas monitoring. Register offsets keep changing between
targets which would bring more conditionals. Make cpas monitoring
generic by moving register offsets to header. Also, the reg values
will be read in a buffer, and it can be controlled what offset
needs to be read, by changing status in header to be enable/disable.
Also, move camnoc fill level printing to CPAS for when we need only
buffer fill info.
CRs-Fixed: 2841729
Change-Id: I05425b4466d33dbef80eb8a0a1b5e974a6965600
Signed-off-by: Mukund Madhusudan Atre <matre@codeaurora.org>
Use mmrm interface to set clock rate on all
camera clks.
CRs-Fixed: 2901925
Change-Id: I2e4c31a11e0e068693ac15356e3b3dafcfa0b078
Signed-off-by: Pavan Kumar Chilamkurthi <pchilamk@codeaurora.org>
Add support for using system cache for SFE WMs and RMs
in case of sHDR use-cases for power saving. Also add
debugfs capability to control this feature.
CRs-Fixed: 2841729
Change-Id: Ic4dad50e8c396705b33bb0bc8330d25e51ca79a2
Signed-off-by: Karthik Anantha Ram <kartanan@codeaurora.org>
This change add titan hw version checks in csid, vfe and icp
camera drivers for Yupik camera.
CRs-Fixed: 2825675
Change-Id: Ibb704efa5eae327fc7c376328ceafc45a8217f44
Signed-off-by: Ayush Kumar <ayushkr@codeaurora.org>
Add register information. Initial QoS settings info to program
camera static settings for chipsets having camera V165_100.
CRs-Fixed: 2825675
Change-Id: I433cfbe50705f09b961770371a3d3f29ff5f348c
Signed-off-by: Ayush Kumar <ayushkr@codeaurora.org>
Add register info, initial QoS settings info to program
camera static settings for chipsets having camera v680.
CRs-fixed: 2792910
Change-Id: I8f054a8466035b8388ea84f3a50f562838611990
Signed-off-by: Mukund Madhusudan Atre <matre@codeaurora.org>
Signed-off-by: Jigar Agrawal <jigar@codeaurora.org>
If MP limit fuse feature is enabled in DTSI then
read the fuse register to get information about maximum
allowed resolution. According to that restrict CSID acquire.
Also if only DTSI based max_width is enabled then restrict acquire
with maximum allowed width.
CRs-Fixed: 2785460
Depends-on: 3349044
Change-Id: If861289aebe2921183276780a086dfa1b1d5f372
Signed-off-by: Wyes Karny <wkarny@codeaurora.org>
Enhance cpas state dump to get more information about
bandwidth and clock status. This additional state dump
can be enabled using debugfs.
adb shell "echo 1 > /sys/kernel/debug/camera_cpas/full_state_dump"
Traverse through all bw tree nodes and print info in each node.
Print current clk frequencies of all clocks that cpas enables.
Read rpmh bcm status registers to understand mmnoc clk freq.
Add cpas monitor to save important info whenever clients
notify with an event. This monitor info is printed in cpas
state dump.
CRs-Fixed: 2754299
Change-Id: Ib9007091f7e34127f1ca92498e2537b2a06887cb
Signed-off-by: Pavan Kumar Chilamkurthi <pchilamk@codeaurora.org>
This change extract the fuse info from DTSI and reads the fuse
value then communicate the same to user space using query_cpas_v2
ioctl.
CRs-Fixed: 2749665
Change-Id: Ie161dc58a7eab3e7b74a5c406ab696af0e7b546e
Signed-off-by: Vikram Sharma <vikramsa@codeaurora.org>
Add register information. Initial QoS settings info to program
camera static settings for chipsets having camera V570_200.
CRs-Fixed: 2707213
Change-Id: Ic9af3c4ff1cc69c6b70e1489e4634afe7b71390a
Signed-off-by: Chandan Kumar Jha <cjha@codeaurora.org>
Add cpas interface to allow clients or usecase to select
different QoS settings based on requirement. Selection
API must be called before camera hw powers up.
CRs-Fixed: 2687917
Change-Id: Ie524fcd6131d7c42288d0d734a7cdf6b9fcb92b7
Signed-off-by: Pavan Kumar Chilamkurthi <pchilamk@codeaurora.org>
Holi has different version of camnoc and CPAS version
which requires separate register space and camnoc
interface changes and CPAS version change.
This change adds the same.
CRs-Fixed: 2701462
Change-Id: I9fbfab592278ba7804809872b4b4b235895477f2
Signed-off-by: Suresh Vankadara <svankada@codeaurora.org>
msm: camera: tfe: Fix variable initialization issues
msm: camera: isp: Dual tfe event check with proper hw idx
msm: camera: smmu: Add support for non-contiguous mermory region
msm: camera: smmu: Use iommu best match algo for camera
msm: camera: ope: Optimize allocation of IO configuration
msm: camera: ope: Fix for KW Issues
msm: camera: ope: Add support for stripe level height configuration
msm: camera: tfe: Enable the delay line clc
msm: camera: ope: Fix false alarm for OPE HW timeout
msm: camera: tfe: Support register dump per request
msm: camera: ope: Increase max number of stripes
msm: camera: ope: Change packer and unpacker format in case NV12
msm: camera: tfe: Add packet code get command for tfe
msm: camera: ope: Trigger recovery in case of violation on write bus
msm: camera: ope: Protect ope hw reset with mutex
msm: camera: ope: Add a check for valid request in cdm callback
msm: camera: ope: Remove the BW & clock vote in release context
msm: camera: ope: Reduce OPE BUS memory
msm: camera: ope: Fix return value for ope acquire
msm: camera: ope: Fix false alarm for OPE request timeout
msm: camera: ope: Avoid deadlock during recovery after HW hang
msm: camera: tfe: tfe debug enhancement
msm: camera: cdm: Fix irq_data value in case of inline irq
msm: camera: flash: Switch off flash on provider crash
msm: camera: ope: Initialize ope hw mutex structure
msm: camera: cdm: Flush all available FIFOs during reset
msm: camera: cpas: Add mandatory bw option for axi ports clocks
msm: camera: ope: Use vzalloc to allocate the write bus ctx structure
msm: camera: ope: Fix handling of init hw failure
msm: camera: tfe: Enable per frame register dump for rdi only context
msm: camera: cdm: Protect cdm core status bits with mutex
msm: camera: cdm: correct the error check in cmd submit irq
msm: camera: ope: Fix unclock access during HW reset
msm: camera: ope: Program frame level settings after idle event
msm: camera: ope: Delay releasing of resources for last context
msm: camera: isp: Increase default SOF freeze timeout
msm: camera: smmu: Add map and unmap monitor
msm: camera: isp: Add trace events across ISP
msm: camera: smmu: Profile time taken for map, unmap
msm: camera: ope: Start context timer on receiving new request
msm: camera: tfe: Reduce stack size during set axi bw
msm: camera: cdm: Check for HW state before dumping registers
msm: camera: ope: Reduce stack footprint during acquire
msm: camera: tfe: Disable clock if tfe2 is not supported
msm: camera: cdm: Avoid cdm pause incase of BL submit
msm: camera: tfe: Optimize CSID IRQ logging
msm: camera: ope: Move request id validity check outside of lock
msm: camera: tfe: Correct the tfe hw manager dump logic
msm: camera: ope: Synchronize flush and submit BLs
msm: camera: cdm: Protect cdm reset status
msm: camera: cdm: Handle cdm deinit sequence properly
msm: camera: tfe: Reduce reset timeout to 100ms
msm: camera: ope: Fix hang detection
msm: camera: ope: Make non-fatal logs as debug and info logs
msm: camera: tfe: set overflow pending bit to zero after HW reset
msm: camera: ope: Do not disable CDM during error handling
msm: camera: ope: Add support for OPE Replay
msm: camera: ope: Stop OPE in case of init failure
msm: camera: ope: Synchronize process cmd and flush request
msm: camera: cdm: Fix CDM IRQ handling
msm: camera: tfe: LDAR dump for TFE
msm: camera: ope: Fix the length check for debug buffer
msm: camera: cdm: Fix CDM reset logic
msm: camera: ope: Dump debug registers in case of HW hang
msm: camera: tfe: Support the RDI bus port for line based mode
msm: camera: cdm: Handle out of order reset done events
msm: camera: ope: Consider other contexts during timeout
msm: camera: ope: Put GenIRQ in last stripe BL
msm: camera: tfe: Process the rdi interrupts for rdi only resource
msm: camera: jpeg: Check the HW state before accessing register
msm: camera: csiphy: Update csiphy power-up sequence for lito v2
msm: camera: cdm: Secure freeing of request lists using locks
msm: camera: cpas: Add support for Scuba camnoc
msm: camera: csiphy: Clear secure phy flags on release
msm: camera: tfe: validate the tfe bw num paths
msm: camera: ope: Reorder the reset order in ope acquire
msm: camera: ope: Dump debug registers in case of reset failure
msm: camera: ope: Add logic to detect hang in CDM
msm: camera: isp: Increase max count of cfg to support more init packets
msm: camera: core: Fix cpas axi clk rate overflow.
CRs-Fixed: 2668666
Change-Id: I882ca4bd117bebc7d1c62bc82299d69d7b5c9388
Signed-off-by: Trishansh Bhardwaj <tbhardwa@codeaurora.org>
In many error cases it is required to know the
bandwidth applied on axi ports and camnoc axi
clock rate values. Added cpas api to print the
current axi bus votes, camnoc axi clock and ahb
vote level.This api can be called for isp errors
such as bus overflow, pxl overflow cases.
On RDI overflow printing last applied IFE clock,
dumping the CAMNOC fill-level registers to know
the pending and queued transactions, SOF EPOCH
and EOF timing to know exactly at what time the
RDI overflow came, Width and height of specific
Write master.
CRs-Fixed: 2623885
Change-Id: I92a9097efe9f6726748ec27ca39dd51c8c6de1b6
Signed-off-by: Mukund Madhusudan Atre <matre@codeaurora.org>
Add register information. Initial QoS settings info to program
camera static settings for chipsets having camera v170_200.
Also change the logic to get the camera and cpas versions.
Added the map table corresponding to camera and cpas versions.
For any new CPAS version support, just need to add the entries to
the map. This removes the complexity of if-else cases while
fetching the cpas hw information.
CRs-Fixed: 2571273
Change-Id: I7d54b8bc038aa90ecb39f5048e7809ac10c4476f
Signed-off-by: Gaurav Jindal <gjindal@codeeaurora.org>
Signed-off-by: Chandan Kumar Jha <cjha@codeaurora.org>
Signed-off-by: Mukund Madhusudan Atre <matre@codeaurora.org>
Bengal has different version of camnoc which requires
separate register space and camnoc interface changes.
This change adds the same.
CRs-Fixed: 2594541
Change-Id: I2a8e6cb8894444cb669ab1c4da5fa706dc6543ad
Signed-off-by: Rishabh Jain <risjai@codeaurora.org>
Signed-off-by: Trishansh Bhardwaj <tbhardwa@codeaurora.org>
Add register info. initial QoS settings info to program
camera static settings for chipsets having camera v580.
CRs-Fixed: 2528069
Change-Id: I6361140959ef64f35539612cf66604344adaea52
Signed-off-by: Mukund Madhusudan Atre <matre@codeaurora.org>
A notification is needed for camnoc ubwc encoder and decoder
errors in kona which were previously disabled. Update camnoc
irq register offsets and enable camnoc irq for ubwc.
Change-Id: I74b7264c537122a7bda618e8be03c4ac97c23000
Signed-off-by: Mukund Madhusudan Atre <matre@codeaurora.org>
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
Bring over camera driver changes as of msm-4.19
commit 5a5551a7 (Merge "msm: camera: reqmgr: Fix CRM
shift one req issue").
Change-Id: Ic0c2b2d74d1b3470c1c51d98228e312fb13c501a
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
