msm: camera: cpas: Add support for holi camnoc

Holi has different version of camnoc and CPAS version
which requires separate register space and camnoc
interface changes and CPAS version change.
This change adds the same.

CRs-Fixed: 2701462
Change-Id: I9fbfab592278ba7804809872b4b4b235895477f2
Signed-off-by: Suresh Vankadara <[email protected]>

Makefile

@@ -18,6 +18,10 @@ ifeq ($(CONFIG_ARCH_LAHAINA), y)
 include $(srctree)/techpack/camera/config/lahainacamera.conf
 endif
 
+ifeq ($(CONFIG_ARCH_HOLI), y)
+include $(srctree)/techpack/camera/config/holicamera.conf
+endif
+
 ifeq ($(CONFIG_ARCH_KONA), y)
 LINUXINCLUDE    += \
 		-include $(srctree)/techpack/camera/config/konacameraconf.h
@@ -37,6 +41,12 @@ ifeq ($(CONFIG_ARCH_LAHAINA), y)
 LINUXINCLUDE    += \
 		-include $(srctree)/techpack/camera/config/lahainacameraconf.h
 endif
+
+ifeq ($(CONFIG_ARCH_HOLI), y)
+LINUXINCLUDE    += \
+		-include $(srctree)/techpack/camera/config/holicameraconf.h
+endif
+
 endif
 
 ifneq (,$(filter $(CONFIG_SPECTRA_CAMERA), y m))

config/holicamera.conf

@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: GPL-2.0-only
+# Copyright (c) 2020, The Linux Foundation. All rights reserved.
+
+ifeq ($(CONFIG_QGKI),y)
+export CONFIG_SPECTRA_CAMERA=y
+$(info "SPECTRA_CAMERA IS STATIC")
+else
+$(info "SPECTRA_CAMERA IS MODULAR")
+export CONFIG_SPECTRA_CAMERA=m
+endif
+
+ifneq (,$(filter $(CONFIG_SPECTRA_CAMERA), y m))
+export CONFIG_SPECTRA_ISP=y
+export CONFIG_SPECTRA_OPE=y
+export CONFIG_SPECTRA_TFE=y
+export CONFIG_SPECTRA_SENSOR=y
+endif

config/holicameraconf.h

@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) 2020, The Linux Foundation. All rights reserved.
+ */
+
+#define CONFIG_SPECTRA_CAMERA      1
+#define CONFIG_SPECTRA_ISP         1
+#define CONFIG_SPECTRA_OPE         1
+#define CONFIG_SPECTRA_TFE         1
+#define CONFIG_SPECTRA_SENSOR      1

drivers/cam_cpas/cpas_top/cam_cpastop_hw.c

@@ -25,6 +25,7 @@
 #include "cpastop_v580_100.h"
 #include "cpastop_v540_100.h"
 #include "cpastop_v520_100.h"
+#include "cpastop_v545_100.h"
 
 struct cam_camnoc_info *camnoc_info;
 
@@ -106,6 +107,15 @@ static const uint32_t cam_cpas_hw_version_map
 		0,
 		0,
 	},
+	/* for camera_545 */
+	{
+		CAM_CPAS_TITAN_545_V100,
+		0,
+		0,
+		0,
+		0,
+		0,
+	},
 };
 
 static int cam_cpas_translate_camera_cpas_version_id(
@@ -145,6 +155,10 @@ static int cam_cpas_translate_camera_cpas_version_id(
 		*cam_version_id = CAM_CPAS_CAMERA_VERSION_ID_580;
 		break;
 
+	case CAM_CPAS_CAMERA_VERSION_545:
+		*cam_version_id = CAM_CPAS_CAMERA_VERSION_ID_545;
+		break;
+
 	default:
 		CAM_ERR(CAM_CPAS, "Invalid cam version %u",
 			cam_version);
@@ -747,6 +761,9 @@ static int cam_cpastop_init_hw_version(struct cam_hw_info *cpas_hw,
 	case CAM_CPAS_TITAN_520_V100:
 		camnoc_info = &cam520_cpas100_camnoc_info;
 		break;
+	case CAM_CPAS_TITAN_545_V100:
+		camnoc_info = &cam545_cpas100_camnoc_info;
+		break;
 	default:
 		CAM_ERR(CAM_CPAS, "Camera Version not supported %d.%d.%d",
 			hw_caps->camera_version.major,

drivers/cam_cpas/cpas_top/cam_cpastop_hw.h

@@ -115,7 +115,9 @@ enum cam_camnoc_hw_irq_type {
  * @CAM_CAMNOC_JPEG: Indicates JPEG HW connection to camnoc
  * @CAM_CAMNOC_FD: Indicates FD HW connection to camnoc
  * @CAM_CAMNOC_ICP: Indicates ICP HW connection to camnoc
- * @CAM_CAMNOC_TFE: Indicates TFE HW connection to camnoc
+ * @CAM_CAMNOC_TFE: Indicates TFE0 HW connection to camnoc
+ * @CAM_CAMNOC_TFE_1: Indicates TFE1 HW connection to camnoc
+ * @CAM_CAMNOC_TFE_2: Indicates TFE2 HW connection to camnoc
  * @CAM_CAMNOC_OPE: Indicates OPE HW connection to camnoc
  */
 enum cam_camnoc_port_type {
@@ -142,6 +144,8 @@ enum cam_camnoc_port_type {
 	CAM_CAMNOC_FD,
 	CAM_CAMNOC_ICP,
 	CAM_CAMNOC_TFE,
+	CAM_CAMNOC_TFE_1,
+	CAM_CAMNOC_TFE_2,
 	CAM_CAMNOC_OPE,
 };
 

drivers/cam_cpas/cpas_top/cpastop_v545_100.h

@@ -0,0 +1,318 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) 2020, The Linux Foundation. All rights reserved.
+ */
+
+#ifndef _CPASTOP_V545_100_H_
+#define _CPASTOP_V545_100_H_
+
+#define TEST_IRQ_ENABLE 0
+
+static struct cam_camnoc_irq_sbm cam_cpas_v545_100_irq_sbm = {
+	.sbm_enable = {
+		.access_type = CAM_REG_TYPE_READ_WRITE,
+		.enable = true,
+		.offset = 0xA40, /* SBM_FAULTINEN0_LOW */
+		.value = 0x1 | /* SBM_FAULTINEN0_LOW_PORT0_MASK*/
+			(TEST_IRQ_ENABLE ?
+			0x2 : /* SBM_FAULTINEN0_LOW_PORT6_MASK */
+			0x0) /* SBM_FAULTINEN0_LOW_PORT1_MASK */,
+	},
+	.sbm_status = {
+		.access_type = CAM_REG_TYPE_READ,
+		.enable = true,
+		.offset = 0xA48, /* SBM_FAULTINSTATUS0_LOW */
+	},
+	.sbm_clear = {
+		.access_type = CAM_REG_TYPE_WRITE,
+		.enable = true,
+		.offset = 0xA80, /* SBM_FLAGOUTCLR0_LOW */
+		.value = TEST_IRQ_ENABLE ? 0x3 : 0x1,
+	}
+};
+
+static struct cam_camnoc_irq_err
+	cam_cpas_v545_100_irq_err[] = {
+	{
+		.irq_type = CAM_CAMNOC_HW_IRQ_SLAVE_ERROR,
+		.enable = true,
+		.sbm_port = 0x1, /* SBM_FAULTINSTATUS0_LOW_PORT0_MASK */
+		.err_enable = {
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.enable = true,
+			.offset = 0xD08, /* ERRORLOGGER_MAINCTL_LOW */
+			.value = 1,
+		},
+		.err_status = {
+			.access_type = CAM_REG_TYPE_READ,
+			.enable = true,
+			.offset = 0xD10, /* ERRORLOGGER_ERRVLD_LOW */
+		},
+		.err_clear = {
+			.access_type = CAM_REG_TYPE_WRITE,
+			.enable = true,
+			.offset = 0xD18, /* ERRORLOGGER_ERRCLR_LOW */
+			.value = 1,
+		},
+	},
+	{
+		.irq_type = CAM_CAMNOC_HW_IRQ_CAMNOC_TEST,
+		.enable = TEST_IRQ_ENABLE ? true : false,
+		.sbm_port = 0x2, /* SBM_FAULTINSTATUS0_LOW_PORT6_MASK */
+		.err_enable = {
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.enable = true,
+			.offset = 0xA88, /* SBM_FLAGOUTSET0_LOW */
+			.value = 0x1,
+		},
+		.err_status = {
+			.access_type = CAM_REG_TYPE_READ,
+			.enable = true,
+			.offset = 0xA90, /* SBM_FLAGOUTSTATUS0_LOW */
+		},
+		.err_clear = {
+			.enable = false,
+		},
+	},
+};
+
+
+static struct cam_camnoc_specific
+	cam_cpas_v545_100_camnoc_specific[] = {
+	{
+		.port_type = CAM_CAMNOC_CDM,
+		.enable = true,
+		.priority_lut_low = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			.offset = 0xE30, /* CDM_PRIORITYLUT_LOW */
+			.value = 0x33333333,
+		},
+		.priority_lut_high = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			.offset = 0xE34, /* CDM_PRIORITYLUT_HIGH */
+			.value = 0x33333333,
+		},
+		.urgency = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			.offset = 0xE38, /* CDM_URGENCY_LOW */
+			.value = 0x00000003,
+		},
+		.danger_lut = {
+			.enable = false,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			.offset = 0xE40, /* CDM_DANGERLUT_LOW */
+			.value = 0x0,
+		},
+		.safe_lut = {
+			.enable = false,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			.offset = 0xE48, /* CDM_SAFELUT_LOW */
+			.value = 0x0,
+		},
+		.ubwc_ctl = {
+			.enable = false,
+		},
+	},
+	{
+		.port_type = CAM_CAMNOC_TFE,
+		.enable = true,
+		.priority_lut_low = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			/* TFE_PRIORITYLUT_LOW */
+			.offset = 0x30,
+			.value = 0x55443333,
+		},
+		.priority_lut_high = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			/* TFE_PRIORITYLUT_HIGH */
+			.offset = 0x34,
+			.value = 0x66666655,
+		},
+		.urgency = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			.offset = 0x38, /* TFE_URGENCY_LOW */
+			.value = 0x00001030,
+		},
+		.danger_lut = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.offset = 0x40, /* TFE_DANGERLUT_LOW */
+			.value = 0xffff0000,
+		},
+		.safe_lut = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.offset = 0x48, /* TFE_SAFELUT_LOW */
+			.value = 0x00000003,
+		},
+		.ubwc_ctl = {
+			/*
+			 * Do not explicitly set ubwc config register.
+			 * Power on default values are taking care of required
+			 * register settings.
+			 */
+			.enable = false,
+		},
+	},
+	{
+		.port_type = CAM_CAMNOC_TFE_1,
+		.enable = true,
+		.priority_lut_low = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			/* TFE_PRIORITYLUT_LOW */
+			.offset = 0x4030,
+			.value = 0x55443333,
+		},
+		.priority_lut_high = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			/* TFE_PRIORITYLUT_HIGH */
+			.offset = 0x4034,
+			.value = 0x66666655,
+		},
+		.urgency = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			.offset = 0x4038, /* TFE_URGENCY_LOW */
+			.value = 0x00001030,
+		},
+		.danger_lut = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.offset = 0x4040, /* TFE_DANGERLUT_LOW */
+			.value = 0xffff0000,
+		},
+		.safe_lut = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.offset = 0x4048, /* TFE_SAFELUT_LOW */
+			.value = 0x00000003,
+		},
+	},
+	{
+		.port_type = CAM_CAMNOC_TFE_2,
+		.enable = true,
+		.priority_lut_low = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			/* TFE_PRIORITYLUT_LOW */
+			.offset = 0x5030,
+			.value = 0x55443333,
+		},
+		.priority_lut_high = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			/* TFE_PRIORITYLUT_HIGH */
+			.offset = 0x5034,
+			.value = 0x66666655,
+		},
+		.urgency = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			.offset = 0x5038, /* TFE_URGENCY_LOW */
+			.value = 0x00001030,
+		},
+		.danger_lut = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.offset = 0x5040, /* TFE_DANGERLUT_LOW */
+			.value = 0xffff0000,
+		},
+		.safe_lut = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.offset = 0x5048, /* TFE_SAFELUT_LOW */
+			.value = 0x00000003,
+		},
+	},
+	{
+		.port_type = CAM_CAMNOC_OPE,
+		.enable = true,
+		.priority_lut_low = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			.offset = 0x430, /* OPE_PRIORITYLUT_LOW */
+			.value = 0x33333333,
+		},
+		.priority_lut_high = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.masked_value = 0,
+			.offset = 0x434, /* OPE_PRIORITYLUT_HIGH */
+			.value = 0x33333333,
+		},
+		.urgency = {
+			.enable = true,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.offset = 0x438, /* OPE_URGENCY_LOW */
+			.value = 0x00000033,
+		},
+		.danger_lut = {
+			.enable = false,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.offset = 0x440, /* OPE_DANGERLUT_LOW */
+			.value = 0xFFFFFF00,
+		},
+		.safe_lut = {
+			.enable = false,
+			.access_type = CAM_REG_TYPE_READ_WRITE,
+			.offset = 0x448, /* OPE_SAFELUT_LOW */
+			.value = 0xF,
+		},
+		.ubwc_ctl = {
+			/*
+			 * Do not explicitly set ubwc config register.
+			 * Power on default values are taking care of required
+			 * register settings.
+			 */
+			.enable = false,
+		},
+	},
+};
+
+static struct cam_camnoc_err_logger_info cam545_cpas100_err_logger_offsets = {
+	.mainctrl     =  0xD08, /* ERRLOGGER_MAINCTL_LOW */
+	.errvld       =  0xD10, /* ERRLOGGER_ERRVLD_LOW */
+	.errlog0_low  =  0xD20, /* ERRLOGGER_ERRLOG0_LOW */
+	.errlog0_high =  0xD24, /* ERRLOGGER_ERRLOG0_HIGH */
+	.errlog1_low  =  0xD28, /* ERRLOGGER_ERRLOG1_LOW */
+	.errlog1_high =  0xD2C, /* ERRLOGGER_ERRLOG1_HIGH */
+	.errlog2_low  =  0xD30, /* ERRLOGGER_ERRLOG2_LOW */
+	.errlog2_high =  0xD34, /* ERRLOGGER_ERRLOG2_HIGH */
+	.errlog3_low  =  0xD38, /* ERRLOGGER_ERRLOG3_LOW */
+	.errlog3_high =  0xD3C, /* ERRLOGGER_ERRLOG3_HIGH */
+};
+
+static struct cam_camnoc_info cam545_cpas100_camnoc_info = {
+	.specific = &cam_cpas_v545_100_camnoc_specific[0],
+	.specific_size =  ARRAY_SIZE(cam_cpas_v545_100_camnoc_specific),
+	.irq_sbm = &cam_cpas_v545_100_irq_sbm,
+	.irq_err = &cam_cpas_v545_100_irq_err[0],
+	.irq_err_size = ARRAY_SIZE(cam_cpas_v545_100_irq_err),
+	.err_logger = &cam545_cpas100_err_logger_offsets,
+	.errata_wa_list = NULL,
+};
+
+#endif /* _CPASTOP_V545_100_H_ */

drivers/cam_cpas/include/cam_cpas_api.h

@@ -44,6 +44,7 @@ enum cam_cpas_camera_version {
 	CAM_CPAS_CAMERA_VERSION_520  = 0x00050200,
 	CAM_CPAS_CAMERA_VERSION_540  = 0x00050400,
 	CAM_CPAS_CAMERA_VERSION_580  = 0x00050800,
+	CAM_CPAS_CAMERA_VERSION_545  = 0x00050405,
 	CAM_CPAS_CAMERA_VERSION_MAX
 };
 
@@ -73,6 +74,7 @@ enum cam_cpas_camera_version_map_id {
 	CAM_CPAS_CAMERA_VERSION_ID_580  = 0x4,
 	CAM_CPAS_CAMERA_VERSION_ID_520  = 0x5,
 	CAM_CPAS_CAMERA_VERSION_ID_540  = 0x6,
+	CAM_CPAS_CAMERA_VERSION_ID_545  = 0x7,
 	CAM_CPAS_CAMERA_VERSION_ID_MAX
 };
 
@@ -108,6 +110,7 @@ enum cam_cpas_hw_version {
 	CAM_CPAS_TITAN_580_V100 = 0x580100,
 	CAM_CPAS_TITAN_540_V100 = 0x540100,
 	CAM_CPAS_TITAN_520_V100 = 0x520100,
+	CAM_CPAS_TITAN_545_V100 = 0x545100,
 	CAM_CPAS_TITAN_MAX
 };
 

drivers/cam_ope/ope_hw_mgr/cam_ope_hw_mgr.c

@@ -582,7 +582,7 @@ static bool cam_ope_check_req_delay(struct cam_ope_ctx *ctx_data,
 	struct timespec64 ts;
 	uint64_t ts_ns;
 
-	get_monotonic_boottime64(&ts);
+	ktime_get_boottime_ts64(&ts);
 	ts_ns = (uint64_t)((ts.tv_sec * 1000000000) +
 		ts.tv_nsec);
 
@@ -1542,7 +1542,7 @@ static void cam_ope_ctx_cdm_callback(uint32_t handle, void *userdata,
 
 	ope_req = ctx->req_list[cookie];
 
-	get_monotonic_boottime64(&ts);
+	ktime_get_boottime_ts64(&ts);
 	ope_hw_mgr->last_callback_time = (uint64_t)((ts.tv_sec * 1000000000) +
 		ts.tv_nsec);
 
@@ -3098,7 +3098,7 @@ static int cam_ope_mgr_prepare_hw_update(void *hw_priv,
 		CAM_ERR(CAM_OPE, "Invalid ctx req slot = %d", request_idx);
 		return -EINVAL;
 	}
-	get_monotonic_boottime64(&ts);
+	ktime_get_boottime_ts64(&ts);
 	ctx_data->last_req_time = (uint64_t)((ts.tv_sec * 1000000000) +
 		ts.tv_nsec);
 	CAM_DBG(CAM_REQ, "req_id= %llu ctx_id= %d lrt=%llu",

drivers/cam_ope/ope_hw_mgr/ope_hw/ope_dev.c

@@ -228,7 +228,7 @@ static int cam_ope_component_bind(struct device *dev,
 	spin_lock_init(&ope_dev->hw_lock);
 	init_completion(&ope_dev->hw_complete);
 
-	CAM_DBG(CAM_OPE, "OPE:%d component bound successfully"
+	CAM_DBG(CAM_OPE, "OPE:%d component bound successfully",
 		ope_dev_intf->hw_idx);
 	return rc;
 
@@ -264,7 +264,7 @@ int cam_ope_probe(struct platform_device *pdev)
 	int rc = 0;
 
 	CAM_DBG(CAM_OPE, "Adding OPE component");
-	rc = component_add(&pdev->dev, &cam_vfe_component_ops);
+	rc = component_add(&pdev->dev, &cam_ope_component_ops);
 	if (rc)
 		CAM_ERR(CAM_OPE, "failed to add component rc: %d", rc);
 

drivers/cam_ope/ope_hw_mgr/ope_hw/top/ope_top.c

@@ -283,7 +283,8 @@ int cam_ope_top_process(struct ope_hw *ope_hw_info,
 		rc = cam_ope_top_reset(ope_hw_info, 0, 0);
 		break;
 	case OPE_HW_DUMP_DEBUG:
-		rc - cam_ope_top_dump_debug_reg(ope_hw_info);
+		rc = cam_ope_top_dump_debug_reg(ope_hw_info);
+		break;
 	default:
 		break;
 	}

include/uapi/camera/media/cam_ope.h

@@ -93,6 +93,7 @@ struct ope_stripe_info {
 	__u32 x_init;
 	__u32 stripe_location;
 	__u32 width;
+	__u32 height;
 	__u32 disable_bus;
 	__u32 reserved;
 };