نمودار کامیت

2739 کامیت‌ها

مولف SHA1 پیام تاریخ
Matthew Rice
c117389d88 asoc: codecs: Change WSA SPKRRECV control to bool
Update from SOC_ENUM to SOC_SINGLE to match rest of driver
implementation. Also remove remaining dev_mode enum references
in wsa884x driver.

Change-Id: I2a477c4fa8c29373ffa1e8e2eb599a0f1c61653d
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-04-27 10:52:03 -07:00
Shazmaan Ali
16a78f8cb3 asoc: codecs: Add bat cfg check
Add check to validate bat cfg,
bat cfg register read compared to dts read

Change-Id: Ib62ae3b3535a75dbc7c71b2b2ac3752fb2e61156
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-04-21 19:08:30 -07:00
Matthew Rice
ba5d48660f asoc: codecs: Fix WSA Offset1, BP Mode SWR config
Update settings to match how swr_mstr_ctrl driver is using the
SWR settings to set the registers. Previously, an offset1 of
0xFF would write 0xFF to the register instead of skipping it, unlike
other swr settings. This is similarly true for SWR Slave setting
for bp_mode.

Change-Id: I3c5b2635c5a88a52639cbac9455a544d5cfee154
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-04-21 14:58:38 -07:00
Matthew Rice
f07906e34d asoc: codec: Fix WSA SWRS Reg Dump
Add missing 0x60, 0x70, 0xC0, 0xC1, 0xC8
to reg dump for better debugging.

Change-Id: I6e7174e432d562c44eba2282ff3c03f513ebc960
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-04-20 10:03:13 -07:00
Matthew Rice
22d45f2149 asoc: codecs: Revamp dev_index uses
Add mod % 2 to allow dev_index to work with WSA2 Macro.
Also fix issues associated with incorrect parameter
checking of dev_index leading to potential array index
out-of-bounds issues.
Change WSA MODE mixer control to be SOC_SINGLE_EXT for
extra parameter validation.

Change-Id: I030ee64d87fa60c6b44feebf5ccb1265f4291cc1
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-04-18 14:03:07 -07:00
Matthew Rice
f2b4941541 asoc: codecs: Fix PBR Battery stack settings
Update PBR battery stack register settings to write battery stack - 1
Fix register masks to reference correct bit fields.

Change-Id: I20ca099e7180b8d75dfd6ef93d8502500d53b9b7
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-04-18 09:28:00 -07:00
qctecmdr
be2f9dada8 Merge "asoc: codecs: Replace dev_err/info with ratelimit prints" 2022-04-14 16:25:40 -07:00
qctecmdr
abd86fc157 Merge "asoc: codecs: Fix WSA PBR equation" 2022-04-14 13:55:27 -07:00
qctecmdr
79f878ecf9 Merge "asoc: codecs: Update clk_div_get returned type" 2022-04-14 13:01:35 -07:00
qctecmdr
b9e34f47d5 Merge "asoc: lpass: add lpass cdc register" 2022-04-14 12:33:43 -07:00
Shazmaan Ali
a20e11e0c3 asoc: codecs: Replace dev_err/info with ratelimit prints
replace all dev(pr)_err/info logs
that could potentially flood kernel logs with
ratelimit functions dev_err_ratelimited and
dev_info_ratelimited

Change-Id: I32dc6002dead1a07622978c4de63d541c01982fd
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-04-13 12:43:20 -07:00
Shazmaan Ali
aa3950aed3 asoc: codecs: remove idle detect thr func (NG)
idle detect thr is a fixed value, do not need to change
Add debug statements in idle detect control func

Change-Id: I68a049f8560a1a444c019df2dc09f7cf62b37d46
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-04-12 13:25:38 -07:00
Shazmaan Ali
7f29f390e1 asoc: codecs: error fix for soc_component_read_no_lock
the offset between LPASS_CDC_WSA_RX_INP_MUX_RX_INT0_CFG1 and
LPASS_CDC_WSA_RX_INP_MUX_RX_INT1_CFG1 is 8 so updating
0x104 + 8* interp
update ng block register write for NG2 mode in Kundu

Change-Id: I44da894feebb5d25bd467ffd4d54adde111778e6
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-04-12 01:26:35 -07:00
Matthew Rice
2e8c4069b5 asoc: codecs: Fix WSA PBR equation
Update equation that converts from the PBR table to
the correct register value.
Improve accuracy of truncation by moving the division
into one operation at the end of the formula and adding 1.
Update a few table values that were copied incorrectly.

Change-Id: I685c02778468e910820a90e2de216e0daf2491ac
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-04-11 07:05:27 -07:00
Shazmaan Ali
572fd25838 asoc: codecs: Add Idle detect source select condition
Use LEGACY source if any of the below use cases is met:
EAR, PBR OFF, IDLE, NG2 and PA GAIN <= 13.5dB
Use PRE-LA when: All other cases

Change-Id: Iace0c1f6fea367a73cd604b958bd5c8905d29509
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-04-11 07:04:48 -07:00
Matthew Rice
dfab7cf682 asoc: codecs: Update clk_div_get returned type
Cast returned u16 value to int in VA/TX macro: clk_div_get
to avoid possible data type warnings seen in function
caller.

Change-Id: I08943a26294ce54a207b739867292c01d090623e
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-04-11 06:59:32 -07:00
Prasad Kumpatla
6dead69b1f asoc: lpass: add lpass cdc register
add lpass cdc va register VAD_MUX.

Change-Id: I8dcad5f7edcefdac358be7a6d1b0c7fa3ca5c7ba
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2022-04-08 02:17:59 -07:00
qctecmdr
dde20c8484 Merge "asoc: codecs: Change LPASS DRE to use WSA sys_gain and bat_cfg" 2022-04-07 11:06:22 -07:00
qctecmdr
f1833cf0e8 Merge "asoc: Add dummy PCM backend" 2022-04-07 11:06:22 -07:00
qctecmdr
a35ade3c7d Merge "asoc: wsa883x: add slave_irq for wsa883x" 2022-04-07 11:06:22 -07:00
Phani Kumar Uppalapati
cd3f734089 asoc: wsa883x: add slave_irq for wsa883x
Interrupt from wsa883x are not handled as slave_irq is not set.
Add slave_irq for wsa883x to address this issue.
(cherry-picked from commit ddfc43e7c48dcbe9bbae45b5caacdd5bca441800)

Change-Id: I6b56aa88cca895e4e0e5871a7478f6859d45b03f
Signed-off-by: Phani Kumar Uppalapati <quic_phaniu@quicinc.com>
2022-03-31 19:13:06 -07:00
Phani Kumar Uppalapati
2f03655808 asoc: wsa883x: update irq_drv_data per wsa device
regmap_irq_chip->irq_drv_data is shared by all attached wsa
devices and point to last probbed wsa device. This will cause
interrupt handle issue. Update irq_drv_data per wsa deviece to
resolve this issue.
(cherry-picked from commit 1852682fbcebfb9f479c3d09a91c075049b90253)

Change-Id: I6ac0520a4074d74dfb28122e06eed6a86374c0ce
Signed-off-by: Phani Kumar Uppalapati <quic_phaniu@quicinc.com>
2022-03-31 19:12:51 -07:00
Phani Kumar Uppalapati
cace0a8255 ASoC: wsa883x: Handle PA_ERR interrupt on WSA speaker
PA_ERR can happen during speaker path setup. Log the
error status in the interrupt handler and clear the error
status for next audio playback to resume properly on
the speaker.

Change-Id: I0490d4cdd6379ed779ce7f54ec8b56d5a7af0649
Signed-off-by: Phani Kumar Uppalapati<quic_phaniu@quicinc.com>
2022-03-31 19:12:33 -07:00
Kunlei Zhang
d007a64c4b asoc: codecs: update WSA dapm_ignore_suspend pin names
Update to 5.15 kernel dapm api.
Pin name no longer needs prefix as it is added in API.

Change-Id: Ibf967dd01a36decdf904eff9d5af2e315aa53f1c
Signed-off-by: Kunlei Zhang <quic_kunleiz@quicinc.com>
2022-03-31 19:12:14 -07:00
Meng Wang
2a7c4c286e ASoC: wsa883x: Enable all WSA interrupts
Only UVLO_irq, PA_ON_ERR_IRQ and PDM_WD_IRQ are enabled
on wsa883x. Enable all other IRQs to monitor if WSA is in
bad state.

Change-Id: Ia78f12520eda4b26c00776583a78b14b74771e0e
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>
2022-03-31 19:11:51 -07:00
Meng Wang
b19ddc0ca2 asoc: wsa883x: update default value for VBAT_ATTN
With current setting for VBAT_ATTN1/2/3, pop is heard when
battery is low. Update default value for these registers
to resolve pop issue.

Change-Id: Ic4002a4b30ecd04b04001ca5f16bac5745a803d7
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>
2022-03-31 19:11:37 -07:00
Annemarie Porter
bb89ad1722 asoc: Add dummy PCM backend
Add dummy PCM backend definition for virtual devices.
This is being added to support echo reference capture.

Change-Id: I7830f9adf963397d06b837add3f9e1c0fe31563c
2022-04-01 07:37:47 +05:30
Meng Wang
e13418a3ca asoc: wsa883x: add support for updating analog gain
Add support for updating analog gain.

Change-Id: Icb090a86672d154bb0a8e22ce7fffeccea060604
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2022-03-31 18:51:47 -07:00
Srijan Magapu
77363afeba audio-kernel: I2S/TDM backend dai-links tertiary MI2S
Change-Id: I56cb744c0399b3f8e049c13c68ad0dbd7ead94a6
2022-03-31 18:48:37 -07:00
Matthew Rice
f97140fce0 asoc: codecs: Change LPASS DRE to use WSA sys_gain and bat_cfg
Can now set these registers during init once these values are
acquired.
Method called again before playback in case there are
speaker/recv changes.

Change-Id: I1b544633a660e98acadf94b9589b7656edebdd56
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-03-31 12:35:56 -07:00
Matthew Rice
5be0a8ab7d asoc: codecs: Fix lpass_cdc_dmic_clk_div arg type
Update mode argument type from int to u32 to avoid
any potential data loss since input is also u32 type.

Change-Id: I9541a7da20d2a22a0066622736268adffde5adbf
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-03-31 12:35:00 -07:00
Matthew Rice
448e5c5a77 asoc: codecs: Implement WSA IRQ retry/shutdown scheme
Whenever there is an interrupt,
mute the PA, then wait 1ms and unmute the pa and
check for another interrupt. Then if there are still interrupts,
retry muting and unmuting the pa with delay.
If interrupts persist, the PA will remain muted until there is a
usecase teardown or reset.

Change-Id: Ic59fc33d4606c1c630a61796d513a9ec99a4979c
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-03-31 12:34:31 -07:00
qctecmdr
2e08677b22 Merge "asoc: codecs: Add WSA init reg writes" 2022-03-30 22:27:10 -07:00
Matthew Rice
5403d47a9a asoc: codecs: Add WSA init reg writes
Update to latest sequence from WSA hardware systems team.
Add writes for VADC, BG, Boost

Change-Id: Ic61e1c36154ff673fce05546332e89fe683a3075
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-03-24 22:30:07 -07:00
Matthew Rice
f5d8dd3262 asoc: codecs: Add RX 6,7,8 to WSA Macro
Add new lpass RX paths. Needed to fix
WSA ADIE Loopback.
Update DAPM enum length to include these RXs.

Change-Id: Ie174cfab20b8beb103eefa94636e76ad756c7345
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-03-24 22:24:35 -07:00
Srijan Magapu
4a4b666ba0 audio-kernel: I2S/TDM backend dai-links
Add support for I2S/TDM backend dai-links for Kalama target

Change-Id: I0504a030afc534207d2d40ba6fd7fcebb2bb40f1
2022-03-24 22:15:51 -07:00
Shazmaan Ali
b62c934b61 asoc: codecs: Resolve checkpatch errors
Change-Id: I33dca97f388b524c7476e0da0ea8b1cbca4b849c
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-03-15 02:39:22 -07:00
Matthew Rice
2e70df2efe asoc: codecs: Add checking of WSA SWR dt params
Add to avoid crashing related to device tree parsing
of SWR port params.

Change-Id: Id839cc908fb5f7843e5fd6260b3205c8844349ba
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-03-10 10:18:23 -08:00
Matthew Rice
9d7405ec04 asoc: codecs: Fix Bolero and WSA out-of-range variables
Found potential issues relating to uninitialized or out-of-bounds variables
present in codec drivers. Place checks to ensure proper ranges are used.

Change-Id: Ib68cba2413788a57237f1f18fc5ce5fb5c6bfb0a
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-03-02 22:02:03 -08:00
Matthew Rice
3a6ef472dd asoc: codecs: Enable custom WSA SWRS port settings
For PBR and CPS ports, need the ability to customized slave
SWR frame OFFSET1 settings. Add similar method to WCD TX where
offset1 and lane_ctrl parameters are parsed from WSA device tree
and configured in SWRM.

Change-Id: Ib973ed93d9daa5ba02461a156e5b0a8c816d371e
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-03-02 22:01:34 -08:00
qctecmdr
8d3fde6573 Merge "asoc: Fix PBR SWR port config" 2022-03-01 20:51:35 -08:00
Matthew Rice
dd886964e0 asoc: Fix PBR SWR port config
Update HSTOP from 0 to 8 to match configuration.
Also fix slave ch en from 2 ch to 1 ch.
This fix resolves port collision/bus clash issues.

Change-Id: I91c6fe80a9db88d029e4ef81c7a06480a767b170
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-02-28 08:36:55 -08:00
Phani Kumar Uppalapati
2b5f3e4778 va-macro: Use DT property for selecting the clock ID
Use device tree property "qcom,use-clk-id" for selecting
the clock ID for VA Macro operation.

Change-Id: I759c690ab7f6dc7ca023d5954e9b445a7b91b1b6
2022-02-28 00:18:39 -08:00
Phani Kumar Uppalapati
0ceec6c1ac audio-kernel: select RCO clock if lpi PCM logging is enabled
Select clock root as RCO for VA use-case whenever LPI
PCM logging feature is enabled.

Change-Id: I461b2afb9eeb595975d550d56c54e7548f0f2130
Signed-off-by: Phani Kumar Uppalapati <quic_phaniu@quicinc.com>
2022-02-27 23:55:47 -08:00
qctecmdr
b622e92a38 Merge "asoc: codecs: Fix WSA dapm_ignore_suspend pin names" 2022-02-25 22:58:48 -08:00
qctecmdr
5239aa7d5c Merge "asoc: return correct index id for secondary mi2s stream-name" 2022-02-23 23:42:07 -08:00
Phani Kumar Uppalapati
69448e2228 asoc: return correct index id for secondary mi2s stream-name
Check and return correct index id for secondary mi2s
stream name.

Change-Id: I4df832e6cfc0e5eeac047e8cd4ce42def3be4061
2022-02-23 09:15:50 -08:00
qctecmdr
fb5143b4e5 Merge "asoc: Update secondary mi2s interface type and index" 2022-02-20 06:34:06 -08:00
qctecmdr
e87e6718f2 Merge "swr-haptics: Add new compatible string for Kalama target" 2022-02-20 06:34:06 -08:00
Phani Kumar Uppalapati
f51bed35f2 asoc: Update secondary mi2s interface type and index
Update secondary mi2s interface type and index
for kalama target.

Change-Id: I5b0bb1ab4458fbd3b7e8f36a0ca63e330e3bbc02
2022-02-17 21:45:23 -08:00