added 1msec delay before resetting FS cntrl, to ensure no
glitch at the start of VI feedback.
Change-Id: Ia9ae296f336e4deb4b8bedb718316a6772466a95
Signed-off-by: sarath varma ganapathiraju <quic_ganavarm@quicinc.com>
Enable WSA RX1 mix path to ensure DMA is enabled
properly and data is consumed to drive right channel
using wsa mix path.
Change-Id: I2b0bc92eeaa82734254ceda96de39f20a761dc75
Signed-off-by: sarath varma ganapathiraju <quic_ganavarm@quicinc.com>
DRE is not disabled properly on targets where kcontrols are not exposed.
Add separate check for both SWR PCM and PDM data transport cases to
avoid having dependency on kcontrol.
Change-Id: Ifbd9aaa8213540c9cc19690ef70b30336580116a
Signed-off-by: Ravulapati Vishnu Vardhan Rao <quic_visr@quicinc.com>
Implement changes to make the driver compatible with bolero V2.2.
Change-Id: If2797a80f775c685ff2a6912de189b1d9b4906d0
Signed-off-by: Vangala, Amarnath <quic_avangala@quicinc.com>
Sampling rate of the decimator is reset to hw reset value during
power down event in existing code. This code was implemented for
a safety precaution.
Remove this code as it is causing a side effect for VA use cases.
Side effect of existing code: during successive VA use cases runs,
Sampling rate is not updated as the device is not closed completely.
Due to this, decimator runs with incorrect sampling rate for
successive runs and causes failure.
Change-Id: I5e60c656043d06c3d999de183698adfffdaa44d1
Signed-off-by: Vangala, Amarnath <quic_avangala@quicinc.com>
Remove the PRE_SSR blocking notifier call.
This is not required as early down event is not handled.
Change-Id: Ie448fa2af92edd484d282200cf350c6bddc5f99d
Signed-off-by: Vangala, Amarnath <quic_avangala@quicinc.com>
While disabling the Decimator, reset the sampling rate to default value.
Change-Id: If07aeb69ddff459d0fdf8dfd4ccb7b3d8ed97743
Signed-off-by: Vangala, Amarnath <quic_avangala@quicinc.com>
In lpass_cdc_wsa_macro_config_compander function,
add check for wsa_sys_gain array's index to make sure
it won't go out of bound.
Change-Id: I9d8512726de959e7a0d9e875e966140d70412e25
Signed-off-by: Deepali Jindal <quic_deepjind@quicinc.com>
Program WSA_DATA_FS_CTL reg based on input used(wsa rx/wsa2 rx)
and also update the channelmap based on mixer cntl.
Change-Id: I0cfac1d9b25dd1211824bcea2753bb6c1131f767
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
Mix path clk is gated by main path clk, as per current logic we are not
enabling main path clk for mix path use-cases.
Enable main path clk before enabling mix path for UPD dedicated backend
to work.
Change-Id: I209d1eaf25f4ef08bbd534f5ecc858e465ce7e18
Signed-off-by: Faiz Nabi Kuchay <quic_fkuchay@quicinc.com>
During spk playback and VA concurrency,
sometimes WSA CLK goes out of sync causing
VI_TX data mute. To resolve this, everytime
after WSA MCLK enable toggle fs_cnt_clr bit.
Change-Id: Ia936f1d4843890d2ae5c02b039f502941a5427b9
Signed-off-by: Soumya Managoli <quic_c_smanag@quicinc.com>
enable the wsa and wsa2 clk as per sequence.
Change-Id: Ieefa4b6ea7aec535d940d780b0ed923483b4d3ee
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
Unmute WSA after enabling main path for
ADIE loopback cases.
Change-Id: I850aa4dbcf77371811010c1d614c6c7e94736971
Signed-off-by: Eric Rosas <quic_erosas@quicinc.com>
lpass_cdc_register_macro can be called simultaneously by different
macros as bootup resulting in inconsistent value of
num_macros_registered. This will result in one of macro going ahead and
registering lpass-cdc component and other macro failing to register which
will cause probe of other macro to fail. Protect function with mutex lock
so that macros access it sequentially
Change-Id: I9d3811eeceb06b6a7e66d79a1b899b2c4283bb52
Signed-off-by: Yuhui Zhao <quic_yuhuzhao@quicinc.com>
Remove platform_max setting in WSA/WSA2 drivers
to correct the volume range for digital volume.
Change-Id: Ia87c9fbeacc7bbb37b02f707b5c624a4091251d9
Signed-off-by: Sam Rainey <quic_rainey@quicinc.com>
add support to select PDM or PCM path in rx macro with the help
of mixer ctls.
Change-Id: I803e0bf440c1b3546cbda23e49736addb9083d92
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
Use VA_CORE_CLK without LPI Enable mixer cntl for SVA usecases,
To keep usecase in LPI mode even in corner cases.
Change-Id: I45da244b8a992b1ff043ab4b401903376c5cff90
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
When switching from 16KHz to 48KHz recording, mute issue happens.
Addd TX datapath reset during path teardown to resolve this issue.
Change-Id: I7445b397c20ce4e4968fec2326267f63dcba5a8c
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>
Disable the common pbr clk register only when no one uses
RX0 and RX1 channels.
Change-Id: Ia5fab1d3e4be7d9ecb01ad0b612b9f6ef7406bea
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
During SSR down event,
ensure swr gpios are put to sleep even in error conditions.
Change-Id: I649d088d0bc429c9b7a02304272eaea06774ca51
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
Enable the clk as per sequence.
Change-Id: I54d6981a70b218d4655514bb69ff39a7581264a2
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
updated the out of bound check for comp_mode
if any such occurence happens setting it to default mode.
Change-Id: Ie4a7275d45af6a96f1a2ec4b6ece6dc7a5dca464
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
