Commit Graph

162 Commits

Author SHA1 Message Date
Matthew Rice
68469d7946 asoc: codecs: Shorten IDLE holdoff time
Decrease idle holdoff time from 60 to 29 samples as per updated
documentation.

Change-Id: Ia8786020d6de8320f057f418e743507030c734c8
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-05-06 10:41:28 -07:00
Matthew Rice
8027610611 asoc: codes: Update WSA Macro compander dly to 7
New requirement to update compander_ctl7 again_delay
field to 7.

Change-Id: I4c5ef15c645cabded50203bf92facbe7c8ff8c5b
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-05-06 10:35:02 -07:00
qctecmdr
a6c0e859aa Merge "asoc: codecs: Change WSA SPKRRECV control to bool" 2022-05-03 13:03:17 -07:00
qctecmdr
86e51fdfde Merge "asoc: codecs: Fix PBR Battery stack settings" 2022-05-02 20:11:51 -07:00
Matthew Rice
c117389d88 asoc: codecs: Change WSA SPKRRECV control to bool
Update from SOC_ENUM to SOC_SINGLE to match rest of driver
implementation. Also remove remaining dev_mode enum references
in wsa884x driver.

Change-Id: I2a477c4fa8c29373ffa1e8e2eb599a0f1c61653d
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-04-27 10:52:03 -07:00
Matthew Rice
0642af910a asoc: codecs: Update types of dmic_clk_enable call
Match datatypes of variables in
lpass_cdc_va_macro_enabl_dmic() with
lpass_cdc_dmic_clk_enable() to prevent CFI issues.

Change-Id: Id378476b1aa6231c8542ca754124716af2b1f50b
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-04-18 13:41:11 -07:00
Matthew Rice
f2b4941541 asoc: codecs: Fix PBR Battery stack settings
Update PBR battery stack register settings to write battery stack - 1
Fix register masks to reference correct bit fields.

Change-Id: I20ca099e7180b8d75dfd6ef93d8502500d53b9b7
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-04-18 09:28:00 -07:00
qctecmdr
be2f9dada8 Merge "asoc: codecs: Replace dev_err/info with ratelimit prints" 2022-04-14 16:25:40 -07:00
qctecmdr
79f878ecf9 Merge "asoc: codecs: Update clk_div_get returned type" 2022-04-14 13:01:35 -07:00
qctecmdr
b9e34f47d5 Merge "asoc: lpass: add lpass cdc register" 2022-04-14 12:33:43 -07:00
Shazmaan Ali
a20e11e0c3 asoc: codecs: Replace dev_err/info with ratelimit prints
replace all dev(pr)_err/info logs
that could potentially flood kernel logs with
ratelimit functions dev_err_ratelimited and
dev_info_ratelimited

Change-Id: I32dc6002dead1a07622978c4de63d541c01982fd
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-04-13 12:43:20 -07:00
Shazmaan Ali
aa3950aed3 asoc: codecs: remove idle detect thr func (NG)
idle detect thr is a fixed value, do not need to change
Add debug statements in idle detect control func

Change-Id: I68a049f8560a1a444c019df2dc09f7cf62b37d46
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-04-12 13:25:38 -07:00
Shazmaan Ali
7f29f390e1 asoc: codecs: error fix for soc_component_read_no_lock
the offset between LPASS_CDC_WSA_RX_INP_MUX_RX_INT0_CFG1 and
LPASS_CDC_WSA_RX_INP_MUX_RX_INT1_CFG1 is 8 so updating
0x104 + 8* interp
update ng block register write for NG2 mode in Kundu

Change-Id: I44da894feebb5d25bd467ffd4d54adde111778e6
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-04-12 01:26:35 -07:00
Shazmaan Ali
572fd25838 asoc: codecs: Add Idle detect source select condition
Use LEGACY source if any of the below use cases is met:
EAR, PBR OFF, IDLE, NG2 and PA GAIN <= 13.5dB
Use PRE-LA when: All other cases

Change-Id: Iace0c1f6fea367a73cd604b958bd5c8905d29509
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-04-11 07:04:48 -07:00
Matthew Rice
dfab7cf682 asoc: codecs: Update clk_div_get returned type
Cast returned u16 value to int in VA/TX macro: clk_div_get
to avoid possible data type warnings seen in function
caller.

Change-Id: I08943a26294ce54a207b739867292c01d090623e
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-04-11 06:59:32 -07:00
Prasad Kumpatla
6dead69b1f asoc: lpass: add lpass cdc register
add lpass cdc va register VAD_MUX.

Change-Id: I8dcad5f7edcefdac358be7a6d1b0c7fa3ca5c7ba
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2022-04-08 02:17:59 -07:00
qctecmdr
dde20c8484 Merge "asoc: codecs: Change LPASS DRE to use WSA sys_gain and bat_cfg" 2022-04-07 11:06:22 -07:00
Matthew Rice
f97140fce0 asoc: codecs: Change LPASS DRE to use WSA sys_gain and bat_cfg
Can now set these registers during init once these values are
acquired.
Method called again before playback in case there are
speaker/recv changes.

Change-Id: I1b544633a660e98acadf94b9589b7656edebdd56
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-03-31 12:35:56 -07:00
Matthew Rice
5be0a8ab7d asoc: codecs: Fix lpass_cdc_dmic_clk_div arg type
Update mode argument type from int to u32 to avoid
any potential data loss since input is also u32 type.

Change-Id: I9541a7da20d2a22a0066622736268adffde5adbf
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-03-31 12:35:00 -07:00
Matthew Rice
f5d8dd3262 asoc: codecs: Add RX 6,7,8 to WSA Macro
Add new lpass RX paths. Needed to fix
WSA ADIE Loopback.
Update DAPM enum length to include these RXs.

Change-Id: Ie174cfab20b8beb103eefa94636e76ad756c7345
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-03-24 22:24:35 -07:00
Shazmaan Ali
b62c934b61 asoc: codecs: Resolve checkpatch errors
Change-Id: I33dca97f388b524c7476e0da0ea8b1cbca4b849c
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-03-15 02:39:22 -07:00
Matthew Rice
9d7405ec04 asoc: codecs: Fix Bolero and WSA out-of-range variables
Found potential issues relating to uninitialized or out-of-bounds variables
present in codec drivers. Place checks to ensure proper ranges are used.

Change-Id: Ib68cba2413788a57237f1f18fc5ce5fb5c6bfb0a
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-03-02 22:02:03 -08:00
Phani Kumar Uppalapati
2b5f3e4778 va-macro: Use DT property for selecting the clock ID
Use device tree property "qcom,use-clk-id" for selecting
the clock ID for VA Macro operation.

Change-Id: I759c690ab7f6dc7ca023d5954e9b445a7b91b1b6
2022-02-28 00:18:39 -08:00
Phani Kumar Uppalapati
0ceec6c1ac audio-kernel: select RCO clock if lpi PCM logging is enabled
Select clock root as RCO for VA use-case whenever LPI
PCM logging feature is enabled.

Change-Id: I461b2afb9eeb595975d550d56c54e7548f0f2130
Signed-off-by: Phani Kumar Uppalapati <quic_phaniu@quicinc.com>
2022-02-27 23:55:47 -08:00
Matthew Rice
72f737377e asoc: codecs: Fix lpass_cdc_wsa_macro_read_array
Update function to correctly read array from device tree.
Previously not reading values and returning -EINVAL.
WSA bat_cfg/rload/sys_gain are now correctly configured.
Also add softclip clock enable during pbr config.

Change-Id: Ia1b93acfde3e799b3b72e05966d0fa955c3f49ac
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-02-17 11:41:34 -08:00
Shazmaan Ali
5fd6cafe49 asoc: codecs: Add source select between PRE-LA and LEGACY
Add idle detect source select based on NG mode,
if NG2 then source is PRE-LA else LEGACY

Change-Id: I4e0cb3825960e6b795038fb5e85cfaa7a2fbfe62
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-01-20 21:30:26 -08:00
Shazmaan Ali
ff568161d0 asoc: codecs: Add idle detect control for WSA macro
Add idle detect enable for mixed control path,
and update copyright markings

Change-Id: Idf2932cd1813082f60ee96010788cdb1ef36afbf
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-01-20 21:30:22 -08:00
Matthew Rice
9284d9af02 asoc: codecs: Implement lpass PBR feature
Lpass-side enablement of new WSA feature.
Configure PBR registers based on WSA bat_cfg/rload/sys_gain.
Some registers updated during init, others during enable_interpolator.

Change-Id: Iac42672182827a9da47700319c61b9d0a17d0936
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-01-20 21:30:01 -08:00
Matthew Rice
311264875e asoc: codecs: Change WSA config params acquisition
Update WSA rload, system gain, bat_cfg to get from wsa_macro device tree.
WSA Bat_cfg change to read from VPHX_SYS_EN_STATUS reg.
Add device tree parsing for these params in WSA macro
and WSA driver.
Remove machine driver method of sending the parameters.
Add default_dev_mode (spkr vs rcv) from device tree for WSA.
Move code from spkr event to userspace controls or probe.
Change system_gain and affected params when switching between
dev_modes.
These changes simplify configuration data and code and allow
more registers to be written during bootup or before playback.

Change-Id: I79966c704adfac1bf2d85aa6519ea574764c7a8b
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-01-20 21:29:37 -08:00
Meng Wang
72189f1f59 asoc: lpass-cdc: udpate MSM DMIC power up sequence to reduce pop
Udpate MSM DMIC power up sequence to reduce pop.

Change-Id: I5f3f2e439e31877d3f21c05575c95942b937252e
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>
2021-12-15 19:09:04 -08:00
Matthew Rice
08ad1635a5 asoc: codecs: Initial lpass-cdc 2.6 implementation
Update register headers, add version 2.6 string.

Change-Id: I6236ddebba3fcbb37f2a64c8638d4eea4f6cc062
Signed-off-by: Matthew Rice <mrice@codeaurora.org>
2021-11-09 15:32:30 -08:00
Junkai Cai
bd4a663a65 asoc: add config files to support kalama
add kalama config file to all drivers' Kbuild, including soc/dsp/ipc

Change-Id: I56a6092da515f211a56617f0cff60079dbf0aa39
Signed-off-by: Junkai Cai <junkai@quicinc.com>
2021-10-27 14:37:34 -07:00
Meng Wang
322f08f457 asoc: lpass-cdc: reset RX_TX_CORE_CLK and WSA_TX_CORE_CLK during SSR/PDR
Sometimes after SSR/DPR is triggered, RX_TX_CORE_CLK, WSA_TX_CORE_CLK
and WSA2_TX_CORE_CLK are not reset which causes WSA or WCD not
detected. Make this change to add reset during SSR.

Change-Id: I343f2f92244de3eee844e220a6201b389dc647b4
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-09-28 14:23:52 +08:00
qctecmdr
590d8a9823 Merge "wsa: soundwire: Add support for 4p8MHz DAC rate" 2021-09-19 10:04:30 -07:00
Laxminath Kasam
001ba433b2 wsa: soundwire: Add support for 4p8MHz DAC rate
Add support to use 4p8MHz DAC rate for receiver over WSA.

Change-Id: Ia0811670326be8131687fbdff70464da063902b2
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
2021-09-15 22:22:09 -07:00
Laxminath Kasam
ae258cb2f8 asoc: wsa883x: Update low_noise gain for receiver
Add changes to use wsa883x for receiver with
low_noise mode settings.

Change-Id: Icfa43ebbdb1e366f365053535f541bee03751ca3
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
2021-09-15 22:19:46 -07:00
Meng Wang
3fa91843c7 asoc: lpass-cdc: add mixer control to indicate if swr_dmic is used
When SWR MIC is used, lpass-cdc doesn't know if it's amic
or dmic on WCD. Add new mixer control to indicate if
swr_dmic is used or not.

Change-Id: I2910053d1da9110edfe9b021df744f9d1662d158
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-09-15 22:19:40 -07:00
qctecmdr
7923c5e04e Merge "asoc: lpass-cdc: update logic to disable VA_MCLK" 2021-09-03 01:46:33 -07:00
Meng Wang
f62a7f3e92 asoc: lpass-cdc: update logic to disable VA_MCLK
When adsp SSR happens, VA_MCLK enabled by VA_SWR_PWR widget will
not be disabled as ADSP is down and it cannot enable TX_MCLk before
disabling VA_MCLK. After disabling SVA, VA_MCLk is left open.
Add dev_up flag to indicate SSR and close VA_MCLK during SSR.

Change-Id: Ic544ce32c46054c7362d3eb07a4a47ec115d2651
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-08-25 13:44:52 +08:00
Junkai Cai
63db490176 asoc: lpass-cdc: return error when requesting incorrect state
Thermal framework is expected an error to be returned if the requested
cur_state exceed the max_state.

Change-Id: I1e0d8124a1aa6c0d755b35225207638aefdcb464
Signed-off-by: Junkai Cai <junkai@codeaurora.org>
2021-08-19 14:25:57 -07:00
qctecmdr
fa58ae98f9 Merge "asoc: codecs: update cb decode register control" 2021-08-15 08:15:12 -07:00
Vignesh Kulothungan
1065b55645 asoc: codecs: update cb decode register control
Update central broadcast register control to enable bcl path.

Change-Id: Ibc05289d9cdd41e81369c6ef2547eceffa36d73a
Signed-off-by: Vignesh Kulothungan <vigneshk@codeaurora.org>
2021-08-09 12:17:38 -07:00
Meng Wang
a8bd9abc48 asoc: lpass-cdc: add put_autosuspend to pair with pm_runtime_get_sync
When reading/writing lpass codec registers, pm_runtime_put_autosuspend
is missed when vote fails and it causes device fails suspending after
ssr. Add pm_runtime_put_autosuspend to pair with pm_runtime_get_sync.
When LPASS_CDC_MACRO_EVT_PRE_SSR_UP comes, core vote is needed before
resetting GFMUX reg and dev_up is not set to true yet. Add pre_dev_up
flag to indicate PRE_SSR_UP and be used in lpass_cdc_check_core_votes
to avoid false alarm.

Change-Id: Ic12ecd9645f291078e32f4921f9f77c2d85e4b8c
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-08-08 19:49:27 -07:00
qctecmdr
043966829b Merge "asoc: lpass-cdc: Disable clk when core vote fails." 2021-08-06 21:14:44 -07:00
Aditya Bavanari
a415d7381d asoc: Return the correct clk_div value
Incorrect check for return value of clk_div_get
causes CLK_DIV2 setting being missed. Fix the
return value check to address this.

Change-Id: Ic1b6761ab836a38c657ac7e43efda0e2f23c5fee
Signed-off-by: Aditya Bavanari <abavanar@codeaurora.org>
2021-08-04 20:34:18 -07:00
Deepali Jindal
a7de3376f2 asoc: lpass-cdc: Disable clk when core vote fails.
During ssr, when powering down audio path and core vote fails, 
it directly exits without disabling clock. After adsp is up, 
it will enable both RX_MCLk and RX_TX_MCLK which causes
glitch on headset output.

Change-Id: I98d3cdbffa0a5ae1ac4064579a52a29b02d4ae3e
Signed-off-by: Deepali Jindal <deepjind@codeaurora.org>
2021-08-04 20:29:47 -07:00
qctecmdr
e28a044a67 Merge "asoc: lpass-cdc: update logic for va clk switch" 2021-08-02 20:56:04 -07:00
Meng Wang
f55dedc581 asoc: lpass-cdc: update logic for va clk switch
SVA switch is not retain at VA_CLK when switch
between handset and headset mic sva. Update the
clock release logic during swr power event.

Change-Id: I52c5f7576426af2ff385a862da872e8d86959ecb
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-07-22 15:53:20 +08:00
Meng Wang
52aa968296 asoc: lpass-cdc: avoid enabling VA_MCLk when requested clk is not default clk
When requested clk is not default clk, it should not enable
VA_MCLk directly. lpass_cdc_clk_rsc_check_and_update_va_clk
will take care of VA_MCLK switch.

Change-Id: I602be7dcc0228fd2e6ecd7624a96663e89485bd0
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-07-20 16:35:51 +08:00
Meng Wang
2344f44b9c asoc: lpass-cdc: add ftrace log for NOC issue
Add ftrace log to debug NOC issues.
When writing/reading lpass codec registers, add vote_lock
to make sure clk is not disabled.

Change-Id: I1df924d6aefee2899f7e5008851c1c324dabf62a
Signed-off-by: Meng Wang <mengw@codeaurora.org>
2021-07-13 23:16:45 -07:00