Граф коммитов

1227 Коммитов

Автор SHA1 Сообщение Дата
qctecmdr
8bbc6f2698 Merge "disp: msm: sde: flush commit thread queue during pm suspend" 2021-06-01 20:21:34 -07:00
Cong Zhang
3133112917 disp: msm: sde: Rename the hypervisor interface
The hypervisor is renamed to gunyah now. All 'haven' words need change
to 'gunyah' and 'hh' words in hypervisor interface need change to 'gh'.

Change-Id: Ia7ff6d855eb5548540a2f11a781c2555beb23187
Signed-off-by: Cong Zhang <congzhan@codeaurora.org>
2021-05-31 16:55:38 -07:00
qctecmdr
ffe21ad278 Merge "disp: msm: sde: fix indexing for frame data" 2021-05-31 08:46:29 -07:00
Dhaval Patel
cfa81fdcaf disp: msm: sde: fix uidle disable configuration
Fix uidle disable setting when panel fps is beyond supported
FAL1 and FAL10 limit.

Change-Id: If76f1789f5f2677e503375234e8d4029c455d455
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2021-05-27 12:27:03 -07:00
Samantha Tran
f5a91ba3b3 disp: msm: sde: pass disp info to setup vsync source
While setting up vsync source, display info is used to decide whether
or not watchdog TE should be used. This change passes display info
as a parameter to vsync setup rather than using the encoder's display
info which is not updated in the case of panel dead error.

Change-Id: I928ee2012eec7bf63f4ba3538082bc3e47d5e99d
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-05-24 16:24:39 -07:00
qctecmdr
72f7dfe428 Merge "disp: msm: sde: handle LTM switch in and out of dual pipe merge mode" 2021-05-22 15:20:49 -07:00
Linux Build Service Account
b3097f1990 Merge "disp: msm: sde: fix qos lut index calculation for high refresh rate" into display-kernel.lnx.5.10 2021-05-21 10:05:11 -07:00
Linux Build Service Account
deef47dba0 Merge "disp: msm: sde: avoid mixer op setup for virtual LM" into display-kernel.lnx.5.10 2021-05-21 10:05:11 -07:00
Linux Build Service Account
b9eedf97f8 Merge "disp: msm: sde: set IB value after cont splash to DT value" into display-kernel.lnx.5.10 2021-05-21 10:04:10 -07:00
Linux Build Service Account
8d4ac30c96 Merge "disp: msm: sde: reduce WB linewidth for YUV format" into display-kernel.lnx.5.10 2021-05-21 10:04:10 -07:00
qctecmdr
d6b76d05e0 Merge "disp: msm: update DCE_DATA_COMPRESS bit in non-dsc case" 2021-05-21 07:12:14 -07:00
Yashwanth
728fc8d84b disp: msm: sde: add dp dsc reservation switch property in waipio
This change adds SDE_DP_DSC_RESERVATION_SWITCH for
allowed_dsc_reservation_switch catalog property in waipio
target.

Change-Id: I0fc205fe586503eb238491e3d8f16c0c19053de7
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-05-20 21:36:19 -07:00
Raviteja Tamatam
3789258773 disp: msm: sde: add allowed_dsc_reservation_switch capability
This change adds allowed_dsc_reservation_switch to determine if
dsc seamless switch is supported for DP. Also, based on the
flag, it determines and populates the required number of
available resources for DP.

Change-Id: I9cd7219a50d352369c5bc8386ce7dc25c30b80b6
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
2021-05-20 21:36:05 -07:00
Raviteja Tamatam
b89a3f739a disp: msm: populate submode blob information
Mode information apart from the fields in
drm_mode_modeinfo that can trigger a modeset like
dsc-nondsc, video-cmd are defined in sub mode.
For each mode in connector->modes there can be
multiple submodes.

Change-Id: Ib8697d3fa4ea5261d9ac4943b1a4149e22c4da2f
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
2021-05-20 21:35:38 -07:00
Yashwanth
7e03fb61fd disp: msm: add support for seamless dsc switch
This change adds logic to determine dsc switch based on
the connector property "CONNECTOR_PROP_DSC_MODE" and
performs seamless DSC switch if there is any change in
DSC configuration. The connector property is populated
in msm_sub_mode based on which suitable mode is selected.

Change-Id: Ifc4931f16dfb814781bc1d72b103e09103e6bfee
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-05-20 21:34:27 -07:00
Samantha Tran
f465e29a7c disp: msm: sde: set IB value after cont splash to DT value
While releasing continuous splash resource, place IB vote
with value populated from device tree. If device tree has
not specified a value, use default IB enable value.

Change-Id: I08f7ddc56ab580887cd4f31c93d7b8c358fb3d13
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-05-20 15:53:31 -07:00
Yashwanth
ffc7cdbe08 disp: msm: add connector state along with crtc state to detect modeset
During modeset, private mode changed is detected from
msm_display_mode which is present in sde_connector_state.
In the current code, sde_connector_state is found from the
drm_connector variable which will not be valid
during atomic check phase and new connector state is
required here. To handle this, drm_connector_state is passed
along with the drm_crtc_state while detecting
msm_atomic_needs_modeset condition.

Change-Id: I62c162eff6e1c091cb05b3f049a40a0f25b710ba
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-05-21 03:48:21 +05:30
Samantha Tran
15b35fe217 disp: msm: sde: reduce WB linewidth for YUV format
Linear formats have an increased width of 5k on waipio
target however this excludes YUV and only applies to
RGB linear formats. This change reduces the max linewidth for
YUV format to 4k.

Change-Id: I51cfc272ea14e10cde87098e879ef7dfbd9f117a
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-05-20 09:57:17 -07:00
Yashwanth
8515d80ece disp: msm: sde: flush commit thread queue during pm suspend
Following is the sequence during which issue is observed:

1) After suspend, resume commit is with doze suspend mode
(LP2) but kickoff didn't begin.
2) At the same time, runtime pm suspend is triggered which
makes idle request on pm suspend/resume thread.
3) Since the kickoff has not yet started on commit thread,
pending kickoff count is not updated and idle power
collapse sequence is started from pm suspend.
4) As part of idle, irqs are turned off from pm suspend
thread which are turned on commit thread after kickoff
before pp tx irq arrives.

In such cases, during pm suspend, commit thread workqueue
is flushed before encoder idle request to prevent irq's
from getting turned off before the transfer is complete to
avoid inconsistent state.

Change-Id: I417ece0ae7021b0fc5005e262a0d87e43ac729be
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-05-20 10:19:08 -04:00
Samantha Tran
ef2525e0cc disp: msm: sde: avoid mixer op setup for virtual LM
This change sets a flag to true if a mixer is a virtual mixer.
Virtual mixers will skip setting up mixer ops and debug register
dumps as their range is not valid. Since mixer ops are no longer
guaranteed to be set, add null checks before using these ops.

Change-Id: Idfe7e1e2b893dadbbe6756d69d0c4ca4fa6ae4ce
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-05-19 19:35:00 -07:00
Prabhanjan Kandula
c35d5ca0cc disp: msm: sde: fix qos lut index calculation for high refresh rate
Fix qos lut offset calculation based on the refresh rate index.
Current calculation is not accounting qos lut size for qseed and non
qseed lut types.

Change-Id: I281fa7b3a245ad9f4a3d2ba45bb5957c3900abd6
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2021-05-19 14:48:55 -07:00
qctecmdr
807f03d2c9 Merge "disp: msm: sde: fix cont splash pipe identification" 2021-05-19 14:13:55 -07:00
Andhavarapu Karthik
9c919c10f3 disp: msm: sde: add check for unsupported writeback output formats
Chroma sample types H1V2 and H2V1 are not supported in write back output.
Made changes to add atomic check for such unsupported output formats in
writeback.

Change-Id: Ic37865e0b0c64016df728cc753ad66c3b9e9d138
Signed-off-by: Andhavarapu Karthik <kartkart@codeaurora.org>
2021-05-19 16:35:41 -04:00
Andhavarapu Karthik
59c3e9ef10 disp: msm: sde: program ob_max_addr based on dsc native422 support
Current code does output buffer max_addr calculation based on dsc id.
Made changes to calculate ob_max_addr based on dsc native422 support.

Change-Id: I01922750f1e9d6cb45615acc1c473891fc648e5d
Signed-off-by: Andhavarapu Karthik <kartkart@codeaurora.org>
2021-05-19 16:35:41 -04:00
Jayaprakash Madisetty
59de31ea19 disp: msm: sde: increase kickoff timeout for doze usecase
This change increases the kickoff timeout in doze and
doze suspend usecases. This avoids false timeouts seen
in doze due to rscc static wakeup configured at a different
fps from actual panel TE.

Change-Id: I11c94eb40d4dbbc3d95b8268b007580599ee90fd
Signed-off-by: Jayaprakash Madisetty <jmadiset@codeaurora.org>
2021-05-19 16:35:41 -04:00
Mahadevan
a55a3dfe2a disp: msm: avoid deadlock by prepending connection_mutex
Commit caused by dpms on may use extra  modeset lock on
connection_mutex before msm_atomic_commit, so to avoid
deadlock, make the modeset lock within msm_atomic_commit
to be used before the waiting for pending_crtcs_event.

Change-Id: Ic43af0f775d87ccc1d145ead9cb2e1b65018c86f
Signed-off-by: Mahadevan <mahap@codeaurora.org>
2021-05-19 16:35:40 -04:00
Andhavarapu Karthik
78b4029179 disp: msm: sde: allow input fence status show only when kickoff in progress
Allow input fence status read only when crtc kickoff is in
progress to avoid race between status read and fence destroy.

Change-Id: I3402bfcb38940628f09f645a3cee31f821daeae9
Signed-off-by: Andhavarapu Karthik <kartkart@codeaurora.org>
2021-05-19 16:35:40 -04:00
Yashwanth
75f3403326 disp: msm: sde: add kickoff_in_progress flag in sde crtc
In dual display usecases, during pm suspend/resume,
commit is scheduled only on primary crtc thread. If idle
timeout value is very short such as in LP2 mode, it might
result in race condition due to idle pc off work getting
scheduled on its crtc thread. This change adds kickoff in
progress flag to handle such cases as crtc frame pending
count is only updated after rc kickoff.

Change-Id: Iebb331d914b23cc5eeadfeb2a488891e88b3202a
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-05-19 16:35:40 -04:00
Yashwanth
4f8792dfc6 disp: msm: sde: perform only soft reset during timeout scenarios
During wait for commit done failure cases in the current
code in video mode and command mode(posted start), global
atomic state for current crtc state will be assigned NULL
during state swap which will lead to crash while using
drm_atomic_crtc_state_for_each_plane API. Also in such
timeout cases, border color staging and kickoff being
done without any vblank wait might lead to inconsistent
state because of configuration overriding from the next
commit. Since the timeout is observed at the end of commit
cycle, only soft reset should be done here and remaining
in the next commit cycle.

Change-Id: I0d42dc27035f4f79394aeec347d797c99ed76e5f
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-05-19 16:35:40 -04:00
Yashwanth
8e53d758dd disp: msm: sde: add ctl reset during wait for commit done timeout
During one of the DP timeout usecases, flush doesn't take
effect due to vid vblank wait failure. As a result, smmu
faults are observed because of fetching the previously
staged planes. This change adds ctl reset in the same
DP atomic commit context to recover and avoid
smmu faults.

Change-Id: I2f9aceca56e27f140607317f7596d6fe0d908af8
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-05-19 16:35:40 -04:00
Yashwanth
e96e5bd074 disp: msm: sde: add pending ctl recovery mask in sde_kms
This change adds pending ctl recovery mask in sde kms
structure to check if there are any ctl paths pending
for recovery and stages only border fill during such
conditions to avoid device crash. Below is the issue
sequence observed during the crash:

1) On one of the ctl path, flush didn't take effect and
flush bits are still pending.

2) It was a NULL flush and last good flush on that
interface has DMA2 pipe staged along with other pipes.

3) Different ctl path re-uses the DMA2 pipe (attached to
ctl path in #1) causing wr_ptr timeout followed by
ppdone timeout.

Change-Id: I07eb9f2fe41f59963dc27655c551c05abe240392
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-05-19 16:35:40 -04:00
qctecmdr
98ba50ccf2 Merge "disp: msm: sde: correct sspp top/bottom overfetch programming" 2021-05-19 09:23:00 -07:00
qctecmdr
bc3126309a Merge "disp: msm: sde: add checks when retrieving blob feature data" 2021-05-19 04:24:30 -07:00
Nilaan Gunabalachandran
cd77cb672d disp: msm: sde: fix indexing for frame data
This change adds a fix to correct indexing logic while
parsing frame data buffers and resets the count correctly.

Change-Id: Ic5a20ecd7093423ea293432c9492eb920acdd6f4
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2021-05-18 17:12:46 -04:00
Amine Najahi
dca59625e5 disp: msm: sde: add checks when retrieving blob feature data
Add checks when retrieving CP blob feature data to avoid
intermittent issue with pointer access.

Change-Id: I3a3bd870bb6a5d7bb8d13188af8cc4b9bd06acc5
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-05-17 17:56:53 -04:00
Amine Najahi
31086e9dab disp: msm: sde: use panel width for rounded corner region size checks
Use panel width variable to compare against RC region size instead
of the ROI size which can change based on the LM configuration.

Change-Id: Ia1d5f88893a55778172e6da10bb235e9c483cd38
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-05-17 14:19:04 -04:00
qctecmdr
30ce58bf9b Merge "disp: msm: sde: clear rounded corner property during last close" 2021-05-17 07:15:51 -07:00
qctecmdr
fec19468be Merge "disp: msm: sde: handle partial update use case in rounded corner" 2021-05-17 07:15:51 -07:00
qctecmdr
ff27df4031 Merge "disp: msm: sde: avoid reset topology in disable path for POMS" 2021-05-16 08:49:12 -07:00
Abhijit Kulkarni
944a0629f5 disp: msm: sde: fix cont splash pipe identification
This change fixes the continuos splash logic that identifies the
pipes staged by bootloader. The same code flow is used in trusted ui
handover as well. Existing logic was counting the pipes twice if the pipe
is staged on both the layer mixers. This change simplifies the pipes
already staged before handover by using the pipe index to convey if
it is staged or not.

Change-Id: Idb255f2077161dc3553114ac5d04e0ef743bb5ea
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2021-05-14 12:23:57 -07:00
Samantha Tran
ba95cccfec disp: msm: sde: avoid idle pc during ESD recovery
This change prevents entering into idle pc during ESD
recovery. In the event of a panel dead scenario, the panel
TE is no longer valid until display is enabled again. Until
the time display is enabled, idle pc will be blocked so
that display does not fall into then exit idle pc and
attempt to set the vsync source to this invalid panel TE.

Change-Id: Ibdc71b803d50923832f08b238a96aa28854aaea0
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-05-13 13:43:42 -07:00
Ping Li
9dc60208de disp: msm: sde: handle LTM switch in and out of dual pipe merge mode
When LTM is switching on/off, merge_mode bit value gets toggled between
0x1 (dual pipe merge configuration) and 0x0 (single pipe configuration).
It is illegal to reconfigure LTM to/from dual-pipe merge mode before
both LTM instances have completed their current workloads. This change
adds support to disable merge_mode one frame after histogram is disabled
to make sure both hardware instances are completely idle and avoid
corrupted histogram data collection.

Change-Id: I9a6b5cbfb69e8af7936749e57fe7c8f7c2703b95
Signed-off-by: Ping Li <pingli@codeaurora.org>
2021-05-12 22:28:53 -07:00
Lei Chen
918fc54fc7 disp: msm: sde: avoid reset topology in disable path for POMS
Panel operating mode switch will not change topology and it will
not trigger atomic_check for encoder to reconfigure topology.
So add this change to avoid reset topology when mode set is triggered
by POMS or non-seamless display mode switch.

Change-Id: If1afb30a97bf2695dd8849f025c20b5561fa4b82
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
2021-05-12 22:21:18 -07:00
Amine Najahi
33ecaa8d59 disp: msm: sde: clear rounded corner property during last close
Currently RC CRTC blob property is not getting cleared when
driver file descriptor is closed.

This change adds RC propety id to list of properties to
clear in last close code path

Change-Id: Iae1355a6bb51d58f119a209fbfcd8e59e470d46e
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-05-12 22:46:39 -04:00
Nilaan Gunabalachandran
c5288713ec disp: msm: sde: correct sspp top/bottom overfetch programming
Currently the top/bottom pixel extension overfetch value for
component 3 is misprogrammed with left/right value.
This change corrects the programming sequence.

Change-Id: I2e7accb48840a976645c92cb57b48c6663ae20a0
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2021-05-12 17:30:18 -04:00
Amine Najahi
07bb950003 disp: msm: sde: handle partial update use case in rounded corner
Currently, driver expects usermode to set RC blob flags based on
the RC PU use case, which causes issue when commits are staggered
and is unnecessarily reprogramming RC mask data on every PU frame.

This change uses existing driver logic to internally determine the
RC PU use case and programs the RC region enable bits accordingly.
It also adds essential logging in RC functions to help debugging.

Change-Id: I19ae59a79dbee20f357b384c12acd7d2a6a93fb4
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-05-10 15:39:10 -07:00
Prabhanjan Kandula
7c5fde4c27 disp: msm: sde: update back to back atomic check polling
In case of back to back atomic check only commit with modeset
handling, enable client to retry same commit and increase
timeout value used in polling for clear of rsvp-next.

Change-Id: Ied7acfbf0fe1f68282cfc36cdadf2d6aec6db40a
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2021-05-10 14:50:58 -07:00
Raviteja Tamatam
f47184dbf0 disp: msm: update DCE_DATA_COMPRESS bit in non-dsc case
DCE_DATA_COMPRESS BIT needs to be set to 0 before
the non-dsc frame is triggered in dsc to non-dsc switch
case.

Change-Id: I311dd3f0274d7c6b0baf2328cc50b584e4560915
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
2021-05-10 18:20:52 +05:30
Veera Sundaram Sankaran
506508e1cd disp: msm: sde: remove unused functions from sde code
Cleanup unused functions from all modules in sde driver.

Change-Id: Ia0e72ab9c281b4200a63ce35bf184e83fe1db5d2
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-05-09 11:41:54 -07:00
qctecmdr
ad30030d1a Merge "disp: msm: sde: dump DGM, CSC, and VIG gamut to sde debug dump range" 2021-05-08 16:50:13 -07:00