Vsync event timer wakeup was designed to reduced the
interrupt latency and trigger retire fence without delay.
This is fixed by avoiding CPU power collapse where MDSS
interrupt is scheduled. This change avoids extra CPU
wakeup.
Change-Id: Iadaf0e2b84fb079bbc64d9201230df54f8dbe8c1
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Video mode display keeps the MDP clocks in ON state but
disables irq during static screen to avoid cpu wakeup.
In such case, CPU pm_qos vote should also be removed
to allow LPM transition. This change triggers the
pm_qos vote based on mdp interrupt enable counts
instead of runtime_pm callback. It works for
multi-display concurrency also.
Change-Id: I7a60f3f593e409269e00abd7499c4a5756035615
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Delete destination scaler dirty bit clearing when crtc
is disabled as well as during duplicate state.
Change-Id: I4b2201c792a6750c060b2d9291d52547d8a81c15
Signed-off-by: Manoj Kumar AVM <manojavm@codeaurora.org>
Signed-off-by: obrody <obrody@codeaurora.org>
DSC encoder block disables the right DSC block on
pingpong for right-only or left-only partial update
frame trigger after a full frame update. This would
cause issue with posted-start feature as the register
is not double buffered. Avoid disabling in PingPong
block as the DSC encoder being used can be controlled
by the DSC common_mode setting.
Change-Id: I20791b925c1a6f8694673e2f8d43e5283305c131
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Fix a possible uninitialized variable usage in sde
catalog and a null pointer dereference in sde crtc.
Change-Id: I4299ade65fa7cf5bfc3d60d6d7a368d523286626
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Since drm smmu device is configured to support only 32 bit addressing,
but IOMMU expects 64 bit addressing configured device. This change
creates a dummy device with 64 bit mask for addressing to map and unmap the
shared memory for any scm call.
Change-Id: If4de87e3402e5ad914563961967f2390adda5cd5
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
Currently, when runtime_pm_suspend occurs DS property is marked
as dirty invariably if the CRTC allocated the blocks or not.
This causes atomic check failure on CRTCs without DS allocation.
Change-Id: I90287e8e283d2e80aa47627d4aa045040d76b472
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
There are some scenarios where connectors can be
null during encoder dsc disable. Update the null
check to avoid error message during these scenarios.
Change-Id: I598a644f19aecf0b7d8c989a75575329903678dd
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
Add necessary checks during the splash init to check
& execute the splash/ramdump buffer mapping/unmapping
only for the cont-splash use-case. This would help in
reusing the same path for LE VM setup during device assign,
which does not have any splash buffer.
Change-Id: I3ce168c530c7db4b14465efa3fd87889b5f99f5b
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Add plane buffer flag to get the correct aspace during
TUI VM usecase. FB_NON_SEC_DIR_TRANS plane flag is set
by user-mode to indicate S2-only non-secure buffer in
TUI VM. Return the default drm device when SMMU is not
available during get_aspace_device to make the working
seamless with/without SMMU.
Change-Id: I158dc17ba51ff4b2f302d3e7017db8ab3cfe2b84
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Add SID setup function to help programming
the SIDs for all the pipes and lutdma xin clients
based on the VM.
Change-Id: Iea598303b480b33de8750e0988129dd5cdfe7572
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Get the MDSS HW version from the device tree instead
of reading directly from the hardware register.
Change-Id: Icfb7a80c8f19312001b070a454741421fd67aae5
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
In some cases like suspend and cwb concurrencies,
the number of mixers in the sde_crtc structure
can become zero. Add support to get the number
of mixers from topology in those cases to
avoid incorrect resource allocation request.
Change-Id: Id9b82e805ff50a107ad06514b4e41c0917abdf33
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
When histogram buffer is queued by driver client, during the display
commit buffer has to be submitted to hardware. Currently driver is
waiting for previous histogram to finish before submitting the new
buffer. This can cause the histogram to be invalid, change updates the
submission logic of buffer.
Change-Id: I76b595fa96d1c2dd01c841de3cf228d4fa7fd75d
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
This changes the method of esd detection at tx timeout
from TE to panel status read for panels having status
read as default method.
When ESD is triggered, even if spurious TE interrupt fires
after resetting the panel gpio, driver correctly follows
the recovery after esd failure.
Change-Id: Ib33537319f128c038f5774829dfd09bab9664fea
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Resource reservation of an atomic state should be cleared
irrespective of the state of a display. This change relaxes
the encoder - connector chain up check as this may not be
available during a modeset disable outputs scenario.
Change-Id: I8a51973b7c77787ff19d894458a1b73580b93de2
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
Add support for all 4LM topologies in new DCE encoder framework.
This change also aligns with the new way of checking topology
information.
Change-Id: I20785c96569fd07cbd8016d244a7e4c929bfa071
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Increase the maximum number of mixers per crtc to 4 to
support 4LM use case. This change also increases the number
of data path to 4 to support 4LM in continuous splash handoff.
Change-Id: I4655017dcb405fad69513bebb8fd7f848fc5873d
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Lower the cyclomatic complexity for this function by splitting
the work into helper functions.
Change-Id: Ib69f542701009f5b8f5d4f7462ba84a5ab116c1b
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Currently mixer calculation does not take the number of LMs into
consideration when it is greater than 2. This changes adjusts mixer
count for 4LM use cases based on maximum clock and pipe width.
Change-Id: I05631dee3beadaa0d50548282a539835bcb548c0
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Reserve LM in the sequence of primary-peer and then
primary-peer again until all required LM are reserved.
Searching sequence will not change for single/dual LM
reservation. For single LM reservation it will return
right after the first primary LM is found. For dual LM
reservation it will return after the first primary-peer
pair is found.
The logic can also work for triple/quad or any number
of LM reservetion and make sure that all the reserved
LMs are in pairs except the last one if total LM number
is odd.
Change-Id: Ia28bb64fedeb43430039775051943d751259a3d2
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Signed-off-by: satbir singh <satbsing@codeaurora.org>
Signed-off-by: Xiaowen Wu <wxiaowen@codeaurora.org>
When a 4LM topology is used each plane attached to a CRTC
is tagged with a L/R layout value and an offset value
depending on where destination X coordinate lands on the display.
The layout information is used to determine SSPP to LM
pair mapping and local coordinate space.
This change also handles source-split and Z-order
validation checks for planes staged on different mixer
pairs.
Change-Id: I1b20223388e65fc36a8b379ad9df23a277fcd1a5
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Add 4LM topology variants in resource manager and in drm
connector topology name property.
Change-Id: I13e6eaafe60037b48d2c9d356f668b69720cbf48
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Display is entering into mode2 since no new frames are queued,
but auto-refresh requires HW to remain active. Make sure to
cancel the timer for entering idle power collapse whenever
there's a kickoff with auto-refresh feature enabled.
Change-Id: I0ac74e514c9893c31506edc3f2d7e069ab9a3ef8
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
This change adds secure-ui blendstage support for
lahaina target.
Change-Id: If6e0f9df469e39f53329b264416ef9214ec01be9
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
This change updates resource topology mapping tables and includes
logic to compare compression types for dsc vs vdc.
Change-Id: I1735edeb07aec8ed0065f84ac0824c58158412f3
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
With posted start enabled SW no longer waits for ppdone events
unless more than one frame is in queue. HW recovery logic relied
on these waits to know when we recover from a timeout. This
change moves the HW recovery SUCCESS event signalling outside of
the wait to ensure this event is sent to user-space regardless
of the status of posted start.
Change-Id: I8896e8126284b415513499723ccf0155ee8bc6a7
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Setup blendstages is done per LM but FETCH_PIPE_ACTIVE is per CTL.
Overloading mixer blendstage setup with fetch pipe logic can lead
to HW programming errors. Refactor the logic for setting
FETCH_PIPE_ACTIVE by adding a new op that allows caller to provide
a bitmask of all pipes required to be active on this CTL. This new
logic includes support for:
- 4LM use-cases, staging pipes for all LMs within a CRTC
- Demura fetch-pipe without need for tracking via active_cfg (removed)
Also, lower the cyclomatic complexity in setup_blendstages by moving
the logic for obtaining the mixer config settings in to a helper
function.
Change-Id: I2907b359ffad5734be5b06f44919b5ddb1ef3f7c
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Currently, compression info passed to resource manager is not
valid in atomic check phase. Also in current design allocation
of msm mode info object is from stack which is huge and causing
stack overflow in continuous splash use case. This change fixes
these issues by moving mode info object to heap allocation.
Change-Id: Ifaf39b3ae59c942da5c00b82c73cb97cdaf500d3
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
In few targets, ubwc might not be supported. In those
cases, ubwc properties should not be added to crtc.
Change-Id: I57d295fca018239ae3695657963d8162d6a50df5
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
