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@@ -5018,13 +5018,16 @@ static void sde_crtc_setup_capabilities_blob(struct sde_kms_info *info,
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if (catalog->qseed_type == SDE_SSPP_SCALER_QSEED3LITE)
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sde_kms_info_add_keystr(info, "qseed_type", "qseed3lite");
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- sde_kms_info_add_keyint(info, "UBWC version", catalog->ubwc_version);
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- sde_kms_info_add_keyint(info, "UBWC macrotile_mode",
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+ if (catalog->ubwc_version) {
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+ sde_kms_info_add_keyint(info, "UBWC version",
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+ catalog->ubwc_version);
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+ sde_kms_info_add_keyint(info, "UBWC macrotile_mode",
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catalog->macrotile_mode);
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- sde_kms_info_add_keyint(info, "UBWC highest banking bit",
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+ sde_kms_info_add_keyint(info, "UBWC highest banking bit",
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catalog->mdp[0].highest_bank_bit);
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- sde_kms_info_add_keyint(info, "UBWC swizzle",
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+ sde_kms_info_add_keyint(info, "UBWC swizzle",
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catalog->mdp[0].ubwc_swizzle);
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+ }
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if (of_fdt_get_ddrtype() == LP_DDR4_TYPE)
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sde_kms_info_add_keystr(info, "DDR version", "DDR4");
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