For calculating bit rate in cphy, we multiply bit rate by a factor of
7/16 where 7 is the number of symbols and 16 is the bits per symbol.
But we are currently not considering the 7/16 factor while calculating
minimum bit clk value for command mode which is resulting in a smaller
bit rate value than the minimum bit clk.
Bit rate should always be greater than the minimum bit clk which otherwise
can lead to discrepancies. Correct minimum bit clk calculation for command
mode, by multiplying a factor of 7/16 if cphy.
Change-Id: I39b202dcafe60e2047549f84ff9388b46ae490a5
Signed-off-by: Srihitha Tangudu <quic_tangudu@quicinc.com>
This change adds support for updating danger, safe and creq LUT
configuration for WB rotation use case.
Change-Id: I01784be4ea4ac5b027258df2907f3ba745a05850
Signed-off-by: Prabhanjan Kandula <quic_pkandula@quicinc.com>
Add support for demura v2 by adding demura blocks
2 and 3 for pineapple target.
Change-Id: I9e6107480ab44853ca49e6396787378c5c70557a
Signed-off-by: Mitika Dodiya <quic_mdodiya@quicinc.com>
This change adds support for the device tree entry parsing and
programming of VBIF Qos remap settings in WB rotate use case.
Change-Id: I729abc3562b70bf85217130aebeeeabc2fca04da
Signed-off-by: Prabhanjan Kandula <quic_pkandula@quicinc.com>
As per DP HPG recommendation, controller flush mode is
set to be synchronous with a vsync. This requires a
peripheral flush to be issued for HDR SDP to be processed.
Currently in a static HDR use case, since the peripheral
flush is not issued after queueing an HDR SDP, it never
gets sent to the sink and it stays in SDR mode. This change
issues a peripheral flush on every DP commit, so that
any pending SDPs are flushed.
Change-Id: I0ed82b6cd8df33539a3067c6ad9827f74de2ed51
Signed-off-by: Nisarg Bhavsar <quic_bhavsar@quicinc.com>
When using the TU calculator for SST DSC usecase, the calculator
expects the bpp to be 24 irrespective of the actual panel bpp.
Change-Id: Ifdab2c00a2a99b4d7d7dea7eadb33bc34e3cfa8b
Signed-off-by: Rajkumar Subbiah <quic_rsubbia@quicinc.com>
When calculating the Rate Governor parameters for MST, if the
stream is compressed, the calculator expects the input bpp to be
the compressed bpp, but currently the driver is passing uncompressed
bpp. This change updates the driver to pass compressed bpp to the
calculator.
Change-Id: Iac51d75843bd0072bbe07142ac4533d841f795f5
Signed-off-by: Rajkumar Subbiah <quic_rsubbia@quicinc.com>
Add extra display driver debug events for input and output
hw-fences.
Change-Id: I32be1d25d98c510ebba5d39f8aff2a0c54144ba1
Signed-off-by: Ingrid Gallardo <quic_ingridg@quicinc.com>
Current display driver sets the hw-fences as valid even when
the speculative fence is empty. Avoid this issue by doing a
positive check and only create hw-fences if all the fences in
the speculative fence are valid.
Change-Id: Iec9636641ac9146eb651be08615e2478994c2508
Signed-off-by: Ingrid Gallardo <quic_ingridg@quicinc.com>
Move print message from error to debug for a failure that is not fatal
but can be expected when a crtc doesn't have a hw ctl, in this case
driver will handle the output fence as a sw-fence.
Change-Id: I908135dce4336b0c9ec3fa388dc9211c6df97f68
Signed-off-by: Ingrid Gallardo <quic_ingridg@quicinc.com>
Files used for HDCP ops in the driver are not included
under compile flag for HDCP. This change includes
these files under this condition which will enable DP
driver to be built even with HDCP disabled.
Change-Id: Iff3d9468d007da4342011b8e0e52f3f995425a0b
Signed-off-by: Sandeep Gangadharaiah <quic_sandgang@quicinc.com>
This change fixes printk arguments in display driver which is
found with additional compilation flags and adds the compile
flags too.
Change-Id: Ic653591db49b49b9ce1ce04e7df89216772d0e71
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>
Fix debug message arguments in sde which are found with
-Wformat-extra-args and -Wstrict-prototypes compilation
flag and add compile flags to msm compilation.
Change-Id: Ic7f30e0cab3ea16b7f2a34658262b6f51da259e9
Signed-off-by: Raviteja Tamatam <quic_travitej@quicinc.com>
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>
Introduce support for SPR V2 features. Full validation
has been performed.
Change-Id: Ia83c06b30729fef12cae014ee5ce4792236a0a8a
Signed-off-by: Christopher Braga <quic_cbraga@quicinc.com>
Add functionality to change which aux switch is used
at compile time for different targets. Add wcd939x
switch support.
Change-Id: Iced3b11733009680063790dfa8f180b19002f963
Signed-off-by: Nisarg Bhavsar <quic_bhavsar@quicinc.com>
Currently, RC is using displayh and displayv variables
which are pointing to the LM dimension on a full frame
setting. If DS is enable and HW RC was not disabled the
the full frame ROI will not match the panel resolution
and cause an invalid hardware configuration.
This change uses the height and width values coming
from the mode information when a full frame ROI is
detected.
Change-Id: I274d15cbca61076ea7e95a984f907201e97b76ec
Signed-off-by: Amine Najahi <quic_anajahi@quicinc.com>
Current code creates an output hw fence for any virtual
connector with a retire fence attached. This is a problem
for CWB, where the output-fence should be handled as a
sw-fence as current hw can only support a single hw-fence
per ctl path.
Fix this issue by adding a check to only create a retire
output hw-fence for virtual connectors that are not CWB.
Change-Id: I5863282d24ef8940b1f45c1fbd7584f91d28f0b8
Signed-off-by: Ingrid Gallardo <quic_ingridg@quicinc.com>
In MST atomic check function, add a check to ensure it's a disable call
before releasing vcpi slots to ensure atomic_release_vcpi_slots() and
atomic_find_vcpi_slots() are never called in the same atomic check
as mentioned in the kernel docs.
Change-Id: I36cf689b4d3bf9d2469a6c402b6377a667f01c12
Signed-off-by: Andrew Bartfeld <quic_abartfel@quicinc.com>
Currently the panel esd_recovery_pending flag is cleared for every mode
set. The ESD recovery completes only after the suspend and resume. Clear
the flag only during power on commit.
Change-Id: I97e370feba0aad34558e4675168b4bcb7f5901ca
Signed-off-by: Srihitha Tangudu <quic_tangudu@quicinc.com>
Currently, aux switch is enabled by usbpd handler before
handing over the control to dispaly HPD handler. However,
in some scenarios there is a chance that altmode would
directly call into display HPD handler bypassing the usbpd
handler. This would lead to aux errors since aux switch
is not enabled. This change will enable aux switch in
display HPD handler which would avoid the resulting aux
errors. This issue is a regression caused by this change
b6466ca7f597396cd2ecb3623d059435dfb0e4c6.
Change-Id: I425991ba95b22411740f88cba5ca2083d13969e1
Signed-off-by: Sandeep Gangadharaiah <quic_sandgang@quicinc.com>
Currently when there is a modeset and usermode does not disable
or reprogram the RC mask, driver will compute an invalid configuration.
This change checks the RC mask with panel resolution and disables
RC HW internally if there is a mismatch.
Change-Id: I0e6afcf38cfc9165a6c0d2c12bfbc7b2b5f2ce65
Signed-off-by: Amine Najahi <quic_anajahi@quicinc.com>
This change adds the include for <drm/drm_edid.h> required
for the display driver in kernel 6.0.
Change-Id: Ie4c765900a1ae13e1fbb56e458109b725b36748d
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>
Convert clock operation to byte2 ops to meet DISPCC requirement.
Clock unit is changed from KHZ to HZ. Added link clock parent as
freq table is no longer supported in byte2 ops.
Change-Id: Icf5a595708040e8afefecebe7f371bb832d6673e
Signed-off-by: Sandeep Gangadharaiah <quic_sandgang@quicinc.com>
Pineapple target adds support for 45deg Directional & Corner
Detection features for Qseed6. This change adds support for
enabling these features through ahb & lutdma programming,
and updates the UAPI as well.
Change-Id: I7910d840cc4e5d1a7ce9444a41e189171487dbca
Signed-off-by: Shamika Joshi <quic_shamjosh@quicinc.com>
This reverts commit 473453a8d9.
This change decouples mm driver and display driver until mm
driver compilation is enabled.
Change-Id: I1b462d059b26242b6b77b0bc6ad990d7dabcb0ac
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>
Pass sde_enc to sde_encoder_control_te instead of drm_enc,
as all callers have access to sde_enc.
Change-Id: Ic61b78c9e8d1ab2ed6e371c19a72367efbb6e5ee
Signed-off-by: Shamika Joshi <quic_shamjosh@quicinc.com>
Change adds support for storing the INTF watchdog timer long term jitter
curve state. The state before collapse is stored in wd_jitter and
restore back during power restore.
Change-Id: Id83b5cc754daea89d7844ab67b38e12199525ff8
Signed-off-by: Shamika Joshi <quic_shamjosh@quicinc.com>
