Filter fcs_err frames and pass only first fcs ok msdu payload
from ppdu to upper layer
Change-Id: Ibf739193275f4f5a5c3e786abbbaa45165b5aa13
CRs-Fixed: 2439392
Add max user_id check while accessing ppdu_info->rx_msdu_info[]
to avoid out of bound array access
Change-Id: Ifcc298d1fd8bd00db5eb2d1777a7ff5af894afe6
CRs-fixed: 2477005
1. Record hp/tp for ce dst and status ring to keep
a track of the last reaped and posted buffers.
2. Add union ce_srng_desc to record ce srng descriptor
information.
Change-Id: I6f4728893d629c60f676826bf806b725326fb83d
CRs-Fixed: 2465492
A random crash may be caused by out of range access. Add MU
user id check to prevent out of range access.
Change-Id: I531d6c03024c4a6af4e0db97ea00d0874aaef387
The current calculation of head/tail pointer for
srng gives an index in the array by skipping
entry_size dwords.
The head/tail pointers are preffered to be the
index values like in the srng registers, which
brings them in alignment with the other usage of
head/tail pointers.
Fix the calculation of head/tail pointers for srng
by avoiding the division by srng entry size.
CRs-Fixed: 2469332
Change-Id: If9a167f3fac3cb39ebe59618e9ad2224d9e54bcc
Read rssi_chain per nss per bw and from rx status TLVs
and update to host data structures.
CRs-Fixed: 2445933
Change-Id: I275e9e502a0a724410fc189ac293cadc8f2981e0
qca6018 and qca8072v2 uses the same WCSS block and the source
files of qca8074v2 shall be used for qca6018 as well
This will also ensure all fixes for qca8074v2 gets auto
propagated to qca6018 as well.
Change-Id: I2ead316c7ed16b6ee315bda05ce82d268ba04bbb
Add support to configure any HAL SRNG descriptor to
be allocated from cached memory area. This is to
optimize of CPU cycles spent on uncached
memory accesses. Also added prefetch of cached
descriptors
Change-Id: I2544e8596d48e2f5549bf687a764c16d73397545
CRs-fixed: 2267945
In case of duplicated rx descriptors from hardware,
it will hit issues in __dma_inv_range(), __qdf_nbuf_unmap_single.
Detect the duplicates, skip processing them, drop the mpdu.
CRs-Fixed: 2413816
Change-Id: I7efd4b0c1bda5578578927bb22fe9d487758897d
earlier we were extracting the tid from the rx tlvs, this
was in the last cache line of the 384 byte tlv. we are
extracting various fields from REO descriptor, now we are
also getting tid from the descriptor to avoid accessing
the last cache line of rx TLV there by avoiding one
cache miss per packet.
Change-Id: I1f4f12dca402604692ea374599add6763d68ab01
CRs-fixed: 2449706
If there's a HW duplicate rx descriptor from hardware,
it'll cause a NULL pointer issue in
__dma_inv_range in dp_rxdma_err_process.
In this case, skip procssing it as a workaround.
CRs-Fixed: 2398327
Change-Id: I5639e5fc9a3a06e6762448ec7cb2ea58d9ae8160
The following changes are made
-Yield dp_rx_process if poll time exceeds
-Yield dp_tx_comp_handler if poll time exceeds
-Interrupt statistics to track various interrupt contexts and
corresponding interrupt masks
-Add poll times histogram buckets to NAPI stats
Change-Id: I8c7a6bbbb97c7b3dd1dde6ac3a97113c433086a2
CRs-Fixed: 2423879
1) Add one counter to track the invaild TX release source
2) Capture he descriptor that caused the issue
3) Print the invalid release source
CRs-Fixed: 2380964
Change-Id: I0dc410ae2e7c9df58ef53e3f20ca7979d086659e
Observed that when IPA offload is enabled, RX packets
are not routed correctly to IPA ring. Currently only
IX0 of REO_DESTINATION_CTRL_IX registers are remapped,
which only covers 3-bit reo_destination_indication of
range 0 to 7.
Fix is to remap REO_DESTINATION_CTRL_IX2|3 registers
so that reo_destination_indication of range 16 to
31 can also be routed REO2IPA ring when IPA offload
is enabled. Upon IPA offload is disabled, save values
of IX2 and IX3 are reset back to HW.
Change-Id: I3428b450ab10076d27c7628a3729e8cec088bd94
CRs-Fixed: 2434331
Revert change "Limit maxinum nss number as 2 for MCL platform" and
align with WIN function: hal_rx_msdu_start_nss_get_8074v2().
besides, only increase rx.nss[NSS - 1] when NSS is > 0 and rx packet
type is 11N/AC/AX.
Change-Id: I0a64f00a3d252c806216cc3196e71290f111c88a
CRs-Fixed: 2429329
With this feature, using appropriate commands, link layer, network layer,
transport layer and some of the application protocols can be tagged with
the user provided tag values for easier identification of protocols. The
supported protocols today are as follows.
ARP, DHCPv4, DHCPv6, DNS over TCP (v4), DNS over TCP (v6), DNS over UDP
(v4), DNS over UDP (v6), ICMPv4, ICMPv6, TCPv4, TCPv6, UDPv4,
UDPv6, IPv4, IPv6, EAP.
Receive packets are tagged by hardware. Tags are applied after the first
matching rule. Hence it is recommended that the rules are
programmed in such a way that tags are configured from application layer
to data link layer to get expected results.
Change-Id: Ibdc2bd2b78234f482074955e89fb93f05988eaca
Modify aging timout in reo based on access category
to match cascade.
For BE, BK, VI use 100ms and VO uses 40ms.
Change-Id: I09267b6540460a13728bddc92a7e72157d6ce569
Crs-fixed: 2418294
Populate LTF size value from TLV for HE and modify
HE_LTF enum value to match with Firmware values
Change-Id: I8e5cce31cbae4aa8722050b06d89c933b74aa752
On low memory platform rx_pkt_header tlv is not subscribed to get a
savings of 128bytes in skb. This is required to reduce the skb size from
4K to 2K on 32-bit platforms. Use HTT_H2T_MSG_TYPE_RX_RING_SELECTION_CFG
message to unsubscribe rx_pkt_header tlv for rxdma ring.
Change-Id: Ie684f1ca1de9c824a869b4e13fd0ee1d068004e7
CRs-Fixed: 2408424
Do not process RX packet header TLV for low memory config profile.
Also, drop decapped frames in invalid peer processing function.
Change-Id: Ifc7721bb25d85c7e277bebf4b962d2f1bfea150c
CRs-Fixed: 2395508
Some of the print messages in HAL module come very excessively.
Use hal_verbose_debug() API to print them.
CRs-fixed: 2405028
Change-Id: I4b4754af65c00edb571de898527026b6183ef15f
In PPDU Rx stats GI value for HE displaying wrong,
because of wrong enum values. Corrected enum values
to match GI values to Tx stats.
Also LDPC shows always 0 in PPDU Rx stats for HE.
Populated LDPC value for HE case as well to display
in PPDU Rx stats.
Change-Id: I6054d3e8c8e8672bcc2d43daa8a6e2a1bc859985
Set the RING_ID_DISABLE flag for WBM_IDLE_LINK ring during
hal_srng_src_hw_init_generic.
Change-Id: I725b14a35f453e416a3721fd6c1b68ce59a8c1c0
CRs-Fixed: 2392172
Currently RING_ID_DISABLE field of the
UMAC_WBM_R0_WBM_IDLE_LINK_RING_MISC register is set to 0. In this
configuration, the producer ring may take the libery of snooping the
datastruct passing through it. This may cause 12 MSBs of the last dword
to be replaced by RING_ID field. This happens when ENTRY_SIZE of the
ring is 2.
Set RING_ID_DISABLE (=1) to avoid this snooping.
Change-Id: I40f71131f8fd27871597dd254fb37ce4614fe92a
CRs-Fixed: 2392172
Host SW should not update the cached TP pointer to HW register before
current cached TP REO entry finishes processing, otherwise there is
risk if HW HP catches up to this cached TP, but HW TP value has been
updated to (cached TP + one entry size) now, this TP REO entry might
be overwritten.
Refine it and only update TP pointer to HW when entry processing has done.
Change-Id: I54df3247745717855a67649f440c606c518efd61
CRs-Fixed: 2391658
Currently hal shadow pointers after memory allocation
are not memset to zero. In case of SMMU S1 enable when
host starts to access hal srng the random value of shadow
memory is copied to host cached values which leads to accessing
the rings even when HW has not updated to it. So zero out
the memory of hal shadow ring pointers after memory allocation.
Change-Id: I10ac6bfff957e953ee9caa15056ce3fa9d57b70e
CRs-Fixed: 2368491
As a hot fix before h\w part change, just limit maxinum nss number
to 2 for MCL platform.
CRs-Fixed: 2377796
Change-Id: Iad205804be90b6803ff2f1afa79076dde9b77013
once in a while the HW is sending a descriptor which
is already processed by host. This can be a potential HW
issue, as a WAR we are not processing such duplicate descriptors
instead increment a counter and continue with next descriptor.
Change-Id: I6c9bc6a9fb4705b42284171a32855411aa5dd73f
CRs-Fixed: 2338543
According to the ucode and mac team, the new TB-PPDU (UL OFDMA
Dat frame) from any other users using the TLV's fields below:
* PHYRX_RSSI_LEGACY (has a reception type field that is
set to UL-MU)
* PHYRX_RSSI_HT
* PHYRX_COMMON_USER_INFO (has a reception type field that is
set to UL-MU)
* PHYRX_USER_INFO (has more detailed modulation info)
* PHYRX_USER_INFO (Could be more than one)
...
* PHYRX_DATA
* PHYRX_DATA (Could be more than one)
CRs-Fixed: 2329959
Change-Id: Ib5fa1734a5525d2b2d1db8756166f259be30b9c0
This change will resolve displaying NSS value
in stats in case of HT. And also it will give
proper NSS value to calculate rate value. Modify MCS
value to match with Tx stats from firmware.
Also retain original MCS value to use in radiotap code
for HT case.
Change-Id: I4dad068262a5e9188a5935db6b2cbf8d14138e7e
Currently we are printing one single big print to dump the RX TLVS. This
is causing truncation at the QDF_TRACE level, which can accommodate only
512 bytes or so right now. Split the RX TLV print, so that it can fit
int the QDF buffer.
CRs-Fixed: 2370080
Change-Id: I1385ab0dfe2a52e34132487ac55973e291d84db5
Added missed hal_get_hw_hptp_generic
'Get HW head and tail pointer value for any ring' to ipq6018.
Change-Id: Idc4b595ab6c52558542cf6f87e36f590bf93123f
Functions hal_update_srng_hp_tp_address and hal_set_one_shadow_config
are dumping a lot of information, which is not needed.
Reduce INFO log levels to DEBUG.
Change-Id: I210cd5493d758685312b7851eb37e05ce93b6071
CRs-Fixed: 2342960
In monitor mode, the packet type is wrongly filled radiotap header as
11n when the actual incoming packet is 11b frame.
The packet type field is common for all MPDUs and is obtained from
PPDU_END_USER_STATS and hence no need to overwrite that value from the
MPDU specific TLV in the function hal_rx_mon_hw_desc_get_mpdu_status
Change-Id: I97f96e64012636f562f7ac2e4a91b63ffc7553db
CRs-Fixed: 2333915
