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Gráfico de cometimentos

58 Cometimentos

Autor(a) SHA1 Mensagem Data
George Shen
5c1c699cc1 msm: eva: Release resources after core init fail
Change-Id: Ic19fc13405c570a8747ce17df62d59d5c6d9d652
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
2023-01-13 20:52:03 -08:00
Yu SI
a605440282 msm: eva: updated AON mapping attribute for FW
updated AON mapping attribute for FW

Change-Id: I207e7aaf0413e9d71db1d7f98f99db8d28a831a8
2023-01-06 16:27:36 -08:00
Yu SI
803a412ea9 msm: eva: add AON mapping for FW
added support to map AON reg range for FW
updated clk_get return check

Change-Id: I93732f840a6354558853d6c6644b569c53fa93db
Signed-off-by: Yu SI <quic_ysi@quicinc.com>
2023-01-05 16:31:13 -08:00
George Shen
b873ee6df9 msm: eva: Support XO clock reset mutual exclusion
Using existing clock reset APIs.
Remove DSP debug level bitmask check.

Change-Id: Iab6ff6309b2d56e678b468b2137834f8931071e9
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
2023-01-04 10:37:53 -08:00
Yu SI
d9410c7653 msm: eva: power on off sequence update
update according to HPG
--added utility to asser & de-assert clk individually by name
--added xo clk reset and vote for sleep_clk
--defined more CVP_AON_WRAPPER_XXX regs in IO header
--updated power off controller sequence
--updated power on controller sequence
Debug, to move later
--clk_set_flags for mvs1c cbcr for retain_periph retain_mem

Change-Id: Ia0872270412119e4dc6c3e2b12b59862adeea0c5
Signed-off-by: Yu SI <quic_ysi@quicinc.com>
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
2023-01-02 17:03:49 -08:00
George Shen
1fb08bdc09 msm: eva: add RGE, VADL ITOF CB setting print
Dumps registers to debug FW issue in setting CBs
for CDM buffers.

Change-Id: I287f18455f2a6b2f7cebd520c73a0de84030a8e6
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
2022-11-17 12:39:07 -08:00
George Shen
d052ed9da6 msm: eva: print kdata in MSG
For presilicon debugging

Change-Id: I4fc82e1a14d8f623f237c30e3ab63877ddfb97f5
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
2022-11-10 10:01:20 -08:00
George Shen
c7a2d986df msm: eva: Fix dprintk compilation errors
Shown in recent Lanai releases

Change-Id: Ia85a57756a35f14d4426ea5ea10cd5374188a9d4
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
2022-11-07 09:57:57 -08:00
George Shen
1aed484f01 msm: eva: enabling support for data path bringup.
Add checksum support per packet type, configurable.
Add debug hook to print SID setting registers at SMMU fault.
Enable Auto-PIL.
Enable DSP interface.

Change-Id: Ie1fd2c584681b751836854667981a3c10beb56d4
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
2022-10-26 15:29:57 -07:00
George Shen
163d88795c msm: eva: Add core power on/off seq change
For Lanai

Change-Id: I06572cd9923d4b8c1565638006f01cb09af90bb5
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
2022-10-19 15:41:40 -07:00
Yu SI
7597271dde msm: eva: synx v2 support
propagated sync v2 support from 2.0
reference 4162025

Change-Id: I3427657e21e7eda92088d828203a330ba3c86335
Signed-off-by: Yu SI <quic_ysi@quicinc.com>
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
2022-10-10 18:20:57 -07:00
George Shen
98e4c251f6 msm: eva: Increase f/w boot timeout
Add HW fence testing command.

Change-Id: I8f0b21dd678b06ace25a42fdbaf365d01b61f580
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
2022-10-05 22:57:47 -07:00
George Shen
fcbb3d87ab msm: eva: Propagate tip of 2.0 to 3.0
Add back all changes made after Aug. 3rd from
Kailua to Lanai.

Change-Id: I725b77892ab24354014b3d9bbc13d14c710aff5a
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
2022-09-27 12:52:27 -07:00
George Shen
98cd09c61f msm: eva: Fix power collapse failure
In case there is a live but unused DSP session.

Change-Id: I7dd0d7baeb89365a2d8ba6905ddffd1e5569c872
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
2022-07-08 14:59:34 -07:00
George Shen
4bfd66f039 msm: eva: Enhance SMMU fault debugability
Changes only applicable on CPU EVA path, including
- tracking packet type and buffer index for each dma_buf
- print feature config packet type
- print session properties in error cases.

Change-Id: I938cf463bee9284760145f3fd9e030b3b8134caa
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
2022-07-01 09:25:43 -07:00
George Shen
8f1f20ab0c msm: eva: Workaround of EVA ssr failure in DSP UCs
After EVA SSR and shutdown DSP driver, remove all DSP sessions.

Change-Id: I23cbd2ab3d5ec8c03ec0f4059be287c28ddb0f9a
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
2022-06-27 14:26:56 -07:00
George Shen
b129cf0b8a msm: eva: Add vm sub-driver
Add framework for future implementation.

Change-Id: I2ba070e791320e56339c632120ffa821e57db113
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
2022-04-25 20:56:22 -07:00
George Shen
81fb7564e7 msm: eva: Reuse HFI/SFR memory after SSR
Avoid realloc, remap HFI after SSR.

Change-Id: I6801b3cc33643f2936634c94cb5094fc91773348
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
2022-04-05 13:25:42 -07:00
George Shen
7a7d1cf8b5 msm: eva: Add initial drop of VM manager
First drop for common code base.

Change-Id: If0147395cc946f1cad69c270226b0ff20e11b6ef
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
2022-04-04 10:01:35 -07:00
George Shen
7cc6e333d2 msm: eva: Use rate limited printk API
Avoid potential system level RT throttling issue.

Change-Id: I0fbe198957ef9e5c21435fef2c6e8b6df551da5b
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
2022-03-18 15:26:02 -07:00
George Shen
26396dd79a msm: eva: Enable EVA power colapse
Remove temporary changes for RUMI bring up.

Change-Id: Ibad6025fcc9b18d062cd46bf33f6c7e051dbf91d
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
2022-02-17 10:08:39 -08:00
George Shen
6ca205da54 msm: eva: Enable all feature dependencies
Except minidump for kailua.

Change-Id: I8e0d5fe57f05a027f47088111811f362f7bf0c2f
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
2022-01-05 11:07:23 -08:00
George Shen
364e984422 msm: eva: Extend timeout to wait for F/W boot
Only applicable on Pre-sil platform. Restore silicon setting later.

Change-Id: Ib1e3f4e3a5de7521e7bb36540fe8bc2c6a4342ee
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
2021-12-29 12:20:48 -08:00
George Shen
250bb8b4e1 msm: eva: Propagate tip of 1.0 to 2.0
For Kailua SoD bring up.

Change-Id: I69e41850b55c688caf40f2066ed2628c2df274a3
Signed-off-by: George Shen <quic_sqiao@quicinc.com>
2021-11-28 14:51:51 -08:00
Yu SI
4981885760 msm: eva: merged tip from eva-kernel.lnx.1.0
merged tip source code from eva-kernel.lnx.1.0,
and verify the promotion flow.

Change-Id: I031508fd8a23995a166506f3d190e5e228eb13c2
Signed-off-by: Yu SI <ysi@codeaurora.org>
2021-10-27 18:14:30 -07:00
George Shen
2b303bbbf4 msm: eva: Validate instance before deleting
The change will avoid panic during DSP session deletion in case
an invaid instance pointer passed in. Disable suspend early
during core init.

Change-Id: I0ec1e95d17a65b26fb29c970889926d9507bf554
Signed-off-by: George Shen <sqiao@codeaurora.org>
2021-09-24 15:54:34 -07:00
George Shen
58dc151523 msm: eva: Restart EVA in case warmboot fails
Firmware cannot recover by power cycling EVA. Try cold boot.

Change-Id: I83778941f8626d4a3ee7e1f7670a64186ccde831
Signed-off-by: George Shen <sqiao@codeaurora.org>
2021-09-22 22:21:50 -07:00
George Shen
61ea9c1a38 msm: eva: Do not allow suspend during fw loading
Use kernel power management API to block suspend during fw loading.

Change-Id: I28e0c658d148ddf2bdb971b6a07242e1f1ff9a3c
Signed-off-by: George Shen <sqiao@codeaurora.org>
2021-09-22 16:37:57 -07:00
George Shen
d20d1298e2 msm: eva: reset AXI and CTRL clocks
Avoid pending transaction after EVA is power off. The transactions
may be introduced by PDX FIFO CX side pointer not reset after EVA power
collapsed. PMU can turn on AXI clock on CX side. It may trigger spurious
DDR transactions that are abnormal, in our case, the write transaction
has header, but not data.

Change-Id: I1374aa5ddf64ecc56c6c806cf096bed2761fd9a7
Signed-off-by: George Shen <sqiao@codeaurora.org>
2021-09-20 11:48:46 -07:00
George Shen
f8e8640ce2 msm: eva: Add NoC QoS setting
The setting will be target specific and used to set correct
priority of EVA DDR traffic.

Change-Id: I165a761393bf9dfb4ef08482d1439959cd46baa4
Signed-off-by: George Shen <sqiao@codeaurora.org>
2021-09-16 14:10:22 -07:00
Aniruddh Sharma
b30be7e544 msm: eva: Minidump enablement for eva
Enabled FW static dump.
Enabled VA_MD for CMD and MSG queues, both for CPU and DSP.
Enabled VA_MD for debug structs.

Change-Id: I9a5a2418620cd0608b90301eefe0726a462c1ce3
Signed-off-by: Aniruddh Sharma <anirshar@codeaurora.org>
2021-09-14 09:49:24 -07:00
George Shen
bc49527660 msm: cvp: Avoid interrupting FW after WFI
Flushing debug queue may trigger interrupt to FW. So flushing it
before Tensilica going to WFI.

Change-Id: I3b93183612439d5f499a30aadea18f0c2348ee13
Signed-off-by: George Shen <sqiao@codeaurora.org>
2021-09-13 10:27:58 -07:00
George Shen
e230150be8 msm: eva: Check files pointer before accessing it
There is a chance user process crashed when EVA is being used.
In that case, files pointer is set to NULL by kernel. Add
support of global timestamp support. Check wfi after pc ready.

Change-Id: Id01d07a79beec03e48885dd051549b5c39bc4846
Signed-off-by: George Shen <sqiao@codeaurora.org>
2021-09-09 11:12:26 -07:00
Yu SI
16375cefa4 msm: eva: reorder MMRM Dereg in release seq &cleanup
re-order the mmrm deregister call in core release sequence;
set eva mmrm client structure ptr to NULL after deregister;
re-arrange the error handling code;
in mmrm dereg check if clk enabled before call set value to 0,
since already set value to 0 once when unprepare & disable clk.

Change-Id: Ia89919e219ffda94a19b5214e91f1b3adc575086
Signed-off-by: Yu SI <ysi@codeaurora.org>
2021-08-30 00:23:34 -07:00
George Shen
3eaf705b30 msm: eva: Flush EVA CPU DDR transactions
Before power collapsing EVA subsystem.

Change-Id: I84ea3278a3229346677cc28d2aec1e62bbe5868c
Signed-off-by: George Shen <sqiao@codeaurora.org>
2021-08-23 23:17:36 -07:00
Yu SI
4b4bb300cf msm: eva: prepare enable video_cc_mvs1_clk_src
prepare and enable video_cc_mvs1_clk_src in
power on core sequence;
and disable and unprepare in power off core sequence.

Change-Id: I5558516bb54a7886e9faf9739a0743d8ad59d81b
Signed-off-by: Yu SI <ysi@codeaurora.org>
2021-08-18 17:36:44 -07:00
George Shen
27a7be7869 msm: eva: Disable LLCC during SSR
Avoid pending transactions after EVA powered off.

Change-Id: Ic18d9184b4a8dcb158671e9a151a9cd8ec9e4ef6
Signed-off-by: George Shen <sqiao@codeaurora.org>
2021-08-17 16:09:00 -07:00
Yu SI
c2d59a4698 msm: eva: set clk to 0 before mmrm deregistration
set clock value to 0 before call mmrm_client_deregister,
fixed an issue that peak cur value overshoot between SSRs.

Change-Id: I2b884614f0c9e1b19d63102277cad7b951fdd908
Signed-off-by: Yu SI <ysi@codeaurora.org>
2021-08-17 15:55:23 -07:00
George Shen
72eb20af3d msm: eva: Add SSR counter
Support configurable number of SSR tolerance before calling
BUG_ON in SMMU fault scenario.

Change-Id: I19dabbeaa1cf5be86f42a6ace62ef5da12743e79
Signed-off-by: George Shen <sqiao@codeaurora.org>
2021-08-13 13:43:45 -07:00
George Shen
27b6f5dacd msm: cvp: Update EVA power sequence
To be more compliant with programming guide.

Change-Id: I7908ed0a4a4c2baebaef0ec7dbf95ebb149683e8
Signed-off-by: George Shen <sqiao@codeaurora.org>
2021-07-07 19:52:50 -07:00
Yu SI
ce3bd72831 msm: eva: access sideband manager regs in PC
added code to access sideband manager regs
in __power_collapse,
set bit field in CVP_CPU_CS_X2RPMh before access,
and reset after.

Change-Id: I73f3528b1d49060b0b2de8c2b54515461f8d3e65
Signed-off-by: Yu SI <ysi@codeaurora.org>
2021-06-14 14:03:54 -07:00
Karthik Nagarajan
322bbdeaa3 msm: eva: Enable hangdump mode in EVA
Include new hfi packets and enable the pipeline to
dump hangdump buffers in UMD.

Change-Id: Id66538c69d3080c09c5a140dadcb0dfe87d9efc7
Signed-off-by: Karthik Nagarajan <karnagar@codeaurora.org>
2021-06-04 12:15:07 -07:00
George Shen
11a18d4d23 msm: cvp: Reduce kmd's feature dependency
Move feature configuration processing out of kmd. Relocate
feature specific code to msm_cvp_platform.c and cvp_hfi.h.

Change-Id: I425ee8b8638bd7b81c653c860f1ed1f5d95abac8
Signed-off-by: George Shen <sqiao@codeaurora.org>
2021-06-02 10:49:25 -07:00
Yu SI
077b0f11d3 msm: eva: update NOC reg offset
update offset for SIDEBANDMANAGER related reg for Waipio
temp commented code to read reg since dependency not ready.

Change-Id: If87ab1ed4b80bad9835417d6972983825f065881
Signed-off-by: Yu SI <ysi@codeaurora.org>
2021-05-25 21:50:27 -07:00
Yu SI
b78beff7ac msm: eva: re-org clock related functions
modularize clock related functions to clock source file

Change-Id: Ifcfdcd266e0bffcfff2fe74823743be3363c7494
Signed-off-by: Yu SI <ysi@codeaurora.org>
2021-05-03 19:33:14 -07:00
Yu SI
9871416e79 msm: eva: mmrm integration
integrated mmrm api
added make file and kbuild support
code ready, enable flow.

Change-Id: Ic7da142bc68e60312ee9a12128847be8ed27a685
Signed-off-by: Yu SI <ysi@codeaurora.org>
2021-03-19 12:09:28 -07:00
George Shen
bf7faee935 msm: eva: Add GCC reg mapping
For better SMMU fault debugging in future.

Change-Id: Iead03f9d701fc53690fb0b6864562e65f2cfc15f
Signed-off-by: George Shen <sqiao@codeaurora.org>
2021-03-09 09:44:22 -08:00
George Shen
8f044d707a msm: eva: Deprecate dma_buf_get_flags()
Migrate to new kernel API to retrieve buffer attributes.

Change-Id: I1163c975b8e7f666694394be90f2999eabba1e23
Signed-off-by: George Shen <sqiao@codeaurora.org>
2021-02-18 22:28:12 -08:00
George Shen
5af2b7ae77 msm: eva: Support Optical Flow in kernel
Add OF related command type for error checks. Clean up un-used
signals.

Change-Id: I2489f3fc87feb86468b24659e6752b130e2cc54d
Signed-off-by: George Shen <sqiao@codeaurora.org>
2021-02-08 12:55:16 -08:00
Yu SI
085cc3a1a8 msm: eva: feature related Waipio eva driver change
Feature related Waipio_EVA_driver_code changes

Change-Id: I49955d8b33d8c2e668555ac2a1795ea8d5710442
Signed-off-by: Yu SI <ysi@codeaurora.org>
2021-01-13 11:39:44 -08:00