msm: eva: Flush EVA CPU DDR transactions

Before power collapsing EVA subsystem.

Change-Id: I84ea3278a3229346677cc28d2aec1e62bbe5868c
Signed-off-by: George Shen <[email protected]>

msm/eva/cvp_hfi.c

@@ -3862,6 +3862,7 @@ exit:
 static int __power_off_controller(struct iris_hfi_device *device)
 {
 	u32 lpi_status, reg_status = 0, count = 0, max_count = 1000;
+	u32 sbm_ln0_low;
 
 	/* HPG 6.2.2 Step 1  */
 	__write_register(device, CVP_CPU_CS_X2RPMh, 0x3);
@@ -3873,12 +3874,12 @@ static int __power_off_controller(struct iris_hfi_device *device)
 			 __read_register(device,
 				CVP_AON_WRAPPER_MVP_NOC_LPI_STATUS);
 		reg_status = lpi_status & BIT(0);
-		/* Wait for noc lpi status to be set */
+		/* Wait for Core noc lpi status to be set */
 		usleep_range(50, 100);
 		count++;
 	}
 	dprintk(CVP_PWR,
-		"Noc: lpi_status %x noc_status %x (count %d)\n",
+		"Core Noc: lpi_status %x noc_status %x (count %d)\n",
 		lpi_status, reg_status, count);
 	if (count == max_count) {
 		u32 pc_ready, wfi_status;
@@ -3887,12 +3888,43 @@ static int __power_off_controller(struct iris_hfi_device *device)
 		pc_ready = __read_register(device, CVP_CTRL_STATUS);
 
 		dprintk(CVP_WARN,
-			"NOC not in qaccept status %x %x %x %x\n",
+			"Core NOC not in qaccept status %x %x %x %x\n",
 			reg_status, lpi_status, wfi_status, pc_ready);
 
 		__print_sidebandmanager_regs(device);
 	}
 
+	/* New addition to put CPU/Tensilica to low power */
+	reg_status = 0;
+	count = 0;
+	__write_register(device, CVP_WRAPPER_CPU_NOC_LPI_CONTROL, 0x1);
+	while (!reg_status && count < max_count) {
+		lpi_status =
+			 __read_register(device,
+				CVP_WRAPPER_CPU_NOC_LPI_STATUS);
+		reg_status = lpi_status & BIT(0);
+		/* Wait for CPU noc lpi status to be set */
+		usleep_range(50, 100);
+		count++;
+	}
+	sbm_ln0_low = __read_register(device, CVP_NOC_SBM_SENSELN0_LOW);
+	dprintk(CVP_PWR,
+		"CPU Noc: lpi_status %x noc_status %x (count %d) 0x%x\n",
+		lpi_status, reg_status, count, sbm_ln0_low);
+	if (count == max_count) {
+		u32 pc_ready, wfi_status;
+
+		wfi_status = __read_register(device, CVP_WRAPPER_CPU_STATUS);
+		pc_ready = __read_register(device, CVP_CTRL_STATUS);
+
+		dprintk(CVP_WARN,
+			"CPU NOC not in qaccept status %x %x %x %x\n",
+			reg_status, lpi_status, wfi_status, pc_ready);
+
+		__print_sidebandmanager_regs(device);
+	}
+
+
 	/* HPG 6.2.2 Step 3, debug bridge to low power BYPASSED */
 
 	/* HPG 6.2.2 Step 4, debug bridge to lpi release */

msm/eva/cvp_hfi_io.h

@@ -115,6 +115,8 @@
 #define CVP_WRAPPER_CPU_CLOCK_CONFIG	(CVP_WRAPPER_BASE_OFFS + 0x50)
 #define CVP_WRAPPER_DEBUG_BRIDGE_LPI_CONTROL	(CVP_WRAPPER_BASE_OFFS + 0x54)
 #define CVP_WRAPPER_DEBUG_BRIDGE_LPI_STATUS	(CVP_WRAPPER_BASE_OFFS + 0x58)
+#define CVP_WRAPPER_CPU_NOC_LPI_CONTROL		(CVP_WRAPPER_BASE_OFFS + 0x5C)
+#define CVP_WRAPPER_CPU_NOC_LPI_STATUS		(CVP_WRAPPER_BASE_OFFS + 0x60)
 #define CVP_WRAPPER_CORE_CLOCK_CONFIG		(CVP_WRAPPER_BASE_OFFS + 0x88)
 
 #define CVP_CTRL_INIT		CVP_CPU_CS_SCIACMD
@@ -184,6 +186,7 @@
 #define CVP_NOC_ERR_ERRLOG3_LOW_OFFS	(CVP_NOC_BASE_OFFS + 0xB8)
 #define CVP_NOC_ERR_ERRLOG3_HIGH_OFFS	(CVP_NOC_BASE_OFFS + 0xBC)
 #define CVP_NOC_SBM_SENSELN0_LOW	(CVP_NOC_BASE_OFFS + 0x300)
+#define CVP_NOC_CPU_PENDING_MASK	0x3F80000
 
 #define CVP_NOC_CORE_BASE_OFFS			0x00010000
 #define CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN0_LOW \