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164 次代码提交

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V S Ganga VaraPrasad (VARA) Adabala
bd06be0f8e Revert "asoc: codecs: lpass-cdc: remove pre ssr notifier call"
This reverts commit 90699117c0.

Signed-off-by: V S Ganga VaraPrasad (VARA) Adabala <quic_vadabala@quicinc.com>
2023-09-21 19:05:40 +05:30
Vangala, Amarnath
90699117c0 asoc: codecs: lpass-cdc: remove pre ssr notifier call
Remove the PRE_SSR blocking notifier call.
This is not required as early down event is not handled.

Change-Id: Ie448fa2af92edd484d282200cf350c6bddc5f99d
Signed-off-by: Vangala, Amarnath <quic_avangala@quicinc.com>
2023-08-28 22:37:24 +05:30
Vangala, Amarnath
a267ec5239 asoc: lpass-codec: enable TX Core clock before codec reg access
Enable the TX Core clock to enable access to lpass-cdc registers.

Change-Id: I3088e06e9e77ef24b2e4e802852cc3bb65542f5c
Signed-off-by: Vangala, Amarnath <quic_avangala@quicinc.com>
2023-07-25 09:27:58 +05:30
qctecmdr
69a087fc8e Merge "asoc: lpass-cdc: Add check for array bound overflow" 2023-06-29 01:12:50 -07:00
qctecmdr
b0ea759df3 Merge "asoc: lpass_cdc: Program FS_CTL reg based on input used" 2023-06-28 13:17:46 -07:00
Deepali Jindal
3daac9507a asoc: lpass-cdc: Add check for array bound overflow
In lpass_cdc_wsa_macro_config_compander function,
add check for wsa_sys_gain array's index to make sure
it won't go out of bound.

Change-Id: I9d8512726de959e7a0d9e875e966140d70412e25
Signed-off-by: Deepali Jindal <quic_deepjind@quicinc.com>
2023-06-22 10:53:05 +05:30
Ganapathiraju Sarath Varma
d41a40721c asoc: lpass_cdc: Program FS_CTL reg based on input used
Program WSA_DATA_FS_CTL reg based on input used(wsa rx/wsa2 rx)
and also update the channelmap based on mixer cntl.

Change-Id: I0cfac1d9b25dd1211824bcea2753bb6c1131f767
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
2023-06-13 07:57:21 -07:00
Faiz Nabi Kuchay
e460678dab soc: codecs: remove redundant WSA AIF_CPS control
Remove redundant WSA AIF_CPS control.

Change-Id: Iae150ed81acfa4013a08b90e10744e6c49b30537
Signed-off-by: Faiz Nabi Kuchay <quic_fkuchay@quicinc.com>
2023-06-11 22:50:04 -07:00
Faiz Nabi Kuchay
42973a5dfc asoc: codecs: Enable main path clk before enabling mix path
Mix path clk is gated by main path clk, as per current logic we are not
enabling main path clk for mix path use-cases.

Enable main path clk before enabling mix path for UPD dedicated backend
to work.

Change-Id: I209d1eaf25f4ef08bbd534f5ecc858e465ce7e18
Signed-off-by: Faiz Nabi Kuchay <quic_fkuchay@quicinc.com>
2023-06-06 11:39:25 -07:00
Kunlei Zhang
de2c1d0cf9 asoc: lpass-cdc: clear active channel cnt if channel is active
Clear active channel cnt if the channel has enabled.

Change-Id: I364f4253398e8d42c3d9e3d44cce7f65c5863bf7
2023-05-09 10:32:39 +08:00
Yuhui Zhao
5990a54d8e asoc: lpass-cdc: add enable check before tx mixer put
Check whether tx channel had been enabled or disabled before
tx channel set.

Change-Id: I1f2e0132f0905a53df989b5d52370c4dfdf7d99b
2023-05-04 12:10:41 -07:00
Soumya Managoli
5c3832c4a8 ASoC: lpass-cdc: Toggle WSA fs_cnt_clr bit
During spk playback and VA concurrency,
sometimes WSA CLK goes out of sync causing
VI_TX data mute. To resolve this, everytime
after WSA MCLK enable toggle fs_cnt_clr bit.

Change-Id: Ia936f1d4843890d2ae5c02b039f502941a5427b9
Signed-off-by: Soumya Managoli <quic_c_smanag@quicinc.com>
2023-04-25 23:22:33 +05:30
qctecmdr
2bb2cabe85 Merge "asoc: wcd9395: Add support for WCD9395 EAR path" 2023-03-30 08:32:56 -07:00
Phani Kumar Uppalapati
ec43052bb3 asoc: wcd9395: Add support for WCD9395 EAR path
Add support for WCD9335 EAR playback path.

Change-Id: I643beaa4d27f279621202893062419ce2a3e96ed
Signed-off-by: Phani Kumar Uppalapati <quic_phaniu@quicinc.com>
2023-03-29 22:13:16 -07:00
Yuhui Zhao
6b2a5ea4d9 asoc: lpass-cdc: add null pointer check in register_notifier func
Add null pointer check in register_notifier funcion.

Change-Id: Icba3776cbf33095dc8bdf32ed7b6c749e639a11b
2023-03-29 21:41:20 -07:00
Ganapathiraju Sarath Varma
70ea54b385 asoc: lpass-cdc : Enable wsa clks during DAPM powerup sequence
enable the wsa and wsa2 clk as per  sequence.

Change-Id: Ieefa4b6ea7aec535d940d780b0ed923483b4d3ee
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
2023-03-27 11:49:47 -07:00
Eric Rosas
2c2db12700 asoc: codec: Unmute WSA for ADIE loopback
Unmute WSA after enabling main path for
ADIE loopback cases.

Change-Id: I850aa4dbcf77371811010c1d614c6c7e94736971
Signed-off-by: Eric Rosas <quic_erosas@quicinc.com>
2023-02-28 11:13:56 -08:00
Yuhui Zhao
b78dc76483 Asoc: lpass-cdc: Synchronize lpass-cdc register macro function
lpass_cdc_register_macro can be called simultaneously by different
macros as bootup resulting in inconsistent value of
num_macros_registered. This will result in one of macro going ahead and
registering lpass-cdc component and other macro failing to register which
will cause probe of other macro to fail. Protect function with mutex lock
so that macros access it sequentially

Change-Id: I9d3811eeceb06b6a7e66d79a1b899b2c4283bb52
Signed-off-by: Yuhui Zhao <quic_yuhuzhao@quicinc.com>
2023-01-19 17:21:20 +08:00
Sam Rainey
6b5e8148d4 asoc: lpass-cdc: Fix digital volume range
Remove platform_max setting in WSA/WSA2 drivers
to correct the volume range for digital volume.

Change-Id: Ia87c9fbeacc7bbb37b02f707b5c624a4091251d9
Signed-off-by: Sam Rainey <quic_rainey@quicinc.com>
2023-01-12 10:40:21 -08:00
Prasad Kumpatla
17a7fb3f4d asoc: Add support for 11P2896MHz RX clk config
1. Update RX CLK config for 11P2896MHz.
2. Add condition to update Droop sel coeffs for 11P28MHz
   and 9P6MHz RX CLK.
3. Upate SWR port config for 44.1Khz sample rate usecase.
4. Unselect RX_TOP.SWR_CTRL(0x6AC0008) for RX CLK 11P28MHz.
5. Update HD2_CTL L/R registers as per latest seq version.

Change-Id: Ifac2c03e3d1bf522fe2a4d942341d9071a1e6239
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2023-01-11 11:19:54 +05:30
Prasad Kumpatla
d6ccee90de asoc: codec: lpass: add support to select PDM vs PCM path
add support to select PDM or PCM path in rx macro with the help
of mixer ctls.

Change-Id: I803e0bf440c1b3546cbda23e49736addb9083d92
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2023-01-06 13:38:00 +05:30
Ganapathiraju Sarath Varma
1649620274 asoc: va-macro: Enable VA_CORE_CLK for VA LPI usecases.
Use VA_CORE_CLK without LPI Enable mixer cntl for SVA usecases,
To keep usecase in LPI mode even in corner cases.

Change-Id: I45da244b8a992b1ff043ab4b401903376c5cff90
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
2022-12-21 02:58:00 -08:00
Phani Kumar Uppalapati
dc970caadb Revert "audio kernel: add null point check for lpass cdc."
This reverts commit bfbf93e9f8.

Change-Id: Id5e9e84b18e809831618639a0bf8f0497eb82bd3
Signed-off-by: Phani Kumar Uppalapati <quic_phaniu@quicinc.com>
2022-11-30 13:26:49 -08:00
qctecmdr
da4943cefd Merge "audio kernel: add null point check for lpass cdc." 2022-11-22 22:10:11 -08:00
qctecmdr
34e547a74b Merge "asoc: lpass-cdc: reset TX datapath during path teardown" 2022-11-22 07:03:43 -08:00
Phani Kumar Uppalapati
5555970830 audio-kernel: fix compilation issues for pineapple target
Fix compilation issues in audio-kernel for pineapple target.

Change-Id: I93fa4fb670989f82139dd2cd0dbe57b52ad52504
Signed-off-by: Phani Kumar Uppalapati <quic_phaniu@quicinc.com>
2022-11-18 11:58:44 -08:00
yuayang
bfbf93e9f8 audio kernel: add null point check for lpass cdc.
add null point check for lpass cdc.

Change-Id: I280d4dcb5a1e28336fd1b074231b28c398808880
2022-11-14 17:09:44 +08:00
Meng Wang
5938e32aac asoc: lpass-cdc: reset TX datapath during path teardown
When switching from 16KHz to 48KHz recording, mute issue happens.
Addd TX datapath reset during path teardown to resolve this issue.

Change-Id: I7445b397c20ce4e4968fec2326267f63dcba5a8c
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>
2022-10-28 02:35:16 -07:00
Yuhui Zhao
19b039aa73 asoc: add config files to support pineapple target
add pineapple config file to all drivers:
Kbuild, including soc/dsp/ipc

Change-Id: I2357c7c96739bd42cb8764753d2a4fd5dd1c9634
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2022-10-07 11:24:42 +05:30
Yuhui Zhao
1dacaf014f audio-kernel: Compilation fixes with "Break" and "fallthrough"
Compilation fixes with "Break" and "fallthrough".

Change-Id: Ica05d0410efc5e9dc52addcf4cd8c0253f49fada
2022-10-06 22:40:29 -07:00
Ganapathiraju Sarath Varma
8280a19ab8 asoc: lpass-cdc: Handle pbr clk based with its ref cnt.
Disable the common pbr clk register only when no one uses
RX0 and RX1 channels.

Change-Id: Ia5fab1d3e4be7d9ecb01ad0b612b9f6ef7406bea
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
2022-09-13 10:55:09 -07:00
Ganapathiraju Sarath Varma
3533e47a4d ASoC: lpass_cdc: Disable va_swr gpio on clk failure
During SSR down event,
ensure swr gpios are put to sleep even in error conditions.

Change-Id: I649d088d0bc429c9b7a02304272eaea06774ca51
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
2022-08-15 21:49:40 -07:00
Ganapathiraju Sarath Varma
dd683bb7fd asoc: lpass_cdc: Enable lpass cdc clk as per sequence
Enable the clk as per sequence.

Change-Id: I54d6981a70b218d4655514bb69ff39a7581264a2
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
2022-08-10 14:11:37 +05:30
qctecmdr
290f69973e Merge "asoc: lpass: add pm stay awake to avoid suspend" 2022-07-20 23:00:34 -07:00
Ganapathiraju Sarath Varma
c7d5b69be6 asoc: update out of bound check for comp_mode.
updated the out of bound check for comp_mode
if any such occurence happens setting it to default mode.

Change-Id: Ie4a7275d45af6a96f1a2ec4b6ece6dc7a5dca464
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
2022-07-20 12:54:13 +05:30
Prasad Kumpatla
32f0f8d96d asoc: lpass: add pm stay awake to avoid suspend
add pm stay awake before the queue delayed work to avoid the when apps suspend.

Change-Id: Iad4d55d509e800b352ac7cb8afb0824a89c80c40
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2022-07-17 18:33:21 +05:30
qctecmdr
dd26499468 Merge "lpass-cdc: apply digital unmute after PA is enabled" 2022-07-12 16:14:47 -07:00
Phani Kumar Uppalapati
35ae7a451e lpass-cdc: apply digital unmute after PA is enabled
Unmute digital volume after analog PA is enabled to reduce
pop issues.

Change-Id: Iae4a5b6df3c258e1ab9976bb0a47946c5a681b08
2022-07-11 04:25:26 -07:00
Vangala, Amarnath
e275af3979 asoc: lpass-cdc: fix the vi enable sequence
Enable the VI decimator at the end of Rx and VI enable sequence.

Change-Id: I12045c903b29d4cc830dbbfd242d805a629c0efd
Signed-off-by: Vangala, Amarnath <quic_avangala@quicinc.com>
2022-07-11 16:53:48 +05:30
Ganapathiraju Sarath Varma
e74b2a8eb5 asoc : codec : update audio path and ch_msk for VI.
Update ch_msk and audio path for VI feedback path
in lpass_wsa2 macro.

Change-Id: Ibc96fc1ad82e2e996b11af20522f35e47b94d8f0
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
2022-06-30 00:01:28 +05:30
Phani Kumar Uppalapati
3b4d649430 asoc: Use VA_CORE_CLK for SVA use-cases
Use VA_CORE_CLK without LPI Enable Mixer control
for SVA use-cases on Kalama target.

Change-Id: I0ca66b786691ab3550b6cbc4ad418f2b536c58f4
2022-06-12 13:05:29 -07:00
Prasad Kumpatla
3aa51212be asoc: lpass-cdc: fix for array out-of-bound
add fix for arry out-of-bound.

Change-Id: Ib73c41f4f9b14f21143d88b4d768285a674e5f65
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2022-06-06 11:38:52 -07:00
Ganapathiraju Sarath Varma
ddd5081752 asoc: codec: update wsa2 with wsa bat_cnfg,sys_gain,rloads.
- update wsa2 macro with wsa bat_cnfg, sys_gain,
  rloads dt cnfg.

Change-Id: Idb579b460949a61579e8e27b8f0a4f911c271090
2022-05-23 22:09:58 +05:30
Meng Wang
14b172d92c asoc: lpass-cdc: update logic to vote during ssr
After ADSP is up during SSR, core_hw_vote may fail and audio_hw_vote
may successed in lpass_cdc_runtime_resume which is caused some timing.
When getting slave device_id, as core_hw_vote is 0, it will skip reading
swr registers and return 0 which causes fail to read correct device_id.
Make this change to avoid calling lpass_cdc_runtime_resume when adsp_up
notification doesn't reach lpass_cdc.

Change-Id: I90a97e5c47bb95180a96ba1c60b462f1fa0124b7
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>
Signed-off-by: Kunlei Zhang <quic_kunleiz@quicinc.com>
2022-05-17 17:33:04 +08:00
qctecmdr
2205759439 Merge "asoc: codecs: Update WSA2 Macro to Match WSA Macro" 2022-05-16 16:12:55 -07:00
qctecmdr
401747d67f Merge "asoc: codecs: support for cps soundwire port" 2022-05-16 16:12:55 -07:00
qctecmdr
62975d84b8 Merge "asoc: codes: Update WSA Macro compander dly to 7" 2022-05-16 15:31:02 -07:00
qctecmdr
8ee1e5960e Merge "asoc: update digital_cdc_rsc_mgr_hw_vote API" 2022-05-16 14:01:02 -07:00
Vangala, Amarnath
9a5deb8cc6 asoc: codecs: support for cps soundwire port
Implement backend for CPS soundwire port in Bolero.

Change-Id: Ibbd38d067e46be1a71723de04a83bc83f0ec2925
Signed-off-by: Vangala, Amarnath <quic_avangala@quicinc.com>
2022-05-12 21:38:25 +05:30
Matthew Rice
c3cddd0b43 asoc: codecs: Update WSA2 Macro to Match WSA Macro
Propagate all changes to lpass-cdc-wsa-macro to
lpass-cdc-wsa2-macro. Leave get_channel_map alone
because it is wsa macro specific.

Change-Id: I46733a759490d488f46eda24b4006a1dec63c7cc
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-05-10 14:11:40 -07:00