Use the tracepoints to trace delayed register write, ce
tasklet scheduling latency, tx, and rx packets.
Change-Id: I63a89276177a9d0466dcb0c831eeb8e938a2bf79
CRs-Fixed: 3081870
Use chip ID and destination peer to determine the target soc
and partner vdev for Intra-BSS in MLO case.
Change-Id: I709c52e74426c5e81b50c8063cad7669c0e7002d
in some corner cases (ex: SG frames are received) we
do not decrement quota or num_pending and go and fetch
the next descriptor, chances are ring may not have valid
descriptors at that point of time hence added this sanity
check.
Change-Id: I6994cc69c35de6bed7a71adca0a1d66ed5c94d3c
Following peer stats are updated in per packet Rx path:
to_stack
multicast
broadcast
In BE architecture, HW provides the support for basic vdev stats and
hence per packet stats updation of above parameters can be done only
when enhanced stats is enabled or HW vdev offload stats is disabled.
Avoiding per packet stats updation reduces CPU load and improves KPI.
Change-Id: Id7c11c025a8464951b615a7f7b006ce61db487fc
CRs-Fixed: 3067843
In the case of RAW mode, VAP parameters encap type, dscp_to_tid map id
and cipher are not updating in bank register.
Added a API to update vdev param.
Change-Id: I702bee563e7451f403fa32292bf20680cd66e213
CRs-Fixed: 3078687
Rx patch changes for multichip MLO
1. Create ini for rx ring mask for each chip
2. Configure hash based routing for each chip based
on lmac_peer_id_msb
3. Peer setup changes to configure lmac_peer_id_msb
to enable hash based routing
4. Rx Replenish changes to provide buffers back to owner
SOC of reo ring
Change-Id: Ibbe6e81f9e62d88d9bb289a082dd14b4362252c4
Changes needed for MLO soc attach to pass chip_id,
dp_ml_context from upper layer.
This change also takes care of assigning appropriate
RBM id for IDLE link descriptors based on chip_id.
Change-Id: I8f5f08c524d91942e6e458f048700b7bdd900107
Prefetch RX HW desc, SW desc and SKB in pipeline
fasion in the first loop of RX processing.
This has improved TPUT by 200Mbps and provided a
10% gain in CPU (single core)
PINE with other optimizations: 3960Mbps @ 100% core-3
PINE + pipeline prefetch: 4130Mbps @ 90% core-3
Change-Id: I47f351601b264eb3a2b50e4154229d55da738724
Added an API to do a batch invalidation of REO descs
saw an improvement of 40 to 45 Mbps.
Note: this change is applicable only for cached
descriptors
PINE with Default driver: 3189 @ 100% core-3
PINE with skb prefetch: 3469 @ 100% core-3
PINE with skb pre + batch inv: 3506 @ 100% core-3
Change-Id: Ic2cf294972acfe5765448a18bed7e903562836c3
For IPQ products, there is 1 refill ring which is of hardware type
and host replenishes the buffers onto this ring so that hardware can
use these buffers for Rx.
In IPA offload mode, the buffer replenishment model is different from
the one mentioned above. There are 3 refill rings, out of which,
2 are software refill rings (1 for host and 1 for IPA), and last ring
is hardware ring given to FW.
Ring given to IPA is to refill the buffers after processing the
regular Rx packets and ring given to host is to refill the buffers
after processing of exception packets. Since there are 2 entities to
refill the buffers, the hardware ring given to FW multiplexes these 2
software rings and provides the buffers to hardware.
Make changes to follow above replenishment model for SDX+Pine
integration.
Change-Id: I0d9e4ec811a3023a258e0a6b9ee22ccdffcebafa
CRs-Fixed: 3049633
Tid in RX frame header may be larger than MAX TID allowed
value, this will lead a out of boundary array access and
lead to kernel crash at last. Change is aimed to do a TID
check and discard such frame when necessary.
Change-Id: Ie9e7a1816d197d05cf845e81251ef7772721b849
CRs-Fixed: 3071743
For DA MC/BC RX frame, host should not use da_idx to access soc->ast_table
as this da_idx is not valid, OB accessing might happen.
Change-Id: I5c78d869e32536effe2635e561cb6881cdc97c38
CRs-Fixed: 3072841
Currently, to set checksum enable flags in Tx descriptor
we are checking the csum_enabled flag along with stack checksum
offload request. In case of roaming from latency-critical connection
to non-latency critical connection we request stack to calculate
checksum and set csum_enabled flag to 0. For some packets which
are already queued where the stack has not calculated checksum and
csum_enabled flag is set to 0, we will not set the checksum enable
flags in Tx descriptors for those packets.
To fix the issue remove the csum_enabled flag check and directly
check if the stack has calculated checksum for those packets or not.
Change-Id: I8d7754afc3d0a33315b85b0113cd3062e5783e28
CRs-Fixed: 3070858
Repurpose the IPA tx and tx completions rings for
normal use when IPA is disabled either via config
flag or ini.
Change-Id: Ia4b6a89c73d888a217bdef40e3c05435c3bb1bb2
CRs-Fixed: 3059730
Avoid using ast_entry in intra_bss handling, instead use
da_peer_id directly from the msdu_metadata
Change-Id: Ic586f297e8e393504d7d399cff7a67c3035aa11f
sw_exception bit will be marked in reo dest ring descriptor for
FW re-injected frame, get this bit and save it in skb->cb,
this bit value can be used for FISA further check.
there is no reo_dest_indication field in reo dest ring on beryllium,
so share same cb member for sw_exception and reo_dest_indication.
Change-Id: I2321121be7dda68ed19faca177d868c7e8ba1dbf
CRs-Fixed: 3056156
Add API to get dp peer authorize state.
Also modify dp_tx_get_rbm_id_li to update rbm for IPA offload
scenario
Change-Id: I0f8cca4623a1c3b840f336aa6d67740951cb6700
Adding a nbuf and nbuf->data prefetches in 2nd loop
of Lithium datapath RX improved UDP throughput by
about 250Mbps.
PINE default driver: 3189Mbps @ 100% core-3
PINE with prefetch: 3469Mbps @ 100% core-3
Note: PINE reo ring is mapped to core-3.
Change-Id: I7f166b52c3697facdce3954994755c9c1412c1f3
Take care of the MLO peer bit indication to be
concatenated with peer_id to access the peer map
object.
Change-Id: Ia603a728101e83829a8906d1b847f42389e78ca6
CRs-Fixed: 3039326
This change includes below
1) Changes needed to increase Tx rings to 4
2) Use WBM2SW4 ring for rx error in QCN9224
3) memset srng at alloc to avoid populating RBM_id
in per packet path and enable implicit RBM
Change-Id: Icbd5ac2378273b8f3c6adc41c611e29551fff22f
wds in Beryllium is managed by hardware.
Make use of hardware managedwds and disable
the corresponding wds handling done in host
for Beryllium.
Change-Id: I39f23cb40c6c5f85ada8ce59c92ff2855bb18da3
In Beryllium the HW does the ast lookup and match
and sets the intra-bss bit in the msdu_desc_info
structure of reo_destination ring and WBM Rx release ring.
So, change the Beryllium code to make use of this
hardware assistance for intra-bss.
Change-Id: Ic7c89efc741fefe35603082309204fbe3c9a97c7
The bridge forwards the multicast packets to all the
interfaces attached the bridge.
When the STA network interface receives such packets
from bridge and send it to the AP, it is echoed back
from the BSS.
These packets are not intended for the bridge as it
will lead to looping.
Add a check to detect and drop such packets when
received back from the BSS.
Change-Id: I5a4a2a3e015df2b9c78de405d7d917216baed051
CRs-Fixed: 2997189
The following configurations are changed
- Change numer of WBM2SWRELEASE rings from 7 to 8
- Use configurable RBM value when enqueuing packets for TX. This is needed
since WBM release ring numbers do not have an easy mapping to RBM values
for HMT1.0.
Change-Id: Idcf9e48e00b7039331fc1837bb1e900b12f19eb3
CRs-Fixed: 2984362
PATCH[6/7]:
This patch consists following changes:
-Move monitor related pdev variables to struct dp_mon_pdev
-Move monitor relted soc variables to struct dp_mon_soc
-Move cookie to monitor link desc va to monitor file
-Add APIs to access monitor related variables
-Add dummy APIs to build without monitor support.
Change-Id: I032a480b1383d061f984cee3ba6b10ac7a0ff350
CRs-Fixed: 2983781
Allow all raw frames to the upper layer without checking
for port authorisation. All checks in raw mode has to be performed
by the controller in case of raw mode.
Change-Id: Ica6df24b359790fcadc9bb7bbb4d7b5084930170
The existing assertions for unmapped variable in
rx descriptor results in an undesired bug_on since
the unmapped value is 0 for active descriptors.
The fix is to modify this assertion so that bug_on will
be triggered only if the unmapped value is 1 in rx
desc.
Change-Id: I03b27e0e42ce3c42b9fa148da9258063b0209b08
CRs-Fixed: 2985248
(1)naming change in HW CC related function
(2)refinement for cookie ID generation regardless of
SPT page address 4k aligned or not
(3)move CMEM size check under cookie conversion macro
Change-Id: Ib32d802f5512e5facfa4130826406943fb3d27f1
CRs-Fixed: 2977304
Implement core DP rx processing to functions in to corresponding
architecture specific be/li rx files. Keep common utility functions
in DP common files.
Change-Id: I40083e10772fd2b6ce2f1fa9e197f2ad92d0522a
CRs-Fixed: 2891021
Move DP TX target specific functionality to dp/wifi3.0/be
and dp/wifi3.0/li folders. DP Functionality common to both lithium and
beryllium targets stays in dp/wifi3.0.
Change-Id: I3497284153e2ea30a9cb1faf05bd41422329b804
CRs-Fixed: 2891038
