WCD USB AATC does not require mech plug irq, UCSI
layer will help to get the events to process insert/remove
of AATC HS.
Change-Id: Ie1b14703605be294471303b6454f94b55e9f932d
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
On wcd939x contains only one variant. Sometimes reading
for codec variant which is giving incorrect/unsupported,
due to this incorrect mixer ctl are picked. So Wcd939x
is updated with supported variant WCD9395.
Change-Id: Ie556350b3630b6f1f76a4b2af1db795f908f13d4
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
update register name in regmap and tables.
Change-Id: Ia1da74478b51dd094da2be74d621f91cf4e22ff9
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
Extend bit-width support to 24 and 32 bit for TDM, MI2S and AUX PCM interface
Change-Id: I0c79df64881f2d96a16196e7fbef0cc177af1021
Signed-off-by: Anirudh Mahto <quic_amahto@quicinc.com>
Add register initialization for 2S battery configuration, including adding
relevant register shifts and masks.
Change-Id: Ie3bee4283aa57fb489153a3588db638a8a25719c
Signed-off-by: Sam Rainey <quic_rainey@quicinc.com>
ADC volume can support upto 27 different gain.
Current driver only supports 20. Make this change
to add more ADC volume support.
Change-Id: Ia315e15465affd5430d36637efb0cf3a12bb7b7e
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>
Clear the wcd937x interrupt ack registers in post_irq_handler.
This is needed for wcd937x, as regmap_irq is not clearing
the ack registers after the ack bits are set.
Change-Id: I105a4b423a0d01ff1bd3239e0f2d42294557ff10
Signed-off-by: Vangala, Amarnath <quic_avangala@quicinc.com>
When switching from 16KHz to 48KHz recording, mute issue happens.
Addd TX datapath reset during path teardown to resolve this issue.
Change-Id: I7445b397c20ce4e4968fec2326267f63dcba5a8c
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>
enable impedance and calculations according to wcd939x.
Change-Id: Id0c2c7ebea6941dadbe501d388bdedc265e93db6
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
Use BIAS_LEVEL_OFF trigger from ASoC to mark the wcd/wsa power
supplies to LPM (if supported).
Change-Id: I89f232f9338168b99ae03f84318c21734b592f82
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
add mux in b/w IN1/2 and RX1/2 for configuring xtalk and
compander in hph pcm sequence.
Change-Id: I5ee97017585d03e0ef83841bbccef5982d79b9d9
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
Update wcd939x api and marcro in pineapple driver
Update wcd939x macro in wcd939x driver.
Change-Id: Id87fc550e0a3aff61efee61644fd6bc15ea7c66d
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
Disable the common pbr clk register only when no one uses
RX0 and RX1 channels.
Change-Id: Ia5fab1d3e4be7d9ecb01ad0b612b9f6ef7406bea
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
add flags to avoid race conditions in on/off for digital clock ctl HPHL and EAR path.
Change-Id: I4b4fee2e90d8e1024176fdf5b36f89d219431300
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
Out of bound check for wsa dev mode.
Change-Id: I7a244b8f7a55e4ced06991ce8e945d737eac6f77
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
During SSR down event,
ensure swr gpios are put to sleep even in error conditions.
Change-Id: I649d088d0bc429c9b7a02304272eaea06774ca51
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
Enable the clk as per sequence.
Change-Id: I54d6981a70b218d4655514bb69ff39a7581264a2
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
