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asoc: wcd938x: add flags to update the digital clk b/w HPHL and EAR

add flags to avoid race conditions in on/off for digital clock ctl HPHL and EAR path.

Change-Id: I4b4fee2e90d8e1024176fdf5b36f89d219431300
Signed-off-by: Prasad Kumpatla <[email protected]>
Prasad Kumpatla 2 years ago
parent
commit
683015da66
1 changed files with 41 additions and 23 deletions
  1. 41 23
      asoc/codecs/wcd938x/wcd938x.c

+ 41 - 23
asoc/codecs/wcd938x/wcd938x.c

@@ -80,6 +80,8 @@ enum {
 	WCD_ADC2_MODE,
 	WCD_ADC3_MODE,
 	WCD_ADC4_MODE,
+        WCD_HPHL_EN,
+        WCD_EAR_EN,
 };
 
 enum {
@@ -787,10 +789,13 @@ static int wcd938x_codec_ear_dac_event(struct snd_soc_dapm_widget *w,
 			snd_soc_component_update_bits(component,
 				WCD938X_DIGITAL_CDC_DIG_CLK_CTL, 0x04, 0x00);
 		} else {
-			snd_soc_component_update_bits(component,
-				WCD938X_DIGITAL_CDC_HPH_GAIN_CTL, 0x04, 0x00);
-			snd_soc_component_update_bits(component,
-				WCD938X_DIGITAL_CDC_DIG_CLK_CTL, 0x01, 0x00);
+			if (!(test_bit(WCD_HPHL_EN, &wcd938x->status_mask))) {
+				snd_soc_component_update_bits(component,
+					WCD938X_DIGITAL_CDC_HPH_GAIN_CTL, 0x04, 0x00);
+					snd_soc_component_update_bits(component,
+						WCD938X_DIGITAL_CDC_DIG_CLK_CTL,
+						0x01, 0x00);
+			}
 			if (wcd938x->comp1_enable)
 				snd_soc_component_update_bits(component,
 					WCD938X_DIGITAL_CDC_COMP_CTL_0,
@@ -1024,6 +1029,7 @@ static int wcd938x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
 		set_bit(HPH_PA_DELAY, &wcd938x->status_mask);
 		snd_soc_component_update_bits(component,
 				WCD938X_DIGITAL_PDM_WD_CTL0, 0x07, 0x03);
+		set_bit(WCD_HPHL_EN, &wcd938x->status_mask);
 		break;
 	case SND_SOC_DAPM_POST_PMU:
 		/*
@@ -1058,12 +1064,14 @@ static int wcd938x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
 					WCD938X_IRQ_HPHL_PDM_WD_INT);
 		break;
 	case SND_SOC_DAPM_PRE_PMD:
-		if (wcd938x->update_wcd_event)
-			wcd938x->update_wcd_event(wcd938x->handle,
-						SLV_BOLERO_EVT_RX_MUTE,
-						(WCD_RX1 << 0x10 | 0x1));
-		wcd_disable_irq(&wcd938x->irq_info,
-					WCD938X_IRQ_HPHL_PDM_WD_INT);
+		if (!test_bit(WCD_EAR_EN, &wcd938x->status_mask)) {
+			if (wcd938x->update_wcd_event)
+				wcd938x->update_wcd_event(wcd938x->handle,
+							SLV_BOLERO_EVT_RX_MUTE,
+							(WCD_RX1 << 0x10 | 0x1));
+			wcd_disable_irq(&wcd938x->irq_info,
+						WCD938X_IRQ_HPHL_PDM_WD_INT);
+		}
 		if (wcd938x->update_wcd_event && wcd938x->comp1_enable)
 			wcd938x->update_wcd_event(wcd938x->handle,
 					SLV_BOLERO_EVT_RX_COMPANDER_SOFT_RST,
@@ -1112,6 +1120,7 @@ static int wcd938x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
 			snd_soc_component_update_bits(component,
 						WCD938X_LDOH_MODE,
 						0x80, 0x00);
+		clear_bit(WCD_HPHL_EN, &wcd938x->status_mask);
 		break;
 	};
 	return ret;
@@ -1209,10 +1218,12 @@ static int wcd938x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
 			snd_soc_component_update_bits(component,
 					WCD938X_DIGITAL_PDM_WD_CTL2,
 					0x01, 0x01);
-		else
+		else {
 			snd_soc_component_update_bits(component,
 					WCD938X_DIGITAL_PDM_WD_CTL0,
 					0x07, 0x03);
+			set_bit(WCD_EAR_EN, &wcd938x->status_mask);
+		}
 		if (!wcd938x->comp1_enable)
 			snd_soc_component_update_bits(component,
 				WCD938X_ANA_EAR_COMPANDER_CTL, 0x80, 0x80);
@@ -1250,12 +1261,14 @@ static int wcd938x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
 						SLV_BOLERO_EVT_RX_MUTE,
 						(WCD_RX3 << 0x10 | 0x1));
 		} else {
-			wcd_disable_irq(&wcd938x->irq_info,
-					WCD938X_IRQ_HPHL_PDM_WD_INT);
-			if (wcd938x->update_wcd_event)
-				wcd938x->update_wcd_event(wcd938x->handle,
-						SLV_BOLERO_EVT_RX_MUTE,
-						(WCD_RX1 << 0x10 | 0x1));
+			if(!test_bit(WCD_HPHL_EN, &wcd938x->status_mask)) {
+				wcd_disable_irq(&wcd938x->irq_info,
+						WCD938X_IRQ_HPHL_PDM_WD_INT);
+				if (wcd938x->update_wcd_event)
+					wcd938x->update_wcd_event(wcd938x->handle,
+							SLV_BOLERO_EVT_RX_MUTE,
+							(WCD_RX1 << 0x10 | 0x1));
+			}
 		}
 		break;
 	case SND_SOC_DAPM_POST_PMD:
@@ -1268,10 +1281,12 @@ static int wcd938x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
 			snd_soc_component_update_bits(component,
 					WCD938X_DIGITAL_PDM_WD_CTL2,
 					0x01, 0x00);
-		else
+		else {
 			snd_soc_component_update_bits(component,
 					WCD938X_DIGITAL_PDM_WD_CTL0,
 					0x07, 0x00);
+			clear_bit(WCD_EAR_EN, &wcd938x->status_mask);
+		}
 		wcd_cls_h_fsm(component, &wcd938x->clsh_info,
 			     WCD_CLSH_EVENT_POST_PA,
 			     WCD_CLSH_STATE_EAR,
@@ -1331,13 +1346,16 @@ static int wcd938x_enable_rx1(struct snd_soc_dapm_widget *w,
 			wcd938x_rx_connect_port(component, COMP_L, true);
 		break;
 	case SND_SOC_DAPM_POST_PMD:
-		wcd938x_rx_connect_port(component, HPH_L, false);
-		if (wcd938x->comp1_enable)
-			wcd938x_rx_connect_port(component, COMP_L, false);
-		wcd938x_rx_clk_disable(component);
-		snd_soc_component_update_bits(component,
+		 if (!test_bit(WCD_HPHL_EN, &wcd938x->status_mask) &&
+				!test_bit(WCD_EAR_EN, &wcd938x->status_mask)) {
+			wcd938x_rx_connect_port(component, HPH_L, false);
+			if (wcd938x->comp1_enable)
+				wcd938x_rx_connect_port(component, COMP_L, false);
+			wcd938x_rx_clk_disable(component);
+			snd_soc_component_update_bits(component,
 				WCD938X_DIGITAL_CDC_DIG_CLK_CTL,
 				0x01, 0x00);
+		}
 		break;
 	};