Add the changes to the generic HAL APIs.
The APIs generic across lithium and beryllium
architecture are kept in common HAL code.
The APIs which are generic across lithium
chipsets are moved to lithium specific files.
The APIs which are generic across beryllium
chipsets are kept in beryllium specific files.
Change-Id: Ie5e28aca5de02aa42f63b4a13fcb1cb32ffa8a28
CRs-Fixed: 2891049
Assign th HAL TX/RX ops in a function instead of assining a structure
directly. This can be later extended to have default ops for a family of
chips and then override that with chip specific ops.
This also helps the case where a new hal_soc->ops needs to be added.
The new 'op' will need to be added to only a default ops initializer
(with assumption that it applies to all chips).
Change-Id: Iefa23d14110fa5252444fad89737a3b2b2fbab6f
CRs-Fixed: 2891049
Introduce intermediate EP voting state during this transition state
access the votes only if direct writes are not possible.
Change-Id: Ib4522aef2209b4797100ca84e4e230a00e14b654
CRs-Fixed: 2954903
While Rx buffers are getting umapped from net rx context if IPA
pipes are enabled at same time from MC thread context this is
leading to race condition and IPA map/unmap is going out of sync.
To fix this introducing IPA mapping lock and IPA mapping need to
be handled with lock held.
Change-Id: I9fa71bdb6d4e4aa93fc795cc5dd472a181325991
CRs-Fixed: 2945063
Even though HP/TP updates are posted writes at CPU level, they
are getting blocked until soc comes out retention which is hogging
CPU.
To avoid this if EP is in low power state update HP/TP writes from
delayed work context. In delayed work vote for EP awake wait till it
comes out low power state and then proceed to HP/TP update.
Change-Id: I61d5795f58f25f850b5a9ad4d30e3181dba23713
CRs-Fixed: 2913495
hal_get_entrysize_from_srng returns the entry size
in dwords but the caller expects in bytes. This results
in insufficient data to be recorded for CE event.
Fix is to left shift the entry size by two bits in
hal_get_entrysize_from_srng so that the entry size
value returned is in bytes.
Change-Id: If532da7abe5ce9c293969f0052455085f18b1926
CRs-Fixed: 2935196
Add iwpriv option 34 to dump the reo rx h/w descs
in DDR for debugging. This cmd will first send cache
flush cmd to REO for all rx tids and invalidate the h/w
cache. Henceforth ensuring that the reo status tlvs and
the DDR values are in sync.
iwpriv wlan0 txrx_stats 34 0
Add fix to ensure bar frame with 2k jump err code is
processed correctly using the REO error code instead of the
REO push reason.
Change-Id: Ia05be668343f3a5d4b3262b8d6a367a50875add5
CRs-Fixed: 2895965
When a msdu scattered across multiple nbufs is received
in REO2SW ring and the remaining nbufs are not yet
available in the ring, loop in dp_rx_process is exited
without resetting the invalid bit in the ring desc cookie.
This will result in an incorrect assertion failure when
the same entry is processed the next time.
Fix is to reset the invalid bit in ring desc cookie
when the loop is exited in the above msdu scattered
scenario.
Change-Id: Ie5cfa1fb8ea1db4b7a0a4837545ecbfdfbb8719a
CRs-Fixed: 2916296
To support IPA TX two pipes, WBM2SW4 is added as second WBM2IPA TX
transfer ring.
Change-Id: Id0762003c1d91e3614b15df2bc51f90e27add43c
CRs-Fixed: 2750073
Add support to update CE srngs HP/TP in delayed manner
for QCA6750 target. This avoids busy wait in register update.
Change-Id: Id825a6fdf709187765ff823cb3015db21a024af3
CRs-Fixed: 2894094
Add wbm head/tail pointer stats to dp_txrx_stats and ring
usage percentage for all SRC and DST rings.
Stats added to the following cmd: iwpriv wlan0 txrx_stats 26 0
CRs-Fixed: 2865996
Change-Id: I7d144d87c5f3485ec9ba85f50b036b69a64e53c6
For the minidump feature, the wlan_minidump_remove function
definition is modified. So, update the function parameters
accordingly at all instances of the wlan_minidump_remove function.
Change-Id: I5a346f6cdf423ece02fb08d68e4422251af54876
CRs-Fixed: 2860435
Enable force wake recipe feature DEVICE_FORCE_WAKE_ENABLE
and disable the generic shadow register write feature
GENERIC_SHADOW_REGISTER_ACCESS_ENABLE.
Force wake recipe will be used to write to the REO remap
control registers by waking up the UMAC instead of using
shadow register writes.
Assert soc wake reg and poll on the scratch reg to check
if UMAC is awake.
Enable HIF_REG_WINDOW_SUPPORT to enable windowed reg
read/write in HIF layer.
Change-Id: Ib696e27e19a07c0084c097b95b7780b56e643c8b
CRs-Fixed: 2850590
Add delayed SRNG register writes support for Tx Ring, also add
dedicated workqueue to do the delayed Tx SRNG register writes.
Change-Id: I8dd157d341f3035e988804eab50d1ca681ab789b
CRs-Fixed: 2868989
For hastings, it has two dma rx rings, and the first
one is for spectral scan, and the second one is for CFR.
So increase the max supported rings number from 1 to
2.
Change-Id: I85500bba366a4321ebc91e92f72146dd20311d03
CRs-Fixed:
Use macros like dp_cdp_debug, dp_cdp_err, dp_cdp_info to
print logs for QDF_MODULE_ID_CDP
Change-Id: I550eefa82c3417b8bf83378d4a9c6f382098fea6
CRs-Fixed: 2855937
Currently the FW configures the mac with appropriate
offsets for rx pkt tlvs using the structure defined in
te FW and the host does not send the ring selction config
HTT message. This can create a problem when FW stops subscribing
to tlvs or changes its rx pkt tlvs offset.
Fix this by configuring the rx pkt tlv offsets via HTT
ring selection config message.
Change-Id: I1a2865f91b34dd7bda1af8651d7831097dac0bee
CRs-Fixed: 2860504
mu code is not sending frequency in top 16 bits of tlv.
this check makes sure not to check for freq 0 and still be able to use
channel to generate freq.
Change-Id: If18c400e51bc41f8fec4fd50bdd180adfd79e578
When RTPM suspended, wlan_hdd_cfg80211_stats_ext_request and
dp_peer_rxtid_stats are called to get tx rx status, dp and ring
spin_lock_bh is held, if RTPM suspended, printk happens in
hif_pm_runtime_get which consumes 1 ms. In dp_peer_rxtid_stats,
REO cmd CMD_GET_QUEUE_STATS and CMD_FLUSH_CACHE are called for each of
17 tid, so total 34 printk delayed 34 ms.
To fix it, disable prink in hif_pm_runtime_get when called in
dp_peer_rxtid_stats.
Change-Id: If043d6772e337e42a5478de17480253f45d779c6
CRs-Fixed: 2858534
Currently if the driver is in runtime suspend/suspending
state, any packet transmission will request for resume
via hif_pm_runtime_get.
Unfortunately there is a logging in the above API which
will lead to more time consumption in the NET_TX softirq
context. This can lead to other delay in processing other
softirqs in the system.
Fix this by skipping the logging in the packet transmission
path.
Change-Id: Icc9f5b67794f7666243eb059f2e07a06a987002e
CRs-Fixed: 2844126
Change hal_hw_txrx_ops struct to designated initializer syntax for
structs for 5018.
Change-Id: Ie04dc1ebaa4e4964a565416c900c55e309638261
CRs-Fixed: 2837917
Change hal_hw_txrx_ops struct to designated initializer syntax for
structs for 8074v2.
Change-Id: I06f7aad41446623bd8f28cb4de84bfb4fc1bad24
CRs-Fixed: 2837917
Change hal_hw_txrx_ops struct to designated initializer syntax for
structs for 8074v1.
Change-Id: I1c9657c3a7d642f676167a7ce1026acb6e8db056
CRs-Fixed: 2837917
Change hal_hw_txrx_ops struct to designated initializer syntax for
structs for 6750.
Change-Id: I6a6728eb9d5f7f9c3256a087726abd9a627fd14d
CRs-Fixed: 2837917
Change hal_hw_txrx_ops struct to designated initializer syntax for
structs for 6390.
Change-Id: I0dc5abcee8787977970a2956181a413eb44fa3cb
CRs-Fixed: 2837917
Change hal_hw_txrx_ops struct to designated initializer syntax for
structs for qcn9000.
Change-Id: I3144d5f184d196365e49d6afae843316fef0f1e2
CRs-Fixed: 2837917
Change hal_hw_txrx_ops struct to designated initializer syntax for
structs for 6290.
Change-Id: I33f467b411c7695a838646bd7e370a75370b898c
CRs-Fixed: 2837917
Change hal_hw_txrx_ops struct to designated initializer syntax for
structs for 6490.
Change-Id: Icd72cd5e20f1ba88920f4a2bc8e1bc714959e9b7
CRs-Fixed: 2837917
WLAN HW can still access the IPA tx doorbell address post
disable pipes if there are any pending tx completions which
could result in a NOC error.
Fix is to reset the WBM2SW ring HP addr to shadow addr in
DDR before pipes are disabled.
Change-Id: I52900eb34530388487923a887354ef8839d8c728
CRs-Fixed: 2846421
Current implementation of hal_srng_access_start() reads the ring pointer
in the same byte-order as it is written by the target. This results in
byte-order mismatch on a big-endian Host because the WLAN target is
little-endian based. For most of the srngs, the target already takes of
this by converting the ring pointer to the host-order before writing to the
DDR. But for other srngs, the Host needs to handle the endianness
conversions. Add HAL APIs to do the same.
CRs-Fixed: 2844519
Change-Id: Ieb47391ac0acc3724e854f433915dd5b1219bebe
Use cache invalidate api instead of cache_sync since
cache_sync api is not available in MIPS platform.
Change-Id: I4b8e2fc3cb9055d1c392c2f6dbe7d6be7c66031b
Change the alternate indication_0 to WBM instead of
REO2TCL. This is done such that, WBM takes care of
the of the de-linking of the link descriptors and
release the buffers to the respective WBM rings.
WBM should take care of the NULL entries if present
in link descriptor as WBM internal errors.
Change-Id: Ie084e54861bb4611a45cd724bb32d211c62f4f21
Excessive logging is detected when force wake request
command fails.
Rate limit the logs in hif_force_wake_request and
hal_write32_mb.
Change-Id: I9b1166074dfdb2d58d811571c802a75a6dbc03c5
CRs-Fixed: 2823961
Add reo ring descrptor swap in case of big endian platform.
Convert msi_data into little endian format before writing into
MSI_DATA register. Also change into little endian format while accessing
the shared LMAC registers.
Change-Id: I07f4ae4e6df4608201b63d325c2cbc37436d1592
REO remap register direct writes as part of SAP stop could
result in a NOC error if the UMAC is in low power state.
Fix is to use shadow register writes for REO remap and
WBM HP registers.
Change-Id: Ie515c3d28f4ccdd99a3757808f1ab6c5cf373e3d
CRs-Fixed: 2813105
Currently, we decrement active_work_cnt in a while loop in delayed
register worker and later on make a "allow_l1" call to enable L1ss.
The bus suspend routine depends on the value of active_work_cnt to
determine if any register writes are pending. In case there are, bus
suspend is rejected.
As a result its possible that when bus suspend happens, the
delayed worker while processing the last remaining enqueued
write, makes the active_work_cnt to 0. This will allow the bus suspend
routine to continue to disable the bus, even before the
delayed-reg-worker has called allow_l1 and run to completion. This may
lead to a NOC error while calling "allow_l1" API from
delayed-reg-worker.
Hence, move the decrement of active_work_cnt to the very end in
hal_reg_write_work function.
Change-Id: Iec602f97c953df1c6a018310fd02ab458547ce3a
CRs-fixed: 2813733
Due to recent FW changes not filtering out BAR frames, redirect these
frames to REO exception ring and handle as normal data packets.
Change-Id: I4540929fddab14de57a23f6364fc916a70057cbe
CRs-Fixed: 2795499
This change fixed compilation error about implicit-fallthrough and
pointer to in cast.
Change-Id: Iea2c25d97d8a039ed0f8083078427a8f8de70cd1
CRs-Fixed: 2814658
