qcacmn: Send ring sel cfg to configure rx pkt tlvs offset

Currently the FW configures the mac with appropriate
offsets for rx pkt tlvs using the structure defined in
te FW and the host does not send the ring selction config
HTT message. This can create a problem when FW stops subscribing
to tlvs or changes its rx pkt tlvs offset.

Fix this by configuring the rx pkt tlv offsets via HTT
ring selection config message.

Change-Id: I1a2865f91b34dd7bda1af8651d7831097dac0bee
CRs-Fixed: 2860504

dp/wifi3.0/dp_main.c

@@ -4968,6 +4968,18 @@ static QDF_STATUS dp_mon_htt_srng_setup(struct dp_soc *soc,
 }
 #endif
 
+#ifdef QCA_HOST2FW_RXBUF_RING
+static struct dp_srng *dp_get_rxdma_ring(struct dp_pdev *pdev, int lmac_id)
+{
+	return &pdev->rx_mac_buf_ring[lmac_id];
+}
+#else
+static struct dp_srng *dp_get_rxdma_ring(struct dp_pdev *pdev, int lmac_id)
+{
+	return &pdev->soc->rx_refill_buf_ring[lmac_id];
+}
+#endif
+
 /*
  * dp_rxdma_ring_config() - configure the RX DMA rings
  *
@@ -5221,10 +5233,86 @@ dp_rxdma_ring_sel_cfg(struct dp_soc *soc)
 	return status;
 }
 #else
+
 static QDF_STATUS
 dp_rxdma_ring_sel_cfg(struct dp_soc *soc)
 {
-	return QDF_STATUS_SUCCESS;
+	int i;
+	int mac_id;
+	struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
+	struct dp_srng *rx_mac_srng;
+	QDF_STATUS status = QDF_STATUS_SUCCESS;
+
+	htt_tlv_filter.mpdu_start = 1;
+	htt_tlv_filter.msdu_start = 1;
+	htt_tlv_filter.mpdu_end = 1;
+	htt_tlv_filter.msdu_end = 1;
+	htt_tlv_filter.attention = 1;
+	htt_tlv_filter.packet = 1;
+	htt_tlv_filter.packet_header = 1;
+
+	htt_tlv_filter.ppdu_start = 0;
+	htt_tlv_filter.ppdu_end = 0;
+	htt_tlv_filter.ppdu_end_user_stats = 0;
+	htt_tlv_filter.ppdu_end_user_stats_ext = 0;
+	htt_tlv_filter.ppdu_end_status_done = 0;
+	htt_tlv_filter.enable_fp = 1;
+	htt_tlv_filter.enable_md = 0;
+	htt_tlv_filter.enable_md = 0;
+	htt_tlv_filter.enable_mo = 0;
+
+	htt_tlv_filter.fp_mgmt_filter = 0;
+	htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_BA_REQ;
+	htt_tlv_filter.fp_data_filter = (FILTER_DATA_UCAST |
+					 FILTER_DATA_MCAST |
+					 FILTER_DATA_DATA);
+	htt_tlv_filter.mo_mgmt_filter = 0;
+	htt_tlv_filter.mo_ctrl_filter = 0;
+	htt_tlv_filter.mo_data_filter = 0;
+	htt_tlv_filter.md_data_filter = 0;
+
+	htt_tlv_filter.offset_valid = true;
+
+	htt_tlv_filter.rx_packet_offset = RX_PKT_TLVS_LEN;
+	htt_tlv_filter.rx_header_offset =
+				hal_rx_pkt_tlv_offset_get(soc->hal_soc);
+	htt_tlv_filter.rx_mpdu_start_offset =
+				hal_rx_mpdu_start_offset_get(soc->hal_soc);
+	htt_tlv_filter.rx_mpdu_end_offset =
+				hal_rx_mpdu_end_offset_get(soc->hal_soc);
+	htt_tlv_filter.rx_msdu_start_offset =
+				hal_rx_msdu_start_offset_get(soc->hal_soc);
+	htt_tlv_filter.rx_msdu_end_offset =
+				hal_rx_msdu_end_offset_get(soc->hal_soc);
+	htt_tlv_filter.rx_attn_offset =
+				hal_rx_attn_offset_get(soc->hal_soc);
+
+	for (i = 0; i < MAX_PDEV_CNT; i++) {
+		struct dp_pdev *pdev = soc->pdev_list[i];
+
+		if (!pdev)
+			continue;
+
+		for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
+			int mac_for_pdev =
+				dp_get_mac_id_for_pdev(mac_id, pdev->pdev_id);
+			/*
+			 * Obtain lmac id from pdev to access the LMAC ring
+			 * in soc context
+			 */
+			int lmac_id =
+				dp_get_lmac_id_for_pdev_id(soc, mac_id,
+							   pdev->pdev_id);
+
+			rx_mac_srng = dp_get_rxdma_ring(pdev, lmac_id);
+			htt_h2t_rx_ring_cfg(soc->htt_handle, mac_for_pdev,
+					    rx_mac_srng->hal_srng,
+					    RXDMA_BUF, RX_DATA_BUFFER_SIZE,
+					    &htt_tlv_filter);
+		}
+	}
+	return status;
+
 }
 #endif
 

hal/wifi3.0/hal_generic_api.h

@@ -2535,4 +2535,11 @@ static uint32_t	hal_rx_mpdu_end_offset_get_generic(void)
 {
 	return RX_PKT_TLV_OFFSET(mpdu_end_tlv);
 }
+
+#ifndef NO_RX_PKT_HDR_TLV
+static uint32_t	hal_rx_pkt_tlv_offset_get_generic(void)
+{
+	return RX_PKT_TLV_OFFSET(pkt_hdr_tlv);
+}
+#endif
 #endif /* HAL_GENERIC_API_H_ */

hal/wifi3.0/hal_internal.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  *
  * Permission to use, copy, modify, and/or distribute this software for
  * any purpose with or without fee is hereby granted, provided that the
@@ -627,6 +627,7 @@ struct hal_hw_txrx_ops {
 	uint32_t (*hal_rx_msdu_start_offset_get)(void);
 	uint32_t (*hal_rx_mpdu_start_offset_get)(void);
 	uint32_t (*hal_rx_mpdu_end_offset_get)(void);
+	uint32_t (*hal_rx_pkt_tlv_offset_get)(void);
 	void * (*hal_rx_flow_setup_fse)(uint8_t *rx_fst,
 					uint32_t table_offset,
 					uint8_t *rx_flow);

hal/wifi3.0/hal_rx.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  *
  * Permission to use, copy, modify, and/or distribute this software for
  * any purpose with or without fee is hereby granted, provided that the
@@ -3981,6 +3981,20 @@ uint32_t hal_rx_mpdu_start_offset_get(hal_soc_handle_t hal_soc_hdl)
 	return hal_soc->ops->hal_rx_mpdu_start_offset_get();
 }
 
+static inline
+uint32_t hal_rx_pkt_tlv_offset_get(hal_soc_handle_t hal_soc_hdl)
+{
+	struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
+
+	if (!hal_soc || !hal_soc->ops) {
+		hal_err("hal handle is NULL");
+		QDF_BUG(0);
+		return 0;
+	}
+
+	return hal_soc->ops->hal_rx_pkt_tlv_offset_get();
+}
+
 /**
  * hal_rx_mpdu_end_offset_get(): Get the MPDU end offset from
  * rx_pkt_tlvs structure

hal/wifi3.0/qca5018/hal_5018.c

@@ -1767,6 +1767,9 @@ struct hal_hw_txrx_ops qca5018_hal_hw_txrx_ops = {
 	.hal_rx_msdu_start_offset_get = hal_rx_msdu_start_offset_get_generic,
 	.hal_rx_mpdu_start_offset_get = hal_rx_mpdu_start_offset_get_generic,
 	.hal_rx_mpdu_end_offset_get = hal_rx_mpdu_end_offset_get_generic,
+#ifndef NO_RX_PKT_HDR_TLV
+	.hal_rx_pkt_tlv_offset_get = hal_rx_pkt_tlv_offset_get_generic,
+#endif
 	.hal_rx_flow_setup_fse = hal_rx_flow_setup_fse_5018,
 	.hal_compute_reo_remap_ix2_ix3 = hal_compute_reo_remap_ix2_ix3_5018,
 };

hal/wifi3.0/qca6290/hal_6290.c

@@ -1147,6 +1147,9 @@ struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
 	.hal_rx_msdu_start_offset_get = hal_rx_msdu_start_offset_get_generic,
 	.hal_rx_mpdu_start_offset_get = hal_rx_mpdu_start_offset_get_generic,
 	.hal_rx_mpdu_end_offset_get = hal_rx_mpdu_end_offset_get_generic,
+#ifndef NO_RX_PKT_HDR_TLV
+	.hal_rx_pkt_tlv_offset_get = hal_rx_pkt_tlv_offset_get_generic,
+#endif
 	.hal_compute_reo_remap_ix2_ix3 = hal_compute_reo_remap_ix2_ix3_6290,
 };
 

hal/wifi3.0/qca6390/hal_6390.c

@@ -1202,6 +1202,9 @@ struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
 	.hal_rx_msdu_start_offset_get = hal_rx_msdu_start_offset_get_generic,
 	.hal_rx_mpdu_start_offset_get = hal_rx_mpdu_start_offset_get_generic,
 	.hal_rx_mpdu_end_offset_get = hal_rx_mpdu_end_offset_get_generic,
+#ifndef NO_RX_PKT_HDR_TLV
+	.hal_rx_pkt_tlv_offset_get = hal_rx_pkt_tlv_offset_get_generic,
+#endif
 	.hal_compute_reo_remap_ix2_ix3 = hal_compute_reo_remap_ix2_ix3_6390,
 };
 

hal/wifi3.0/qca6490/hal_6490.c

@@ -1791,6 +1791,9 @@ struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
 	.hal_rx_msdu_start_offset_get = hal_rx_msdu_start_offset_get_generic,
 	.hal_rx_mpdu_start_offset_get = hal_rx_mpdu_start_offset_get_generic,
 	.hal_rx_mpdu_end_offset_get = hal_rx_mpdu_end_offset_get_generic,
+#ifndef NO_RX_PKT_HDR_TLV
+	.hal_rx_pkt_tlv_offset_get = hal_rx_pkt_tlv_offset_get_generic,
+#endif
 	.hal_rx_flow_setup_fse = hal_rx_flow_setup_fse_6490,
 	.hal_compute_reo_remap_ix2_ix3 = hal_compute_reo_remap_ix2_ix3_6490,
 	.hal_rx_msdu_get_reo_destination_indication =

hal/wifi3.0/qca6750/hal_6750.c

@@ -1926,6 +1926,9 @@ struct hal_hw_txrx_ops qca6750_hal_hw_txrx_ops = {
 	.hal_rx_msdu_start_offset_get = hal_rx_msdu_start_offset_get_generic,
 	.hal_rx_mpdu_start_offset_get = hal_rx_mpdu_start_offset_get_generic,
 	.hal_rx_mpdu_end_offset_get = hal_rx_mpdu_end_offset_get_generic,
+#ifndef NO_RX_PKT_HDR_TLV
+	.hal_rx_pkt_tlv_offset_get = hal_rx_pkt_tlv_offset_get_generic,
+#endif
 	.hal_rx_flow_setup_fse = hal_rx_flow_setup_fse_6750,
 	.hal_compute_reo_remap_ix2_ix3 = hal_compute_reo_remap_ix2_ix3_6750,
 

hal/wifi3.0/qca8074v1/hal_8074v1.c

@@ -1327,6 +1327,9 @@ struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
 	.hal_rx_msdu_start_offset_get = hal_rx_msdu_start_offset_get_generic,
 	.hal_rx_mpdu_start_offset_get = hal_rx_mpdu_start_offset_get_generic,
 	.hal_rx_mpdu_end_offset_get = hal_rx_mpdu_end_offset_get_generic,
+#ifndef NO_RX_PKT_HDR_TLV
+	.hal_rx_pkt_tlv_offset_get = hal_rx_pkt_tlv_offset_get_generic,
+#endif
 	.hal_rx_flow_setup_fse = hal_rx_flow_setup_fse_8074v1,
 	.hal_compute_reo_remap_ix2_ix3 = hal_compute_reo_remap_ix2_ix3_8074v1,
 };

hal/wifi3.0/qca8074v2/hal_8074v2.c

@@ -1329,6 +1329,9 @@ struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
 	.hal_rx_msdu_start_offset_get = hal_rx_msdu_start_offset_get_generic,
 	.hal_rx_mpdu_start_offset_get = hal_rx_mpdu_start_offset_get_generic,
 	.hal_rx_mpdu_end_offset_get = hal_rx_mpdu_end_offset_get_generic,
+#ifndef NO_RX_PKT_HDR_TLV
+	.hal_rx_pkt_tlv_offset_get = hal_rx_pkt_tlv_offset_get_generic,
+#endif
 	.hal_rx_flow_setup_fse = hal_rx_flow_setup_fse_8074v2,
 	.hal_compute_reo_remap_ix2_ix3 = hal_compute_reo_remap_ix2_ix3_8074v2,
 };

hal/wifi3.0/qcn6122/hal_qcn6122.c

@@ -1824,6 +1824,9 @@ struct hal_hw_txrx_ops qcn6122_hal_hw_txrx_ops = {
 	.hal_rx_msdu_start_offset_get = hal_rx_msdu_start_offset_get_generic,
 	.hal_rx_mpdu_start_offset_get = hal_rx_mpdu_start_offset_get_generic,
 	.hal_rx_mpdu_end_offset_get = hal_rx_mpdu_end_offset_get_generic,
+#ifndef NO_RX_PKT_HDR_TLV
+	.hal_rx_pkt_tlv_offset_get = hal_rx_pkt_tlv_offset_get_generic,
+#endif
 	.hal_rx_flow_setup_fse = hal_rx_flow_setup_fse_6122,
 	.hal_compute_reo_remap_ix2_ix3 = hal_compute_reo_remap_ix2_ix3_6122,
 };

hal/wifi3.0/qcn9000/hal_9000.c

@@ -1849,6 +1849,9 @@ struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = {
 	.hal_rx_msdu_start_offset_get = hal_rx_msdu_start_offset_get_generic,
 	.hal_rx_mpdu_start_offset_get = hal_rx_mpdu_start_offset_get_generic,
 	.hal_rx_mpdu_end_offset_get = hal_rx_mpdu_end_offset_get_generic,
+#ifndef NO_RX_PKT_HDR_TLV
+	.hal_rx_pkt_tlv_offset_get = hal_rx_pkt_tlv_offset_get_generic,
+#endif
 	.hal_rx_flow_setup_fse = hal_rx_flow_setup_fse_9000,
 	.hal_compute_reo_remap_ix2_ix3 = hal_compute_reo_remap_ix2_ix3_9000,
 };