Commit Graph

3885 Commits

Author SHA1 Message Date
Akash Gajjar
8881c37e4a disp: msm: sde: free the allocated memory of the acl and sgl descriptor
Allocated memory for acl and sgl descriptors is not being freed.
This is causing memory leak over multiple cycles of TUI tests.
To avoid this, free The allocated memory of descriptors.

Change-Id: I9bad0563009317d2e814185a8513f363a3359f6b
Signed-off-by: Akash Gajjar <quic_agajjar@quicinc.com>
2024-03-12 12:55:47 +05:30
Akhil Jaiswal
a50a83f9ad disp: msm: sde: avoid registration of hw_fence registers for reg_dump
This change avoids registering the hw_fence block for reg_dump
on lower-end targets where hw_fence is not supported.

Change-Id: I6bf017561954a133fa94cf015f5fed80a14fc479
Signed-off-by: Akhil Jaiswal <quic_akhijais@quicinc.com>
2024-03-09 13:37:52 +05:30
qctecmdr
8b01ceb5c1 Merge "disp: msm: sde: deallocate resources if TVM initalization fails" 2024-03-07 03:20:04 -08:00
Akash Gajjar
2122339163 Revert "disp: msm: sde: avoid race on in_clone_mode flag in wb encoder"
This change reverts 'commit 13d31e5111 ("disp: msm: sde:
avoid race on in_clone_mode flag in wb encoder")'.

Change-Id: Id5818ff189a77de0eac35e0c85f3bf67857c0820
Signed-off-by: Akash Gajjar <quic_agajjar@quicinc.com>
2024-03-01 22:36:31 -08:00
Yojana Juadi
f995116812 disp: msm: sde: add mutex lock to protect wb_dev
There is null pointer dereference seen due to concurrency
of wb_get_modes from userspace and clearing of writeback
modes in wb_reset. This change acquires mutex lock to provide
exclusive access to wb_dev effectively preventing such
concurrency issues.

Change-Id: Idd38e38696c839f557b94aa9313761d4d7738902
Signed-off-by: Yojana Juadi <quic_yjuadi@quicinc.com>
Signed-off-by: Akash Gajjar <quic_agajjar@quicinc.com>
2024-02-29 09:02:51 -08:00
qctecmdr
3790db7fbd Merge "disp: msm: dsi: add dsiclk_sel support for DPHY and CPHY as per HPG" 2024-02-28 05:45:02 -08:00
Akhil Jaiswal
db089cbe45 disp: rotator: add changes to fix offsets for rotator modules
This changes includes updating the rotator register offsets
for Taro family targets.

Change-Id: I5145bd44bba13fd85dd93862b721dcf41dcc0aa4
Signed-off-by: Akhil Jaiswal <quic_akhijais@quicinc.com>
2024-02-26 11:02:47 +05:30
Akash Gajjar
437760d19d disp: msm: sde: deallocate resources if TVM initalization fails
In the TUI use case, during VM acquisition, memory and IRQ
resources are transferred from the Primary VM to the Trusted VM.
However, there may be situations where the resource
initialization on the Trusted VM fails, causing the atomic check
to fail while it still holds the resources. During VM release,
this scenario causes resource reclamation to fail on the Primary
VM. This change ensures that the acquired resources are released
if the Trusted VM resource initialization fails.

Change-Id: I5f1cfe63a3c6580e4dc3f10f36ff15d5d2432adf
Signed-off-by: Akash Gajjar <quic_agajjar@quicinc.com>
2024-02-20 20:40:43 -08:00
qctecmdr
a11f7d8f87 Merge "disp: msm: dsi: sync the command DMA packet buffer after update" 2024-02-11 23:34:55 -08:00
Ritesh Kumar
acb7915ca2 disp: msm: dsi: add dsiclk_sel support for DPHY and CPHY as per HPG
Add dsiclk_sel support for both DPHY and CPHY, update pclk_div
calculation w.r.t dsiclk_sel as per HPG for 5nm pll.

Change-Id: Ibdb116ad71bb5f2421a3fae994781f18e21a1bc0
Signed-off-by: Ritesh Kumar <quic_riteshk@quicinc.com>
Signed-off-by: Anand Tarakh <quic_atarakh@quicinc.com>
2024-02-11 21:50:03 +05:30
Anand Tarakh
c800498ce6 disp: msm: dsi: sync the command DMA packet buffer after update
Sync the command DMA packet buffer after update.

Change-Id: I01b91400bb15ab75cbb7ce3cf9adc4b64f7e923d
Signed-off-by: Anand Tarakh <quic_atarakh@quicinc.com>
2024-02-11 14:03:41 +05:30
Akash Gajjar
b93086c567 disp: msm: dsi: add check for the invalid modeset
There can be a scenario where fps change along with dynamic clock
happen in a same commit. This makes newer dynamic clock configuration
come to impact while leaving panel vblank to function as per the older
configured fps. This is invalid modeset, add validation check for the
same.

Change-Id: I32f15de5260d3abdb16a4b1c3f8eefc8bd634848
Signed-off-by: Akash Gajjar <quic_agajjar@quicinc.com>
2024-02-09 03:57:52 -08:00
qctecmdr
93cd794f99 Merge "Revert "disp: msm: sde: increase MAX_SDE_HW_BLK size"" 2024-02-05 22:15:38 -08:00
V S Ganga VaraPrasad (VARA) Adabala
57da43c805 Revert "disp: msm: sde: increase MAX_SDE_HW_BLK size"
This reverts commit 0256443205.

(cherry picked from commit 2ba765eec8).

Change-Id: Iabb29b389291a3df67a502e4e3f4ea9ec4cb026e
Signed-off-by: V S Ganga VaraPrasad (VARA) Adabala <quic_vadabala@quicinc.com>
2024-02-05 01:29:47 -08:00
qctecmdr
4bb719dfd0 Merge "disp: msm: rotator: add revision check for pitti target" 2024-02-01 04:18:17 -08:00
qctecmdr
f455211f1f Merge "disp: msm: sde: Remove lut packets for programming from ROI enable property" 2024-01-28 00:47:13 -08:00
Akhil Jaiswal
d132c7b3fc disp: msm: rotator: add revision check for pitti target
This change includes hw revision check and adds
supported color format for decoder and encoder
of offline rotator.

Change-Id: I0ff20874f756743e1d2bf6b985952b028eeef488
Signed-off-by: Akhil Jaiswal <quic_akhijais@quicinc.com>
2024-01-25 14:58:36 +05:30
Yuchao Ma
b064c29a51 disp: msm: sde: Remove lut packets for programming from ROI enable property
ROI enable is moved to VLUT property. Remove lut packets for programming
same from ROI enable property.

Change-Id: Ia10aa26d272003a31d733b44cfb61dbd7690a7f0
Signed-off-by: Yuchao Ma <quic_yuchaom@quicinc.com>
2024-01-23 00:41:36 -08:00
qctecmdr
d1b5781ecd Merge "disp: msm: dp: program the correct 5nm dp pll ssc_per2 parameter" 2024-01-22 08:30:57 -08:00
qctecmdr
caa41e12ba Merge "disp: msm: sde: clear wb mode and cached cwb encoder mask" 2024-01-22 08:30:57 -08:00
Andhavarapu Karthik
3b361d63e7 disp: msm: replace iommu_attach/detach with iommu_sid_switch
From 5.10 kernel, iommu_attach/detach_device is replaced with a call
to iommu_sid_switch.

Change-Id: I80d204d8b7a7013ad88c0c2c2e5fad316984ca8f
Signed-off-by: Andhavarapu Karthik <quic_kartkart@quicinc.com>
2024-01-19 15:03:53 +05:30
Soutrik Mukhopadhyay
1788f0e2c9 disp: msm: dp: program the correct 5nm dp pll ssc_per2 parameter
The 5nm DP pll ssc_per2 parameter is currently programmed with a
wrong value. This change will correct the value to be programmed.

Change-Id: I3d79b221e81a81ef3db5325783fdd24b55b3f029
Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com>
2024-01-18 15:41:46 +05:30
qctecmdr
564dcccc53 Merge "disp: msm: sde: add support for CWB + single LM partial update" 2024-01-17 23:18:53 -08:00
Mahadevan
d8db76b3ff disp: msm: sde: clear wb mode and cached cwb encoder mask
The issue scenario is as follows
1. A CWB commit has run and it has disabled. Composer kill is
   done.
2. If Composer starts again or another client has open DRM
   the previous cwb state is intact.
3. When userspace is trying to query wb modes, primary modes
   which are attached to wb as part of cwb commit is exposed.

This leads to commit failures if userspace is trying to trigger wb
on the same CRTC of what primary has run cwb before. This change
properly clears wb mode and the cached encoder mask to avoid commit
failures.

Change-Id: I4ca8bd2b52a980630b7fb1319bf67b718ebb2ac2
Signed-off-by: Mahadevan <quic_mahap@quicinc.com>
2024-01-17 20:35:46 +05:30
Mahadevan
fded005881 disp: msm: sde: add support for CWB + single LM partial update
In the current SW design for a CWB commit the need for 3D-Merge
and number of CWB mux which needed to tap the LMs are decided
based on number of mixers on crtc. When there is a partial update
commit in single LM these 3D-Merge and CWB mux active are used
leading to WB commit failures. This change properly check whether
3D-Merge is needed in CWB path based on number of LMs in a partial
update commit.

Change-Id: I2c838a24ad3a259923f6b26934e681cb9a5829b6
Signed-off-by: Mahadevan <quic_mahap@quicinc.com>
2024-01-11 00:40:56 -08:00
qctecmdr
1f11bde6c0 Merge "disp: msm: add bazel support for pitti target" 2024-01-10 22:40:03 -08:00
qctecmdr
c75808be68 Merge "disp: msm: sde: avoid rsvp_nxt allocation for suspend commit" 2024-01-09 23:13:11 -08:00
qctecmdr
6c2fcb0de5 Merge "disp: msm: sde: add rev checks for pitti target" 2024-01-08 05:39:27 -08:00
qctecmdr
217c457d84 Merge "disp: msm: sde: reset cwb encoder for the associated crtc" 2024-01-04 21:36:35 -08:00
Charishma Jerripothula
1a6cf4b916 disp: msm: add bazel support for pitti target
Add code compilation support for pitti target.

Change-Id: Ifa47f1f4528e6bcac7fc869182f0d2abd23dd23d
Signed-off-by: Charishma Jerripothula <quic_cjerripo@quicinc.com>
2024-01-04 23:22:56 +05:30
Gaurav LNU
cac4586b7e disp: add bazel build support for offline rotator
Add changes to support offline rotator compilation
in DDK framework.

Change-Id: I3ec0c82b35f2287d515166e25a565614675638f0
Signed-off-by: Gaurav LNU <quic_glnu@quicinc.com>
Signed-off-by: Charishma Jerripothula <quic_cjerripo@quicinc.com>
2024-01-04 23:22:50 +05:30
Gaurav LNU
cbc9f69f2a disp: add bazel build support for blair target
Add support to display-drivers modules using DDK
framework for blair.

Change-Id: I6110b4144e263054ed956497dbe956f5743315c7
Signed-off-by: Gaurav LNU <quic_glnu@quicinc.com>
2024-01-04 23:22:42 +05:30
Akhil Jaiswal
9ee92efce9 disp: msm: sde: avoid rsvp_nxt allocation for suspend commit
During suspend commit, crtc_commit thread is blocked waiting
for touch response in drm_panel_notifier_call_chain and
rsvp_nxt pointer clear in drm_atomic_state_put is pending
(>100ms wait) which was allocated in atomic_check. When
resume commit is triggered early, RM poll timeouts are seen
due to rsvp_nxt pointer is not cleared and thus causing
power on commit failures. This change avoids RM reserve
during atomic_check of suspend commit as msm_crtc_set_mode
returns early and rsvp_nxt is not used elsewhere in commit path.

Change-Id: I6d76ec7cc07f6961b909febd3d9d932b46052c17
Signed-off-by: Akhil Jaiswal <quic_akhijais@quicinc.com>
2024-01-04 23:22:37 +05:30
Charishma Jerripothula
9262701035 disp: msm: sde: skip RM reserve for primary in cwb on/off usecase
Add changes to skip RM allocation during atomic_check for dsi connectors
which can have a seamless transition during CWB usecase. When CWB gets
enabled in alternate commits N, N+2 on dsi connectors there is back to
back connectors_changed modeset and poll gets enabled for the
consecutive commit N+1, N+3 on rsvp_nxt to get cleared. This rsvp_nxt
will be cleared on drm_atomic_state_put of commit N, N+2, hence
atomic_check of commit N+1,N+3 is blocked until this time causing commit
failures.

Change-Id: I320969862b8838a70a8cd3909d244c23871eb430
Signed-off-by: Charishma Jerripothula <quic_cjerripo@quicinc.com>
2024-01-04 23:22:30 +05:30
Charishma Jerripothula
85be4c14bc disp: msm: sde: validate sspp input formats in plane atomic check
This change adds support to validate plane formats in
atomic check phase. Also, the current check is not
sufficient to distinguish between some formats like
TP10_UBWC and P010_UBWC which can result in scenarios
where unsupported formats are also detected as
supported formats. Additional checks are introduced
to make sure that this is handled properly.

Change-Id: I41ea8dc95dba93479e24a68aab0dba0a253c3eec
Signed-off-by: Charishma Jerripothula <quic_cjerripo@quicinc.com>
2024-01-04 23:22:26 +05:30
Gaurav LNU
0cca462b73 disp: msm: sync pages for buffer of type cached
synchronize scatter/gather mapping for CPU and device
for CACHED msm_objs.

Change-Id: I127e4e17d57246d1bd45a843e9c140877fe59f8d
Signed-off-by: Gaurav LNU <quic_glnu@quicinc.com>
2024-01-04 23:22:22 +05:30
Gaurav LNU
ea1d6ce681 disp: msm: sde: avoid double freeing of encoder ptr
This change fixes the double freeing of physical
encoder ptr which contains the same memory address
in case of video or command mode usecase.

Change-Id: Ic5704201785494d36142ec3065575f527e96475c
Signed-off-by: Gaurav LNU <quic_glnu@quicinc.com>
2024-01-04 23:22:19 +05:30
Gaurav LNU
e5bd17da29 disp: msm: rotator: fix typecast error
This change fix typecast error seen during
version comparison.

Change-Id: I7c3f98d45742ab4b0f5c13bd00b174507205464a
Signed-off-by: Gaurav LNU <quic_glnu@quicinc.com>
2024-01-04 23:22:15 +05:30
Vinod Polimera
3448ebeca6 disp: msm: rotator: add revision check for blair target
This change includes hw revision check and adds
supported color format for decoder and encoder
of offline rotator.

Change-Id: Ibc9271a8f56221b22ad040183f5311bfd0d2febe
Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com>
2024-01-04 23:22:11 +05:30
Mahadevan
9c3a4825b8 disp: msm: sde: avoid tx wait during DMS for targets with dsc rev2
This change removes tx_wait during DMS for targets which have
dsc_hw_rev_2. For targets with dsc_hw_rev_1, during DMS the
tx_wait is needed since DSC registers are not double buffered
and frame trigger needs to be serialized to avoid pp_timeout
issues.

Change-Id: Icf3c0e0ed0cf9369db634419cfb28fcccbe88b8b
Signed-off-by: Jayaprakash Madisetty <quic_jmadiset@quicinc.com>
Signed-off-by: Mahadevan <quic_mahap@quicinc.com>
2024-01-04 23:22:06 +05:30
Vinod Polimera
e3a8090d04 disp: rotator: remove msm_rtb.h
This change removes msm_rtb.h which is depricated as part of
kernel 6.1 and replaces writel_relaxed_no_log/read_relaxes_no_log
with writel_relaxed/readl_relaxed apis.

Change-Id: Ie0bbb2e186445e16c52be12255c4ffe39869d454
Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com>
2024-01-04 23:22:01 +05:30
Vinod Polimera
dfca0b2264 disp: rotator: update parameters for vb2 get_userptr api
This change updates the parameters needed for vb2 get_userptr
api in kernel 6.1.

Change-Id: I43fb78c701f182e57d3f016ff54d3601f0773fff
Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com>
2024-01-04 23:21:47 +05:30
Vinod Polimera
07e8012420 disp: rotator: add version.h to import kernel version related macros
This change adds the latest header where the linux kernel
version macros are defined in kernel 6.1.

Change-Id: Ie42e0c6af08bad6418e56d00ef9f65a8edb9a51d
Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com>
2024-01-04 23:21:32 +05:30
Vinod Polimera
93e48fe2de disp: rotator: handle debugfs_create_bool properly
The return type of debugfs_create_bool is changed
to void in 6.1 kernel. Add changes to handle
this accordingly.

Change-Id: I1a5413d5f769bc6102918052aa9cdce606185196
Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com>
2024-01-04 23:20:02 +05:30
Gaurav LNU
2d706273cb disp: rotator: update mapped buffer size retrieval from sg_table
This change corrects the logic of accumulated size
of mapped entries of sg table for DMA BUFFER.

Change-Id: I2baef8d438cab8314c5526aac2ea8a3227176888
Signed-off-by: Gaurav LNU <quic_glnu@quicinc.com>
Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com>
2024-01-04 23:19:56 +05:30
Gaurav LNU
fbb942c2bb disp: rotator: use proper dma buf API for cpu access unmap
This change adds support to use dma_buf_vunmap
instead of dma_buf_kunmap as the latter is
deprecated.

Change-Id: I665c410b1f75854a8840e1da8a21ba2b5cc65ad8
Signed-off-by: Gaurav LNU <quic_glnu@quicinc.com>
Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com>
2024-01-04 23:19:50 +05:30
Gaurav LNU
0256443205 disp: msm: sde: increase MAX_SDE_HW_BLK size
In the current implementation, the length of
certain dt entries like qos can take upto 36
entries for each fps value. This change
increases the size of MAX_SDE_HW_BLK to
handle such cases to support qos parsing
for targets which have multiple fps support.

Change-Id: Ie125191f731730f1a5e371930b4c15767ca5ac27
Signed-off-by: Gaurav LNU <quic_glnu@quicinc.com>
2024-01-04 23:19:43 +05:30
Gaurav LNU
0181500cc8 disp: rotator: handle debugfs_create_u64 properly
The return type of  debugfs_create_u64 is changed
to void in 5.10 kernel. Add changes to handle
this accordingly.

Change-Id: I326ae223bb4d1377d0c1c9ec7f64a5064888133c
Signed-off-by: Gaurav LNU <quic_glnu@quicinc.com>
Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com>
2024-01-04 23:19:15 +05:30
Gaurav LNU
fbfef15361 disp: rotator: use VFL_TYPE_VIDEO instead of VFL_TYPE_GRABBER
VFL_TYPE_GRABBER is renamed with VFL_TYPE_VIDEO
in v4l2 driver code. Add required changes to
handle this in rotator driver.

Change-Id: Ia4165295003867f661324bbf8a471fa1f27ddf72
Signed-off-by: Gaurav LNU <quic_glnu@quicinc.com>
Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com>
2024-01-04 23:19:05 +05:30
Gaurav LNU
985f8bc0da disp: rotator: set priority for rotator threads
Set the rotator threads priority (commit and
done) to RT.

Change-Id: Ia2db4a86efe1d3ca990cade8424a5c72b3d4595b
Signed-off-by: Gaurav LNU <quic_glnu@quicinc.com>
Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com>
2024-01-04 23:18:43 +05:30