Add changes to support odd number of dedicated-CWB.
Change-Id: I21c8521e98f6a8b5bb002f1c056afc501e7e9780
Signed-off-by: Akhil Jaiswal <quic_akhijais@quicinc.com>
In Commit N, llcc is enabled. However in Commit N+1, suspend
is triggered without a llcc disable commit. As a result, llcc
remains active, preventing ADSP from entering the island.
Change-Id: I36fd8cc8c3f8a97e18b53507749a1b639f0c0cfd
Signed-off-by: Mahadevan <quic_mahap@quicinc.com>
In the primary topology (2 2 1), during a full layer mixer
update, CWB requires two layer mixers. However, in the
scenario where Commit N has CWB enabled and uses two LMs
(Merge3D), and Commit N+1 has a single LM with partial update
Merge3D and two CWB and Merge 3D is programmed leads to commit
failure. This change addresses the issue by clearing the
existing configuration.
Change-Id: I8855d761c6eb6ad8809d94872ee961c6a721c541
Signed-off-by: Mahadevan <quic_mahap@quicinc.com>
During VTS testing, simulated multi-frame delays
are set using the EPT (Expected Present Time)
property. The test case failed at lower refresh
rates. This change extendes the EPT timeout threshold
to 10 seconds, ensuring support for multiple frame
delays.
Change-Id: I75ee2f3b27083014e560c5819ed9929a137ef8da
Signed-off-by: Mahadevan <quic_mahap@quicinc.com>
This change add support for virtual sde blocks to maintain
the layer mixer id which is used for proper allocation of
dcwb.
Change-Id: I2b21561f72dab3ef833de71ceb1fa6dac886dc04
Signed-off-by: Mahadevan <quic_mahap@quicinc.com>
Signed-off-by: Akhil Jaiswal <quic_akhijais@quicinc.com>
The issue scenario is as follows:
1. User space issues CWB commit N-1, frame got picked up and wr_ptr_irq
is received.
2. Next commit N CWB disable commit is programmed waits for N-1 wb_done
irq.
3. The kickoff count is decremented on wb_done_irq of commit N-1
and wb wait_for_idle is exited.
4. wb_frame_done irq thread execution stalled before populating fences
and commit thread execution continues.
5. wb_reset disables in_clone_mode flag, the stalled wb_done_irq thread
resumes its execution and signals the release fences on primary
CRTC.
6. Commit N-1 frame_done irq is received and release fences is
signaled again.
Userspace assumes Commit N also completed on receiving of second release
fence causing corruption in screen. This patch stores in_clone_mode
flag in wb_done_irq and only CWB retire fence is signaled.
Change-Id: I758e19178e4ba8722a01fca72d230f066831aec9
Signed-off-by: Mahadevan <quic_mahap@quicinc.com>
Signed-off-by: Akash Gajjar <quic_agajjar@quicinc.com>
This changes add checks to make sure LTM init is set
before setting VLUT.
Change-Id: Ifeeeb1ff176b2c91a2c5f43928fb9621b69585f0
Signed-off-by: Anjaneya Prasad Musunuri <quic_aprasad@quicinc.com>
This change enables the uidle feature support for palawan target.
Change-Id: I91010e4ce26dd74ea0e9367b6eee0165ee7814f7
Signed-off-by: Akash Gajjar <quic_agajjar@quicinc.com>
Destination scaler hw can be enabled and disabled runtime for
sharpness only case through QDCM.
Customer is using shared DSI solution and issue scenario is:
1) DS0 configured and enabled for INTF1 display1.
2) Suspend commit is triggered with DS0 disable configuration but
driver programming doesn't happen as crtc is not enabled.
for customer case, GDSC is not turned off due to extra vote.
3) On resume commit on INTF1 display2 with different resolution,
DS0 is not configured from userspace, but in HW,
DS0 programming is retained.
4) Due to this retained programming, DSI underflow is seen in
resume commit.
Add changes to disable dest scaler qseed opmode and merge ctrl
as part of cp crtc disable sequence.
Change-Id: Ibb39814e02870394da4c7c7318e6e2780fed9081
Signed-off-by: Jayaprakash Madisetty <quic_jmadiset@quicinc.com>
Currently we are always initializing PLL registers whenever PLL is
configured. Re-initializing PLL registers during dynamic clock switch in
case of cphy video mode is moving the PLL to some bad state resulting in
display freeze. Avoid this by restricting initialization of PLL
registers to only while turning on the PLL.
Change-Id: I09eacbb37fff4e0e91d226ac08e7d5a2bfbbfe26
Signed-off-by: Srihitha Tangudu <quic_tangudu@quicinc.com>
Allocated memory for acl and sgl descriptors is not being freed.
This is causing memory leak over multiple cycles of TUI tests.
To avoid this, free The allocated memory of descriptors.
Change-Id: I9bad0563009317d2e814185a8513f363a3359f6b
Signed-off-by: Akash Gajjar <quic_agajjar@quicinc.com>
This change avoids registering the hw_fence block for reg_dump
on lower-end targets where hw_fence is not supported.
Change-Id: I6bf017561954a133fa94cf015f5fed80a14fc479
Signed-off-by: Akhil Jaiswal <quic_akhijais@quicinc.com>
There is null pointer dereference seen due to concurrency
of wb_get_modes from userspace and clearing of writeback
modes in wb_reset. This change acquires mutex lock to provide
exclusive access to wb_dev effectively preventing such
concurrency issues.
Change-Id: Idd38e38696c839f557b94aa9313761d4d7738902
Signed-off-by: Yojana Juadi <quic_yjuadi@quicinc.com>
Signed-off-by: Akash Gajjar <quic_agajjar@quicinc.com>
This changes includes updating the rotator register offsets
for Taro family targets.
Change-Id: I5145bd44bba13fd85dd93862b721dcf41dcc0aa4
Signed-off-by: Akhil Jaiswal <quic_akhijais@quicinc.com>
In the TUI use case, during VM acquisition, memory and IRQ
resources are transferred from the Primary VM to the Trusted VM.
However, there may be situations where the resource
initialization on the Trusted VM fails, causing the atomic check
to fail while it still holds the resources. During VM release,
this scenario causes resource reclamation to fail on the Primary
VM. This change ensures that the acquired resources are released
if the Trusted VM resource initialization fails.
Change-Id: I5f1cfe63a3c6580e4dc3f10f36ff15d5d2432adf
Signed-off-by: Akash Gajjar <quic_agajjar@quicinc.com>
Add dsiclk_sel support for both DPHY and CPHY, update pclk_div
calculation w.r.t dsiclk_sel as per HPG for 5nm pll.
Change-Id: Ibdb116ad71bb5f2421a3fae994781f18e21a1bc0
Signed-off-by: Ritesh Kumar <quic_riteshk@quicinc.com>
Signed-off-by: Anand Tarakh <quic_atarakh@quicinc.com>
There can be a scenario where fps change along with dynamic clock
happen in a same commit. This makes newer dynamic clock configuration
come to impact while leaving panel vblank to function as per the older
configured fps. This is invalid modeset, add validation check for the
same.
Change-Id: I32f15de5260d3abdb16a4b1c3f8eefc8bd634848
Signed-off-by: Akash Gajjar <quic_agajjar@quicinc.com>
This reverts commit 0256443205.
(cherry picked from commit 2ba765eec8).
Change-Id: Iabb29b389291a3df67a502e4e3f4ea9ec4cb026e
Signed-off-by: V S Ganga VaraPrasad (VARA) Adabala <quic_vadabala@quicinc.com>
This change includes hw revision check and adds
supported color format for decoder and encoder
of offline rotator.
Change-Id: I0ff20874f756743e1d2bf6b985952b028eeef488
Signed-off-by: Akhil Jaiswal <quic_akhijais@quicinc.com>
ROI enable is moved to VLUT property. Remove lut packets for programming
same from ROI enable property.
Change-Id: Ia10aa26d272003a31d733b44cfb61dbd7690a7f0
Signed-off-by: Yuchao Ma <quic_yuchaom@quicinc.com>
From 5.10 kernel, iommu_attach/detach_device is replaced with a call
to iommu_sid_switch.
Change-Id: I80d204d8b7a7013ad88c0c2c2e5fad316984ca8f
Signed-off-by: Andhavarapu Karthik <quic_kartkart@quicinc.com>
The 5nm DP pll ssc_per2 parameter is currently programmed with a
wrong value. This change will correct the value to be programmed.
Change-Id: I3d79b221e81a81ef3db5325783fdd24b55b3f029
Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com>
