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@@ -134,6 +134,7 @@ enum ltm_vlut_ops_bitmask {
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ltm_dither = BIT(1),
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ltm_roi = BIT(2),
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ltm_vlut = BIT(3),
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+ ltm_init = BIT(4),
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ltm_ops_max = BIT(31),
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};
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@@ -4085,6 +4086,7 @@ static void ltm_initv1_disable(struct sde_hw_dspp *ctx, void *cfg,
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ltm_vlut_ops_mask[dspp_idx[i]] &= ~ltm_dither;
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ltm_vlut_ops_mask[dspp_idx[i]] &= ~ltm_unsharp;
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+ ltm_vlut_ops_mask[dspp_idx[i]] &= ~ltm_init;
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REG_DMA_SETUP_OPS(dma_write_cfg, 0x04, &opmode, sizeof(opmode),
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REG_SINGLE_MODIFY, 0, 0,
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REG_DMA_LTM_INIT_DISABLE_OP_MASK);
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@@ -4215,6 +4217,8 @@ void reg_dmav1_setup_ltm_initv1(struct sde_hw_dspp *ctx, void *cfg)
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ltm_vlut_ops_mask[dspp_idx[i]] &= ~ltm_unsharp;
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}
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+ ltm_vlut_ops_mask[dspp_idx[i]] |= ltm_init;
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+
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/* broadcast feature is not supported with REG_SINGLE_MODIFY */
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REG_DMA_SETUP_OPS(dma_write_cfg, 0x04, &opmode, sizeof(opmode),
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REG_SINGLE_MODIFY, 0, 0,
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@@ -4436,6 +4440,13 @@ static int reg_dmav1_setup_ltm_vlutv1_common(struct sde_hw_dspp *ctx, void *cfg,
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return -EINVAL;
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}
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+ /* vlut is set before ltm init */
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+ if (!(ltm_vlut_ops_mask[dspp_idx[0]] & ltm_init)) {
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+ DRM_DEBUG_DRIVER("vlut is set before ltm init\n");
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+ SDE_EVT32(ctx->idx, 0x2222);
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+ return -EINVAL;
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+ }
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+
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if (hw_cfg->len != sizeof(struct drm_msm_ltm_data)) {
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DRM_ERROR("invalid size of payload len %d exp %zd\n",
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hw_cfg->len, sizeof(struct drm_msm_ltm_data));
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