This change fixes traffic shaper prefill calculations
for prefill count and bytes per clock as per hardware
recommendations in the HPG which are calcualted as below:
ts_ count = ts_end*19200000/fps/(vtotal)
ts_bytes_per_clk = ceil(h_src*v_src*bpp*fps/
19200000*amortized_pref_rate)
Change-Id: Icc2348421a2124daa3b0056f46d7a6a45021381b
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
Kernel upgrade has updated list_sort's compare callback's
function signature to take const lists, preventing modification
when performing a comparison.
Change-Id: I71dbe33b9d213357ad9706ffc270053ea569006d
Signed-off-by: Steve Cohen <quic_cohens@quicinc.com>
This change adds additional logs in dsi driver for
easy debugging of issues related to command transfer.
Change-Id: Ica784bed6c360b2760d6606d625837e23a22410c
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
For read commands, wait_for_done() should be called in dsi_message_rx function.
Currently, its being called twice from dsi_message_rx and dsi_ctrl_post_cmd_transfer.
This change adds a check to skip wait_for_done() from dsi_ctrl_post_cmd_transfer.
Change-Id: Icb7ccd0f8dde24c6c26732f7cb92a20bebb26f5d
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
This change sends a notification to user mode after msm_drm
driver releases the mmio and irq resources on trusted vm transition
request. This is required as user mode has no other way to know
when the resources where actually released. User mode driver earlier
relied on retire fence signaling but retire fences are send before
releasing the hw.
Change-Id: Ia218cfcbf398b2de1ad9578fb9baedf348b067df
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
In ASYNC wait mode, next command kickoff can happen before previous command ISR execution is
completed in below sequence:
ASYNC command A -> triggered
dsi_ctrl_isr for command A -> fired and executed atomic_set(&dsi_ctrl->dma_irq_trig, 1);
wait_for_done for command A -> returns early as dsi_ctrl->dma_irq_trig is 1
ASYNC Command B -> triggered
wait_for_done for command B -> waiting for cmd_dma_done
dsi_ctrl_isr for command A -> executes complete_all(&dsi_ctrl->irq_info.cmd_dma_done);
wait_for_done for command B -> returns success incorrectly based on complete_all of previous
command isr and disable_status_interrupt() is not called.
This leads to refcount of dma_done going wrong and dsi_ctrl_isr is not enabled on suspend resume.
To fix this issue, mark command transfer successful only based on complete_all(cmd_dma_done). This
way disable_status_interrupt() will be always called either from dsi_ctrl_isr or wait_for_done().
Change-Id: I0379ea7ff82a1e077b95f6996d11d1722de00936
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
SPR and Demura modules being disabled when switching back from
Trusted VM to HLOS VM. The change adds the support to restore
the modules to restore to their original state.
Change-Id: I0a843671672179a4bc62da512baf02e911fb50aa
Signed-off-by: Lakshmi Narayana Kalavala <lkalaval@codeaurora.org>
Add display config support for compilation on neo target.
Change-Id: Ia2b9b8b76f833e233a8bf801485c6dd2104e1700
Signed-off-by: Karthik Andhavarapu <quic_kartkart@quicinc.com>
If MST is enabled, the controller needs MST ACT to be
completed to successfully transition to 'Ready for Video'
state. The driver is sending ACT during the normal flow
when transitioning from link training to stream enable.
But it is not sending ACT, if a link maintenance is
triggered after stream enable. This change adds the ACT
update to the link maintenance call flow.
Change-Id: I7aea53a1e54202f1d9059a8eb59f01fa97fe9eb9
Signed-off-by: Sandeep Gangadharaiah <sandgang@codeaurora.org>
In split link usecase with single DSI and dual sublink, the
pixel clock rate should be calculated based on effective lanes
rather than cumulative lanes on that DSI PHY. This effective lanes
can be expressed as number of lanes being used per sublink.
Change-Id: Ia534e816cc64b62c5fe0b9fcaabb9ba52d05bab0
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
This change moves TVM related code under SDE VM config.
Change-Id: I8357d6a984fd97f18f24eee33464299e8ea66b12
Signed-off-by: Andhavarapu Karthik <quic_kartkart@quicinc.com>
Add kalama mdss revision and enable features based
on the hardware capability.
Change-Id: I27dff07b00ba16d313c5c8dc2661a10e522daea5
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
The sde_hw_blk was meant to be a generic base object for all
SDE HW blocks, however, it enforces using a common set of ops
which is not practical when blocks have different capabilities.
Since this object was never used as intended and is not doing
anything functional today, remove the dead weight.
Change-Id: If76006c1ae5c62e8d7d77b100837dbaf6c661bd3
Signed-off-by: Steve Cohen <quic_cohens@quicinc.com>
Many upstream files and APIs have been removed in downstream
driver. Some function definintions are left dangling without
any caller. Remove the functions which are not used downstream.
Change-Id: I9f936e7cdac3be6f854b3c67725164fad785f0d4
Signed-off-by: Steve Cohen <quic_cohens@quicinc.com>
Align the HW catalog to use common naming amongst the "revision"
and "version" structure members.
Change-Id: Ib6c81aee6cb49208b0699db4a75b4eb9dc79e800
Signed-off-by: Steve Cohen <quic_cohens@quicinc.com>
Move all the individual boolean flags from HW catalog into a
"features" bitmap. These flags are used to specify support of
various target specific features.
Change-Id: I2334b3b873f3737f91bbae4ef576408247710156
Signed-off-by: Steve Cohen <quic_cohens@quicinc.com>
This change checks "dp_hdcp2p2" thread's parked state, before
attempting to park the thread. This would avoid a warning
message from the kernel module, in case if the thread is already
parked.
Change-Id: I3133da7159c9806981e4760be275c0a54036958b
Signed-off-by: Sandeep Gangadharaiah <sandgang@codeaurora.org>
Currently RSC timer register programming is optimized for updating
only during timing param changes and not during RSC state changes
with same timing. Static wakeup time computation should consider
panel jitter for RSC clk state too, else it can result in RSC hang.
This change also removes extra logic for video mode prefil lines
computation for rsc config as video mode does not enable RSC solver.
Current issue scenario exposing the hang is in dual dsi display scenario
where RSC is in clock state and static wakeup time is programmed by
not considering panel jitter, after suspend/pmsuspend while waking up
if RSC switches to command state if primary enabled first and vsync
may arrive much early based on the panel jitter. RSC hw can not handle
if TE arrives earlier than static wakeup time causing RSC hang.
Change-Id: I1434fdd71eb04fdbe22b3601500493c818e9126d
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
After an ESD failure, the PHY lanes and controller can be stuck in
an unknown state. This can result in interrupt storms and watchdog
failures, if these error states are not handled correctly. The following
change implements the below mechanism to avoid failures.
1) Disable error interrupts during an ESD reg read, which are re-enabled once
ESD check is successful.
2) On ESD failure, before turning off LP clocks, reset the PHY lanes and DSI
controller.
3) After the HS clocks are turned off, issue a PHY hard reset.
4) Before enabling/disabling error interrupts, clear the error status registers
as they are not cleared as part of controller reset.
Change-Id: If10e4edf095a334a9416d109ec4b1401d1a84505
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Limit dma read commands to sublink 0 in split link
configuration since all panels do not support read
on sublink 1.
Change-Id: I537abafc02afe1c3306175ac850f4f080154f443
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
Access file private data structures inside the
mutex lock only to avoid use-after-free issues.
Change-Id: If70731f517bcb47d4515f131fecafe702064cb45
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
When switching between 2 dongles/adapters it is possible
to have the same resolution with different link configuration.
Even though the pixel clock could be the same on replug, the
vco clock could be different depending on the link
configuration. Since the dp driver only exposes limited clocks
to the clock framework, in this specific scenario, the clock
driver is unable to recognize the change in source clock rate
and ends up skipping the clock reconfiguration.
This change adds support to park the pixel clocks on disable,
thereby forcing a reconfiguration on subsequent replug even
if the pixel clocks are the same.
Change-Id: If90b37d6285f6cad23cf1c11a7d6ccd6b4cf850c
Signed-off-by: Rajkumar Subbiah <quic_rsubbia@quicinc.com>
The divider value for vco clock is only dependent on the link rate
and is known during pll configure. Instead of depending on the
clock framework to program this divider as part of stream clock
enable, this change moves the configuration to pll configuration
and removes the set rate call on the vco clock.
Change-Id: If687a8ab057fdfd6c3b3ad2bd1c51663d9182ff4
Signed-off-by: Rajkumar Subbiah <quic_rsubbia@quicinc.com>
Add a null check to avoid null pointer access while getting
pointer to sde_kms.
Change-Id: I00f77e2a5bf63217fa57408ee5ac238dcac3fb03
Signed-off-by: Samantha Tran <samtran@quicinc.com>
When sde_crtc_atomic_begin is called before crtc is enabled, all the
color processing features need to be moved from active_list to
dirty_list after sde_cp_crtc_apply_properties(). However, the
ltm_hist_en flag doesn't need to be set to false in this case.
Setting ltm_hist_en to false in this case will result LTM merge_en bit
being cleared incorrectly. This change replaces sde_cp_crtc_suspend()
with a new function that only updates the color processing feature lists
in sde_crtc_atomic_begin().
Change-Id: I75d7874899838855bda05a1e8eca0cb9523417e9
Signed-off-by: Ping Li <pingli@quicinc.com>
