커밋 그래프

13 커밋

작성자 SHA1 메시지 날짜
Michael Ru
f470ecf038 disp: msm: dsi: consolidate DSI HW register macros
Cleanup DSI HW register access layer to minimize the number of macros that
access readl/writel functions.

Change-Id: Id78025b3837f9126f64681b4c1c1e13aec762081
Signed-off-by: Michael Ru <mru@codeaurora.org>
2021-06-22 11:43:48 -04:00
Michael Ru
f206e6f921 disp: msm: dsi: remove unsupported PHY versions
Removes files and version checks for unsupported DSI PHY versions.

Change-Id: I47223a3860e3bcf48eb3b74e405064d8eb375f16
Signed-off-by: Michael Ru <mru@codeaurora.org>
2021-06-21 17:39:20 -04:00
Vara Reddy
fcb3849c69 disp: msm: dsi: update DSI PHY configuration to support splitlink
Change updates DSI PHY programming sequence for splitlink configuration.

Change-Id: I708cf83717c6f640c918d41cc122794a10f979ba
Signed-off-by: Vara Reddy <varar@codeaurora.org>
2021-03-24 23:15:52 -07:00
Satya Rama Aditya Pinapala
b78db36c48 disp: msm: dsi: add new compatible strings for DSI PHY and controller
Change adds the new compatible version strings for DSI PHY and DSI CTRL
for waipio.

Change-Id: I1073034e608cace9d41cc04a9854f15f56828dfe
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2021-01-19 16:12:56 -08:00
Satya Rama Aditya Pinapala
0a93edbae6 disp: msm: dsi: rework DSI PLL to be configured within PHY
Change avoids clock framework APIs to configure the DSI PHY
PLL. It follows HW recommendation to set the byte and pclk
dividers.

Change-Id: I8c110f3997e4ec4c2eaa28778b70091855725ab8
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2021-01-12 23:49:11 -08:00
Vara Reddy
c9cb9f51f3 disp: msm: dsi: enable dfps trigger at mdp intf flush
This change allows dynamic refresh trigger to sw trigger
and mdp intf flush. With this we can make sure that DSI
timing/clock update and mdp intf timings are updated in
one vsync.

Change-Id: Ic807f498e2e47be6dd0f1e11ff1fc0896a8ec758
Signed-off-by: Vara Reddy <varar@codeaurora.org>
2020-08-20 12:48:32 -07:00
Yuan Zhao
5139cad2d4 disp: msm: dsi: update PHY configuration to support cphy
Add support to read cphy boolean flag from panel dtsi
and configure DSI PHY registers accordingly. Update the
bit/byte clock calculation according to cphy specifications.
Update clock parents so that the relevant divider blocks
are configured to support cphy.

Change-Id: Iaca61eec01a488657b086f59910c52f8c79e26a4
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
2020-05-14 21:00:07 -07:00
Satya Rama Aditya Pinapala
5694bc2eee disp: msm: dsi: move dsi pll as subnode to dsi PHY
DSI PLL is tightly coupled with DSI PHY. This change removes
separate DSI pll driver and makes DSI pll as a subnode to DSI
PHY which is an accurate way of representation. In addition, this
change adds support for 5nm DSI ctrl and PHY revisions and adds
DSI pll support for 5nm. Remove support for older DSI pll revisions
such as 7nm, 10nm, 14nm, 20nm, 28nm.

Change-Id: Ic8b886a9fe24b906e4ec5130720600efa1e59b68
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-01-10 17:06:58 -08:00
Satya Rama Aditya Pinapala
f372981434 disp: msm: dsi: commit DSI PHY timings after update
DSI PHY timings must be committed every time the values
are updated after a dynamic mode switch.

Change-Id: Id605c76dfe75ec41ceb89000f24baccda189e82f
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-10-18 14:00:05 -07:00
Satya Rama Aditya Pinapala
6c483e3b23 disp: msm: dsi: adding prefix for logs
Adding debug, info and error prefix for log messages
in dsi files. To enable debug logs
run "echo 0x1 > /sys/module/drm/parameters/debug"

Change-Id: I438ac16954bd1d39450f8adeb7fb17f9ea6f8140
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-07-22 17:43:35 -07:00
Satya Rama Aditya Pinapala
edef6ae040 disp: msm: dsi: snapshot of dsi from 4.14 to 4.19
This change is a snapshot of dsi files taken of 4.14
as of commit 764f7c2 (Merge remote-tracking branch
'quic/dev/msm-4.14-display' into msm-4.14)

Change-Id: I8361a844c35a4450f7800964a8da2741676fd6c7
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-07-11 12:29:10 -07:00
Yujun Zhang
b0f2e2222e disp: msm: dsi: add support for dsi dynamic clock switch
This change adds support for dynamic switching of dsi clocks
to avoid RF interference issues. Also with dynamic dsi clock
switch feature coming into picture, now populate the supported
refresh rate as list instead of providing a range. Modify the
logic to enumerate all the modes in dsi driver, taking dynamic
bit clocks, resolutions and refresh rates into account.

Change-Id: I5b6e62bc935cf2234bdd96fcb3c7537b4e735fff
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Yujun Zhang <yujunzhang@codeaurora.org>
2019-06-05 16:06:27 +08:00
Narendra Muppalla
3709853456 Display drivers kernel project initial snapshot
This change brings msm display driver including sde,
dp, dsi, rotator, dsi pll and dp pll from base 4.19 kernel
project. It is first source code snapshot from base kernel project.

Change-Id: Iec864c064ce5ea04e170f24414c728684002f284
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2019-04-14 22:20:59 -07:00